Commit Graph

278192 Commits

Author SHA1 Message Date
Michael Trent de5209bdbd Updated llvm-objdump to display local relocations in Mach-O binaries
Summary:
llvm-objdump's Mach-O parser was updated in r306037 to display external
relocations for MH_KEXT_BUNDLE file types. This change extends the Macho-O
parser to display local relocations for MH_PRELOAD files. When used with
the -macho option relocations will be displayed in a historical format.

rdar://35778019

Reviewers: enderby

Reviewed By: enderby

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40867

llvm-svn: 320166
2017-12-08 17:51:04 +00:00
Kamil Rytarowski bb9a852afd Fix a comment in the code
The -ldl library is missing on NetBSD too, make the comment more generic.

llvm-svn: 320165
2017-12-08 17:38:25 +00:00
Davide Italiano b5a62cc81a [DebugInfo] Use llc instead of llc_dwarf to fix this test.
We work around the fact that some platforms add a triple when
they expand llc_dwarf in lit.

llvm-svn: 320164
2017-12-08 17:15:50 +00:00
Shoaib Meenai 7bd1c95a95 [libunwind] Create install-unwind-stripped target manually
This supports using a newer libunwind with an older installation of LLVM
(whose cmake modules wouldn't have add_llvm_install_targets).

llvm-svn: 320163
2017-12-08 17:15:05 +00:00
Hans Wennborg 5791ce77ba Revert "Unify implementation of our two different flavours of -Wtautological-compare."
> Unify implementation of our two different flavours of -Wtautological-compare.
>
> In so doing, fix a handful of remaining bugs where we would report false
> positives or false negatives if we promote a signed value to an unsigned type
> for the comparison.

This caused a new warning in Chromium:

../../base/trace_event/trace_log.cc:1545:29: error: comparison of constant 64
with expression of type 'unsigned int' is always true
[-Werror,-Wtautological-constant-out-of-range-compare]
  DCHECK(handle.event_index < TraceBufferChunk::kTraceBufferChunkSize);
         ~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

The 'unsigned int' is really a 6-bit bitfield, which is why it's always
less than 64.

I thought we didn't use to warn (with out-of-range-compare) when comparing
against the boundaries of a type?

llvm-svn: 320162
2017-12-08 16:54:08 +00:00
Simon Pilgrim 19d460b066 [X86][SHA] Tag SHA instructions scheduler classes
Put these under VecIMul itinerary classes for now - seems to be a good average value

llvm-svn: 320161
2017-12-08 16:38:41 +00:00
Kostya Kortchinsky 9fcb91b3eb [scudo] Minor code generation improvement
Summary:
It looks like clang was generating somewhat weird assembly with the current
code. `FromPrimary`, even though `const`,  was replaced every time with the code
generated for `size <= SizeClassMap::kMaxSize` instead of using a variable or
register, and `FromPrimary` didn't induce `ClassId != 0` for the compiler, so a
dead branch was generated for `getActuallyAllocatedSize(Ptr, ClassId)` since
it's never called for `ClassId = 0` (Secondary backed allocations) [this one
was more wishful thinking on my side than anything else].

I rearranged the code bit so that the generated assembly is less clunky.

Also changed 2 whitespace inconsistencies that were bothering me.

Reviewers: alekseyshl, flowerhack

Reviewed By: flowerhack

Subscribers: llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D40976

llvm-svn: 320160
2017-12-08 16:36:37 +00:00
Simon Pilgrim 4ba3314d55 [X86] Tag VIA PadLock crypto instructions scheduler classes
llvm-svn: 320159
2017-12-08 16:06:40 +00:00
Simon Pilgrim 1ddcae665e [X86] Tag PKU/INVPCID/RDPID/SMAP/SMX/PTWRITE system instructions scheduler classes
llvm-svn: 320158
2017-12-08 15:48:37 +00:00
Alexey Bataev ec95c6cc0a [InstCombine] PR35354: Convert store(bitcast, load bitcast (select (Cond, &V1, &V2)) --> store (, load (select(Cond, load &V1, load &V2)))
Summary:
If we have the code like this:
```
float a, b;
a = std::max(a ,b);
```
it is converted into something like this:
```
%call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float* nonnull dereferenceable(4) %a.addr, float* nonnull dereferenceable(4) %b.addr)
%1 = bitcast float* %call to i32*
%2 = load i32, i32* %1, align 4
%3 = bitcast float* %a.addr to i32*
store i32 %2, i32* %3, align 4
```
After inlinning this code is converted to the next:
```
%1 = load float, float* %a.addr
%2 = load float, float* %b.addr
%cmp.i = fcmp fast olt float %1, %2
%__b.__a.i = select i1 %cmp.i, float* %a.addr, float* %b.addr
%3 = bitcast float* %__b.__a.i to i32*
%4 = load i32, i32* %3, align 4
%5 = bitcast float* %arrayidx to i32*
store i32 %4, i32* %5, align 4

```
This pattern is not recognized as minmax pattern.
Patch solves this problem by converting sequence
```
store (bitcast, (load bitcast (select ((cmp V1, V2), &V1, &V2))))
```
to a sequence
```
store (,load (select((cmp V1, V2), &V1, &V2)))
```
After this the code is recognized as minmax pattern.

Reviewers: RKSimon, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40304

llvm-svn: 320157
2017-12-08 15:32:10 +00:00
Simon Pilgrim 83708cabc0 [X86][AVX512] Tag CLWB instruction to CLFLUSH/PREFETCH scheduler class
llvm-svn: 320156
2017-12-08 15:19:10 +00:00
Alexey Bataev ad1d023d94 [PatternMatch] Add matcher for LoadInst, NFC.
llvm-svn: 320155
2017-12-08 15:17:37 +00:00
Simon Pilgrim 26f106fda4 [X86][AVX512] Tag AVX512_512_SEXT_MASK_* instructions scheduler classes
Match VPTERNLOG which these pseudos will eventually alias to

llvm-svn: 320154
2017-12-08 15:17:32 +00:00
Jonas Hahnfeld 2fcce313ad [CMake] Remove legacy LIBOMP_LIT_ARGS
The bots have been updated, this option isn't needed anymore.

llvm-svn: 320153
2017-12-08 15:07:08 +00:00
Jonas Hahnfeld e628ab4c65 Use hyperbarrier by default on all architectures
All architectures except x86_64 used the linear barrier implementation
by default which doesn't give good performance for a larger number
of threads.

Improvements for PARALLEL overhead (EPCC) with this patch on a Power8
system (2 sockets x 10 cores x 8 threads, OMP_PLACES=cores)

 20 threads:  4.55us -> 3.49us
 40 threads:  8.84us -> 4.06us
 80 threads: 19.18us -> 4.74us
160 threads: 54.22us -> 6.73us

Differential Revision: https://reviews.llvm.org/D40358

llvm-svn: 320152
2017-12-08 15:07:07 +00:00
Jonas Hahnfeld ce528acf0d Fix thread affinity on non-x86 Linux
To make thread affinity work according to the OpenMP spec, the
runtime needs information about the hardware topology. On Linux
the default way is to parse /proc/cpuinfo which contains this
information for x86 machines but (at least) not for AArch64 and
Power architectures.

Fortunately, there is a different code path which is able to get
that data from sysfs. The needed patch has landed in 2006 for
Linux 2.6.16 which is safe to assume nowadays (even RHEL 5 had
a kernel version derived from 2.6.18, and we are now at RHEL 7!).

Differential Revision: https://reviews.llvm.org/D40357

llvm-svn: 320151
2017-12-08 15:07:05 +00:00
Jonas Hahnfeld 86c307821c Add missing memory barrier for queuing locks
Otherwise I see hangs in the omp_single_copyprivate test when
compiling in release mode. With the debug assertions, I get a
failure `head > 0 && tail > 0`.

Differential Revision: https://reviews.llvm.org/D40722

llvm-svn: 320150
2017-12-08 15:07:02 +00:00
Alexey Bataev dfa430f694 [OPENMP] Initial codegen for `target teams distribute` directive.
Host + default devices codegen for `target teams distribute` directive.

llvm-svn: 320149
2017-12-08 15:03:50 +00:00
Sam McCall 44fdcec26f [clangd] Convert lit code completion tests to unit-tests. NFC
Summary: This improves readability of tests and error messages.

Reviewers: ioeric

Subscribers: klimek, ilya-biryukov, cfe-commits

Differential Revision: https://reviews.llvm.org/D40952

llvm-svn: 320148
2017-12-08 15:00:59 +00:00
Alexander Richardson f5ef4e5616 Print the bad value and required alignment for unaligned relocations
Reviewers: ruiu, grimar

Reviewed By: ruiu

Subscribers: emaste, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D40963

llvm-svn: 320147
2017-12-08 14:53:14 +00:00
Tim Renouf cead41d42f [AMDGPU] add labels to +DumpCode output
Summary:
+DumpCode is a hack to embed disassembly in the ELF file. This commit
fixes it to include labels, to make it slightly more useful.

Reviewers: arsenm, kzhuravl

Subscribers: nhaehnle, timcorringham, dstuttard, llvm-commits, t-tye, yaxunl, wdng, kzhuravl

Differential Revision: https://reviews.llvm.org/D40169

llvm-svn: 320146
2017-12-08 14:09:34 +00:00
Max Kazantsev 63a3de057e [NFC] Rename variable from Cond to Pred to make it more sound
llvm-svn: 320144
2017-12-08 12:54:32 +00:00
Max Kazantsev 9c08b7a053 [SCEV] Fix predicate usage in computeExitLimitFromICmp
In this method, we invoke `SimplifyICmpOperands` which takes the `Cond` predicate
by reference and may change it along with `LHS` and `RHS` SCEVs. But then we invoke
`computeShiftCompareExitLimit` with Values from which the SCEVs have been derived,
these Values have not been modified while `Cond` could be.

One of possible outcomes of this is that we may falsely prove that an infinite loop ends
within some finite number of iterations.

In this patch, we save the original `Cond` and pass it along with original operands.
This logic may be removed in future once `computeShiftCompareExitLimit` works
with SCEVs instead of value operands.

Reviewed By: sanjoy
Differential Revision: https://reviews.llvm.org/D40953

llvm-svn: 320142
2017-12-08 12:19:45 +00:00
Francis Visoiu Mistrih f4bd295576 [CodeGen] Move printing MO_MachineBasicBlock operands to MachineOperand::print
Work towards the unification of MIR and debug output by refactoring the
interfaces.

llvm-svn: 320141
2017-12-08 11:48:02 +00:00
Francis Visoiu Mistrih 6c4ca713f1 [CodeGen] Move printing MO_CImmediate operands to MachineOperand::print
Work towards the unification of MIR and debug output by refactoring the
interfaces.

llvm-svn: 320140
2017-12-08 11:40:06 +00:00
Eric Liu 5a6d57c75f [change-namespace] Fix crash when injected base-class name is used in friend declarations.
Reviewers: hokein

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D41001

llvm-svn: 320139
2017-12-08 10:06:16 +00:00
Pavel Labath f5f0fffea5 [cmake] Make setting of CMAKE_C(XX)_COMPILER flags overridable for cross-builds
Summary:
r319898 made it possible to override these variables via the
CROSS_TOOLCHAIN_FLAGS setting, but this only worked if one explicitly
specifies these variables there. If, instead, one uses
CROSS_TOOLCHAIN_FLAGS to specify a toolchain file (as our internal
builds do, to point cmake to a checked-in toolchain), the
CMAKE_C(XX)_COMPILER flags would still win over the ones specified by
the toolchain file.

To fix is to make the mere presence of these flags overridable. I do
this by putting them as a default value for the CROSS_TOOLCHAIN_FLAGS
setting, so they can be overridden at cmake configuration time.

Reviewers: hintonda, beanz

Subscribers: bogner, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D40947

llvm-svn: 320138
2017-12-08 09:59:48 +00:00
Gadi Haber 2cf601f28f [X86][Haswell]: Updating the scheduling information for the Haswell subtarget.
Updated the scheduling information for the Haswell subtarget with the following changes:

Regrouped the instructions after adding appropriate load + store latencies.
Added scheduling for missing instructions such as the GATHER instrs.
The changes were made after revisiting the latencies impact of all memory uOps.

Reviewers: RKSimon, zvi, craig.topper, apilipenko
Differential Revision: https://reviews.llvm.org/D40021

Change-Id: Iaf6c1f5169add1552845a8a566af4e5a359217a7
llvm-svn: 320137
2017-12-08 09:48:44 +00:00
Igor Laevsky 76b36d3a7f [FuzzMutate] Correctly insert sinks and sources around invoke instructions
Differential Revision: https://reviews.llvm.org/D40840

llvm-svn: 320136
2017-12-08 08:53:16 +00:00
Stephan Bergmann feed26ff07 In stdbool.h, define bool, false, true only in gnu++98
GCC has meanwhile corrected that with the similar
<https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=216679> "C++11
explicitly forbids macros for bool, true and false."

Differential Revision: https://reviews.llvm.org/D40167

llvm-svn: 320135
2017-12-08 08:28:08 +00:00
Craig Topper 037115c29f [X86] Always consider inserting a vXi1 vector into the lsbs of a zero vector to be legal during lowering. Add isel patterns to emit shifts.
Previously we only allowed these through if the subvector came from a compare or test instruction which we would again check for during isel.

With this change we only check for the compare and test instructions during isel and have fallback patterns that emit the shifts if needed.

I noticed that in a lot of cases we don't actually see the compare during lowering and rely on an odd legalization of concat_vectors with a zero vector as the second argument. This keeps the concat_vectors around long enough for a later dag combine to expose the compare then we re-legalize the concat_vectors and catch the compare.

llvm-svn: 320134
2017-12-08 08:10:58 +00:00
Hans Wennborg 5bb88e0f9e Revert r320124 "Fold together the in-range and out-of-range portions of -Wtautological-compare."
This broke Chromium:

../../base/trace_event/trace_log.cc:1545:29: error: comparison of constant 64
with expression of type 'unsigned int' is always true
[-Werror,-Wtautological-constant-out-of-range-compare]
  DCHECK(handle.event_index < TraceBufferChunk::kTraceBufferChunkSize);
         ~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

The 'unsigned int' is really a 6-bit bitfield, which is why it's always
less than 63.

Did this use to fall under the "in-range" case before? I thought we
didn't use to warn when comparing against the boundaries of a type.

llvm-svn: 320133
2017-12-08 05:19:12 +00:00
Vedant Kumar 29477dc82e [Blocks] Inherit sanitizer options from parent decl
There is no way to apply sanitizer suppressions to ObjC blocks. A
reasonable default is to have blocks inherit their parent's sanitizer
options.

rdar://32769634

Differential Revision: https://reviews.llvm.org/D40668

llvm-svn: 320132
2017-12-08 02:47:58 +00:00
Aaron Ballman 1c30924420 Add a test that the __STDC_VERSION__ macro reports the correct value for -std=c17.
llvm-svn: 320131
2017-12-08 02:39:26 +00:00
Rui Ueyama 04c821c7e3 Use lambda to simplify code.
Differential Revision: https://reviews.llvm.org/D40994

llvm-svn: 320130
2017-12-08 02:20:50 +00:00
Vedant Kumar 75850f57fd [ubsan] Test for pass_object_size bounds checks
llvm-svn: 320129
2017-12-08 01:51:51 +00:00
Vedant Kumar 36347d917f [ubsan] Use pass_object_size info in bounds checks
Teach UBSan's bounds check to opportunistically use pass_object_size
information to check array accesses.

rdar://33272922

llvm-svn: 320128
2017-12-08 01:51:47 +00:00
Vedant Kumar 9c36859b33 [MachException] Avoid alignment UB, NFC
Fix alignment UB in some Mach exception-handling logic.

This lets us build lldb and debugserver with UBSan in trapping mode, and
get further along in the testing process before a trap is encountered.

rdar://35923991

llvm-svn: 320127
2017-12-08 01:09:40 +00:00
Vedant Kumar b773e488c9 Remove extant references to g_message_mutex, NFC
Thanks to Jim Ingham for providing the explanation!

llvm-svn: 320126
2017-12-08 01:09:39 +00:00
Sam Clegg 0fb6faa0be Prefer `ArrayRef` over `const std::vector&`
Differential Revision: https://reviews.llvm.org/D40993

llvm-svn: 320125
2017-12-08 01:09:21 +00:00
Richard Smith 6a7513e2cd Fold together the in-range and out-of-range portions of -Wtautological-compare.
llvm-svn: 320124
2017-12-08 01:00:27 +00:00
Abderrazek Zaafrani 2c80e4c7c3 [AArch64] Avoid SIMD interleaved store instruction for Exynos.
Replace interleaved store instructions by equivalent and more efficient instructions based on latency cost model.
Https://reviews.llvm.org/D38196

llvm-svn: 320123
2017-12-08 00:58:49 +00:00
Richard Smith bf0ad43503 Unify implementation of our two different flavours of -Wtautological-compare.
In so doing, fix a handful of remaining bugs where we would report false
positives or false negatives if we promote a signed value to an unsigned type
for the comparison.

llvm-svn: 320122
2017-12-08 00:45:25 +00:00
Derek Schuff 9e1baeda74 Revert "[WebAssemby] Support main functions with alternate signatures."
This reverts commit 959e37e669b0c3cfad4cb9f1f7c9261ce9f5e9ae.
That commit doesn't handle the case where main is declared rather than defined,
in particular the even-more special case where main is a prototypeless
declaration (which is of course the one actually used by musl currently).

llvm-svn: 320121
2017-12-08 00:39:54 +00:00
Craig Topper 323ba39f10 [X86] Handle alls version of vXi1 insert_vector_elt with a constant index without falling back to shuffles.
We previously only supported inserting to the LSB or MSB where it was easy to zero to perform an OR to insert.

This change effectively extracts the old value and the new value, xors them together and then xors that single bit with the correct location in the original vector. This will cancel out the old value in the first xor leaving the new value in the position.

The way I've implemented this uses 3 shifts and two xors and uses an additional register. We can avoid the additional register at the cost of another shift.

llvm-svn: 320120
2017-12-08 00:16:09 +00:00
Craig Topper fd86b3cf22 [X86] Fix indentation. NFC
llvm-svn: 320119
2017-12-08 00:15:57 +00:00
Sam Clegg c5872e864a [WebAssembly] Add check to ensure symbol VA is only set once. NFC.
Also remove resulting unneeded function.

Differential Revision: https://reviews.llvm.org/D40990

llvm-svn: 320118
2017-12-08 00:13:14 +00:00
Rui Ueyama 2569edd9b8 Fix a test that didn't actually test anything.
llvm-svn: 320117
2017-12-08 00:00:37 +00:00
Lang Hames 2f0c5bbc4b [ORC] Mark SymbolStringPool methods as inline to avoid linkage errors, add a
less-than comparison to SymbolStringPtr and a corresponding unit test.

llvm-svn: 320116
2017-12-07 23:32:11 +00:00
Aaron Ballman 7c18159bb5 Correct line endings that got mixed up in r320088; NFC.
llvm-svn: 320115
2017-12-07 23:10:09 +00:00