Commit Graph

278192 Commits

Author SHA1 Message Date
Evgeniy Stepanov c667c1f47a Hardware-assisted AddressSanitizer (llvm part).
Summary:
This is LLVM instrumentation for the new HWASan tool. It is basically
a stripped down copy of ASan at this point, w/o stack or global
support. Instrumenation adds a global constructor + runtime callbacks
for every load and store.

HWASan comes with its own IR attribute.

A brief design document can be found in
clang/docs/HardwareAssistedAddressSanitizerDesign.rst (submitted earlier).

Reviewers: kcc, pcc, alekseyshl

Subscribers: srhines, mehdi_amini, mgorny, javed.absar, eraman, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D40932

llvm-svn: 320217
2017-12-09 00:21:41 +00:00
Paul Robinson 8bd9d6ad83 Fix out-of-order stepping behavior in programs with sunk instructions.
MachineSink attempts to place instructions near the basic blocks where
they are needed.  Once an instruction has been sunk, its location
relative to other instructions no longer is consistent with the
original source code. In order to ensure correct stepping in the
debugger, the debug location for sunk instructions is either merged
with the insertion point or erased if the target successor block is
empty.

Originally submitted as r318679, revised to fix sanitizer failure and
improve testing.

Patch by Matthew Voss!

Differential Revision: https://reviews.llvm.org/D39933

llvm-svn: 320216
2017-12-09 00:17:01 +00:00
Akira Hatanaka 502775a2ee [CodeGen][X86] Fix handling of __fp16 vectors.
This commit fixes a bug in IRGen where it generates completely broken
code for __fp16 vectors on X86. For example when the following code is
compiled:

half4 hv0, hv1, hv2; // these are vectors of __fp16.

void foo221() {
  hv0 = hv1 + hv2;
}

clang generates the following IR, in which two i16 vectors are added:

@hv1 = common global <4 x i16> zeroinitializer, align 8
@hv2 = common global <4 x i16> zeroinitializer, align 8
@hv0 = common global <4 x i16> zeroinitializer, align 8

define void @foo221() {
  %0 = load <4 x i16>, <4 x i16>* @hv1, align 8
  %1 = load <4 x i16>, <4 x i16>* @hv2, align 8
  %add = add <4 x i16> %0, %1
  store <4 x i16> %add, <4 x i16>* @hv0, align 8
  ret void
}

To fix the bug, this commit uses the code committed in r314056, which
modified clang to promote and truncate __fp16 vectors to and from float
vectors in the AST. It also fixes another IRGen bug where a short value
is assigned to an __fp16 variable without any integer-to-floating-point
conversion, as shown in the following example:

__fp16 a;
short b;

void foo1() {
  a = b;
}

@b = common global i16 0, align 2
@a = common global i16 0, align 2

define void @foo1() #0 {
  %0 = load i16, i16* @b, align 2
  store i16 %0, i16* @a, align 2
  ret void
}

rdar://problem/20625184

Differential Revision: https://reviews.llvm.org/D40112

llvm-svn: 320215
2017-12-09 00:02:37 +00:00
Adrian Prantl 01fb31cc89 dwarfdump: Add support for the --diff option.
--diff      Emit the output in a diff-friendly way by omitting offsets and
            addresses.

<rdar://problem/34502625>

llvm-svn: 320214
2017-12-08 23:32:47 +00:00
Craig Topper e29f50da4d [X86][Mips] Remove unused method declaration from the X86 and Mips AsmPrinters.
Both had a declaration of EmitXRayTable, but there is no method defined in either with that name. There is a emitXRayTable in the base class with a lower case 'e' and they both call that.

llvm-svn: 320213
2017-12-08 23:30:03 +00:00
Richard Smith 354abec3e6 Remove creation of out-of-bounds value of enumeration type (resulting in UB).
Also remove unnecessary initialization of out-parameters with this value, so
that MSan is able to catch errors appropriately.

llvm-svn: 320212
2017-12-08 23:29:59 +00:00
Richard Smith a5370fb82c Unify implementation of our two different flavours of -Wtautological-compare,
and fold together into a single function.

In so doing, fix a handful of remaining bugs where we would report false
positives or false negatives if we promote a signed value to an unsigned type
for the comparison.

This re-commits r320122 and r320124, minus two changes:

 * Comparisons between a constant and a non-constant expression of enumeration
   type never warn, not even if the constant is out of range. We should be
   warning about the creation of such a constant, not about its use.

 * We do not use more precise bit-widths for comparisons against bit-fields.
   The more precise diagnostics probably are the right thing, but we should
   consider moving them under their own warning flag.

Other than the refactoring, this patch should only change the behavior for the
buggy cases (where the warnings didn't take into account that promotion from
signed to unsigned can leave a range of inaccessible values in the middle of
the promoted type).

llvm-svn: 320211
2017-12-08 22:57:11 +00:00
Matt Morehouse ffb1132e52 [libFuzzer] Add support for Fuchsia OS.
Summary:
This patch adds the initial support for Fuchsia.

- LIBFUZZER_FUCHSIA is added as an OS type in FuzzerDefs.h
- Fuchsia is, by design, not POSIX compliant. However, it does use ELF and
  supports common POSIX I/O functions. Thus, FuzzerExtFunctions.h and
  FuzzerIO.h are implemented by extending the header guards in
  FuzzerExtFunctionsWeak.cpp and FuzzerIOPosix.cpp to include
  LIBFUZZER_FUCHSIA.
- The platform-specific portions of FuzzerUtil.h are implemented by
  FuzzerUtilFuchsia.cpp, which makes use of exception ports, syscalls, and
  the launchpad library.
- The experimental equivalence server is not currently supported, so
  FuzzerShmem.h is implemented by stub methods in FuzzerShmemFuchsia.cpp.
  Any future implementation will likely involve VMOs.

Tested with ASAN/SanCov on Fuchsia/x86-64 with the canonical toy fuzzer.

Patch By: aarongreen

Reviewers: kcc, morehouse, flowerhack, phosek

Reviewed By: kcc, phosek, Eugene.Zelenko

Subscribers: srhines, mgorny, Eugene.Zelenko

Differential Revision: https://reviews.llvm.org/D40974

llvm-svn: 320210
2017-12-08 22:54:44 +00:00
Francis Visoiu Mistrih 440f69c95a [CodeGen] Move printing MO_Immediate operands to MachineOperand::print
Work towards the unification of MIR and debug output by refactoring the
interfaces.

Add support for operand subreg index as an immediate to debug printing
and use ::print in the MIRPrinter.

Differential Review: https://reviews.llvm.org/D40965

llvm-svn: 320209
2017-12-08 22:53:21 +00:00
Duncan P. N. Exon Smith 9b8caf5bd7 Revert part of "Cleanup some GraphTraits iteration code"
This reverts part of r300656, which caused a regression in
propagateMassToSuccessors by counting edges n^2 times, where n is the
number of edges from the source basic block to the same successor basic
block. The result was both incorrect and very slow to compute for large
values of n (e.g. switches with multiple cases that go to the same basic
block).

Patch by Andrew Scheidecker!

llvm-svn: 320208
2017-12-08 22:42:43 +00:00
Eugene Zelenko cb96ac64b0 [Lex] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 320207
2017-12-08 22:39:26 +00:00
Richard Smith 8a3adc3abb Avoid constructing an out-of-range value for an enumeration (which results in UB).
llvm-svn: 320206
2017-12-08 22:32:35 +00:00
Kostya Serebryany 2659c63e2e [libFuzzer] honor -use_counters, sligntly change the meaning of -experimental_len_control, call UpdateFeatureFrequency only if instructed by the flag
llvm-svn: 320205
2017-12-08 22:21:42 +00:00
Abderrazek Zaafrani 5a2583f026 [AArch64] Rename AArch64VecorByElementOpt.cpp into AArch64SIMDInstrOpt.cpp to reflect the recently added features.
The name change is dicsussed in https://reviews.llvm.org/D38196

llvm-svn: 320204
2017-12-08 22:04:13 +00:00
Adrian Prantl d13170174c Generalize llvm::replaceDbgDeclare and actually support the use-case that
is mentioned in the documentation (inserting a deref before the plus_uconst).

llvm-svn: 320203
2017-12-08 21:58:18 +00:00
Vedant Kumar 195dfd10a6 [Debugify] Add a pass to test debug info preservation
The Debugify pass synthesizes debug info for IR. It's paired with a
CheckDebugify pass which determines how much of the original debug info
is preserved. These passes make it easier to create targeted tests for
debug info preservation.

Here is the Debugify algorithm:

  NextLine = 1
  for (Instruction &I : M)
    attach DebugLoc(NextLine++) to I

  NextVar = 1
  for (Instruction &I : M)
    if (canAttachDebugValue(I))
      attach dbg.value(NextVar++) to I

The CheckDebugify pass expects contiguous ranges of DILocations and
DILocalVariables. If it fails to find all of the expected debug info, it
prints a specific error to stderr which can be FileChecked.

This was discussed on llvm-dev in the thread:
"Passes to add/validate synthetic debug info"

Differential Revision: https://reviews.llvm.org/D40512

llvm-svn: 320202
2017-12-08 21:57:28 +00:00
Shoaib Meenai 927604def6 [libc++] Unbreak Apple buildbots
These buildbots are using the deprecated target name install-libcxx-headers
instead of the more up to date install-cxx-headers, so I need to add an
install-libcxx-headers-stripped target to satisfy them.

llvm-svn: 320201
2017-12-08 21:50:32 +00:00
Rafael Espindola 5af073e3bf Make createSyntheticSections a static helper. NFC.
llvm-svn: 320200
2017-12-08 21:50:29 +00:00
Florian Hahn e5089e2e94 [CodeExtractor] Add debug locations for new call and branch instrs.
Summary:
If a partially inlined function has debug info, we have to add debug
locations to the call instruction calling the outlined function.
We use the debug location of the first instruction in the outlined
function, as the introduced call transfers control to this statement and
there is no other equivalent line in the source code.

We also use the same debug location for the branch instruction added
to jump from artificial entry block for the outlined function, which just
jumps to the first actual basic block of the outlined function.

Reviewers: davide, aprantl, rriddle, dblaikie, danielcdh, wmi

Reviewed By: aprantl, rriddle, danielcdh

Subscribers: eraman, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D40413

llvm-svn: 320199
2017-12-08 21:49:03 +00:00
Rafael Espindola 471001a7b4 Make findSection a static function. NFC.
llvm-svn: 320198
2017-12-08 21:44:11 +00:00
Dan Gohman 3a762bf9df [WebAssembly] Reapply r319186: "Support bitcasted function addresses with varargs."
This puts the functionality under control of a command-line option which is
off by default to avoid breaking existing setups.

llvm-svn: 320197
2017-12-08 21:27:00 +00:00
Dan Gohman 6736f59078 [WebAssemby] Re-apply r320041: "Support main functions with alternate signatures."
This includes a fix so that it doesn't transform declarations, and it
puts the functionality under control of a command-line option which is off
by default to avoid breaking existing setups.

llvm-svn: 320196
2017-12-08 21:18:21 +00:00
Evandro Menezes 5d7a9e6e54 [AArch64] Add Exynos to host detection
Differential revision: https://reviews.llvm.org/D40985

llvm-svn: 320195
2017-12-08 21:09:59 +00:00
Konstantin Zhuravlyov c40d9f2e5d AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
- Add gfx704
    - Change bonaire to gfx704
  - Remove gfx804
  - Remove gfx901
  - Remove gfx903

Differential Revision: https://reviews.llvm.org/D40046

llvm-svn: 320194
2017-12-08 20:52:28 +00:00
Simon Pilgrim 5f7fcb2ea9 [X86] CMOV pseudo instructions shouldn't need scheduling info as they should be lowered early
llvm-svn: 320193
2017-12-08 20:42:35 +00:00
Simon Pilgrim f621dcf8d7 [X86][X87] Tag x87 load/store instructions scheduler classes
llvm-svn: 320192
2017-12-08 20:31:48 +00:00
Alexey Bataev e83b3e89e6 [OPENMP] Simplify codegen for loop iteration variables in loop preamble.
Initial patch could cause trouble in the optimized code because of the
incorrectly generated lifetime intrinsics.

llvm-svn: 320191
2017-12-08 20:18:58 +00:00
Craig Topper 7f0d456ef8 [X86] Teach lowering to only let through (insert_subvector (vXi1 zeros), subvec, 0) for vector sizes that have native KSHIFT support.
For narrow sizes we'll widen the zero vector and widen the insert. Then do an extract_subvector to get back down to correct size.

This allows us to remove some patterns from the isel table that had to COPY_TO_REGCLASS to an oversized register, do the shift and then COPY_TO_REGCLASS back to the narrow register. Now this is represented explicitly in the DAG.

This seems to have perturbed the register allocation in one of the tests, but the number of instructions didn't change.

llvm-svn: 320190
2017-12-08 20:10:33 +00:00
Simon Pilgrim 6415f56c79 [X86][X87] Tag x87 float compare instructions scheduler classes
llvm-svn: 320189
2017-12-08 20:10:31 +00:00
Matt Arsenault 73ce93b08b AMDGPU: Set IntrReadMem on memtime intrinsics
llvm-svn: 320188
2017-12-08 20:01:02 +00:00
Matt Arsenault 856777d8c9 AMDGPU: image_getlod and image_getresinfo do not read memory
llvm-svn: 320187
2017-12-08 20:00:57 +00:00
Matt Arsenault ecad0d5364 AMDGPU: Preserve MMO in adjustWritemask
Follow up to r319705. Currently the MMO is
produced after this in the custom inserter,
so this doesn't change anything yet.

llvm-svn: 320186
2017-12-08 20:00:45 +00:00
Vedant Kumar 9174b684b7 [ubsan] array-bounds: Ignore params with constant size
This is a follow-up to r320128. Eli pointed out that there is some gray
area in the language standard about whether the constant size is exact,
or a lower bound.

https://reviews.llvm.org/D40940

llvm-svn: 320185
2017-12-08 19:51:42 +00:00
Shoaib Meenai d9073510b7 [llvm] Add install-distribution-stripped
This is identical to the install-distribution target, except that it
strips the installed binaries.

Differential Revision: https://reviews.llvm.org/D40689

llvm-svn: 320184
2017-12-08 19:44:45 +00:00
Shoaib Meenai 038fd0056a [cmake] Only pass CMAKE_SYSROOT if non-empty
In my build environment (cmake 3.6.1 and gcc 4.8.5 on CentOS 7), having
an empty CMAKE_SYSROOT in the cache results in --sysroot="" being passed
to all compile commands, and then the compiler errors out because of the
empty sysroot. Only set CMAKE_SYSROOT if non-empty to avoid this.

Differential Revision: https://reviews.llvm.org/D40934

llvm-svn: 320183
2017-12-08 19:42:47 +00:00
Shoaib Meenai e8828d49d0 [runtimes] Add install-*-stripped targets
These should be the only remaining missing install-*-stripped targets.
They're modeled after the existing install targets.

Differential Revision: https://reviews.llvm.org/D40927

llvm-svn: 320182
2017-12-08 19:42:46 +00:00
Xinliang David Li 3905953582 Update test case for r320180
llvm-svn: 320181
2017-12-08 19:38:42 +00:00
Xinliang David Li d91057bf52 Revert r320104: infinite loop profiling bug fix
Causes unexpected memory issue with New PM this time.
The new PM invalidates BPI but not BFI, leaving the
reference to BPI from BFI invalid.

Abandon this patch.  There is a more general solution
which also handles runtime infinite loop (but not statically).

llvm-svn: 320180
2017-12-08 19:38:07 +00:00
Brian M. Rzycki 0eae123d9e [JumpThreading] Minor comment cleanup. NFC. (test commit)
llvm-svn: 320179
2017-12-08 19:36:32 +00:00
Peter Collingbourne d1eefa993b ELF: Ignore --long-plt flag.
This flag can be ignored because we always emit long PLTs.

Differential Revision: https://reviews.llvm.org/D41025

llvm-svn: 320178
2017-12-08 19:36:19 +00:00
Simon Pilgrim 2db2851378 [X86][MPX] Tag TSX/HLE/SGX instructions scheduler classes
Currently tagged these as system instructions.

llvm-svn: 320177
2017-12-08 19:26:22 +00:00
Konstantin Zhuravlyov e30f88f3a9 AMDGPU: Report Arg's Value name in metadata if kernel_arg_name metadata is not available
Differential Revision: https://reviews.llvm.org/D40924

llvm-svn: 320176
2017-12-08 19:22:12 +00:00
Rafael Espindola 1dd30ddd45 Make addReservedSymbols a static helper. NFC.
llvm-svn: 320175
2017-12-08 19:13:27 +00:00
Michael Trent ad840d2206 Reverting r320166 to fix test failures.
llvm-svn: 320174
2017-12-08 19:09:26 +00:00
Simon Pilgrim 42fcda9a6c [X86][MPX] Tag MPX instructions scheduler classes
Currently tagged these as system instructions, once we have uses for them (ASAN?) and they are faster we will need to improve on this.

llvm-svn: 320173
2017-12-08 19:03:42 +00:00
Sam Clegg 2e25e896fb [WebAssembly] Improve wasm test cases
Add test for weakly defined symbols with the same name

Improve test for call-indirect to include the same call in two
different objects. This lays the ground work to improve the
output via de-duplicating the indirect call table:
   https://reviews.llvm.org/D40989

Also make all tests consistently pass -mtriple rather than
declaring in the sources.

Differential Revision: https://reviews.llvm.org/D41024

llvm-svn: 320172
2017-12-08 18:37:44 +00:00
Sanjay Patel d4468912b0 [x86] use hasAVX2() rather than hasInt256(); NFC
These are aliases, but the thing we're checking here is that the target has
vpsllv*, not that the data type is 256-bit. Those instructions exist for
128-bit vectors too...but sadly, not for all element sizes.

llvm-svn: 320170
2017-12-08 18:35:51 +00:00
Simon Pilgrim 8e39dc36b8 [X86] Tag move immediate instructions scheduler classes
llvm-svn: 320169
2017-12-08 18:35:40 +00:00
Kostya Serebryany 67a3af0991 [hwasan] typo in docs
llvm-svn: 320168
2017-12-08 18:14:03 +00:00
Sam Clegg 2c096bacc6 [WebAssembly] Add --no-entry argument
This adds a `--no-entry` argument to wasm LLD used to
suppress the default `_start` entry point.

Patch by Nicholas Wilson!

Differential Revision: https://reviews.llvm.org/D40725

llvm-svn: 320167
2017-12-08 17:58:25 +00:00