Commit Graph

60869 Commits

Author SHA1 Message Date
Michael Gottesman fdb497a9b2 [objc-arc] Added ImpreciseAutoreleaseSet to track autorelease calls that were once autoreleaseRV instructions.
Due to the semantics of ARC, we must be extremely conservative with autorelease
calls inserted by the frontend since ARC gaurantees that said object will be in
the autorelease pool after that point, an optimization invariant that the
optimizer must respect.

On the other hand, we are allowed significantly more flexibility with
autoreleaseRV instructions.

Often times though this flexibility is disrupted by early transformations which
transform objc_autoreleaseRV => objc_autorelease if said instruction is no
longer being used as part of an RV pair (generally due to inlining). Since we
can not tell the difference in between an autorelease put into place by the
frontend and one created through said ``strength reduction'' we can not perform
these optimizations.

The addition of this set gets around said issues by allowing us to differentiate
in between said two cases.

rdar://problem/13697741.

llvm-svn: 180222
2013-04-24 22:18:18 +00:00
Michael Gottesman cd5b02701c Fixed comment typo.
llvm-svn: 180221
2013-04-24 22:18:15 +00:00
Rafael Espindola 75c3036d4b Use pointers to iterate over symbols.
While here, don't report a dummy symbol for relocations that don't have symbols.
We used to says such relocations were for the first defined symbol, but now we
return end_symbols(). The llvm-readobj output change agrees with otool.

llvm-svn: 180214
2013-04-24 19:47:55 +00:00
Arnold Schwaighofer 3fa801fbc2 LoopVectorizer: Change variable name Stride to ConsecutiveStride
This makes it easier to read the code.

No functionality change.

llvm-svn: 180197
2013-04-24 16:16:03 +00:00
Arnold Schwaighofer a6578f7056 LoopVectorize: Scalarize padded types
This patch disables memory-instruction vectorization for types that need padding
bytes, e.g., x86_fp80 has 10 bytes store size with 6 bytes padding in darwin on
x86_64. Because the load/store vectorization is performed by the bit casting to
a packed vector, which has incompatible memory layout due to the lack of padding
bytes, the present vectorizer produces inconsistent result for memory
instructions of those types.
This patch checks an equality of the AllocSize of a scalar type and allocated
size for each vector element, to ensure that there is no padding bytes and the
array can be read/written using vector operations.

Patch by Daisuke Takahashi!

Fixes PR15758.

llvm-svn: 180196
2013-04-24 16:16:01 +00:00
Arnold Schwaighofer 23a0589bce LoopVectorizer: Bail out if we don't have datalayout we need it
llvm-svn: 180195
2013-04-24 16:15:58 +00:00
Rafael Espindola b68c5f6bc3 Revert r180189.
This should bring the ppc bots back. I will try to write a test that would
have found the problem on a little endian system too.

llvm-svn: 180194
2013-04-24 16:10:49 +00:00
Andrew Trick 85a1d4cbc0 MI Sched: eliminate local vreg copies.
For now, we just reschedule instructions that use the copied vregs and
let regalloc elliminate it. I would really like to eliminate the
copies on-the-fly during scheduling, but we need a complete
implementation of repairIntervalsInRange() first.

The general strategy is for the register coalescer to eliminate as
many global copies as possible and shrink live ranges to be
extended-basic-block local. The coalescer should not have to worry
about resolving local copies (e.g. it shouldn't attemp to reorder
instructions). The scheduler is a much better place to deal with local
interference. The coalescer side of this equation needs work.

llvm-svn: 180193
2013-04-24 15:54:43 +00:00
Andrew Trick 608a698cdf Register Coalescing: add a flag to disable rescheduling.
When MachineScheduler is enabled, this functionality can be
removed. Until then, provide a way to disable it for test cases and
designing MachineScheduler heuristics.

llvm-svn: 180192
2013-04-24 15:54:39 +00:00
Andrew Trick 7c791a3dc4 MI Sched: regpressure tracing.
llvm-svn: 180191
2013-04-24 15:54:36 +00:00
Rafael Espindola 137faa05a2 Formatting fixes.
llvm-svn: 180190
2013-04-24 15:14:22 +00:00
Rafael Espindola ec4e350f12 Use a pointer as the relocation iterator.
Since the relocation iterator walks only the relocations in one section, we
can just use a pointer and avoid fetching information about the section at
every reference.

llvm-svn: 180189
2013-04-24 15:02:03 +00:00
Eric Christopher 4eb5eb5bc8 Formatting.
llvm-svn: 180186
2013-04-24 12:56:18 +00:00
Bill Wendling 4e9fc023c6 Align the __LD,__compact_unwind section.
I know what would be cool! We should align the compact unwind section because
aligned data access is faster.
<rdar://problem/13723271>

llvm-svn: 180171
2013-04-24 03:11:14 +00:00
Eric Christopher 9efcc4ae7a Fix dependency layering issues caused by r180112.
Patch by Tom Stellard. (Committed while he's afk per request)

llvm-svn: 180157
2013-04-23 22:53:53 +00:00
Andrew Kaylor 1d2d8e0e84 Adding object caching support to MCJIT
llvm-svn: 180146
2013-04-23 21:26:38 +00:00
Jyotsna Verma af2359b98c Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.
llvm-svn: 180145
2013-04-23 21:17:40 +00:00
Jyotsna Verma f00aab98a0 Hexagon: Define relations for GP-relative instructions.
No functionality change.

llvm-svn: 180144
2013-04-23 21:05:55 +00:00
Adrian Prantl 15db52bf6d Make sure the instruction right after an inlined function has a
debug location. This solves a problem where range of an inlined
subroutine is emitted wrongly.
Patch by Manman Ren.

Fixes rdar://problem/12415623

llvm-svn: 180140
2013-04-23 19:56:03 +00:00
Stephen Lin 8118e0b588 Add more tests for r179925 to verify correct handling of signext/zeroext; strengthen condition check to require actual MVT::i32 virtual register types, just in case (no actual functionality change)
llvm-svn: 180138
2013-04-23 19:42:25 +00:00
Stephen Lin 4eedb29b05 Lowercase "is" boolean variable prefix for consistency within function, no functionality change.
llvm-svn: 180136
2013-04-23 19:30:12 +00:00
Jyotsna Verma 89c84821ea Hexagon: Remove assembler mapped instruction definitions.
llvm-svn: 180133
2013-04-23 19:15:55 +00:00
Bill Schmidt a76bf5a6d0 Change commentary for PowerPC Boolean vector contents.
No functional change intended.

llvm-svn: 180131
2013-04-23 18:49:44 +00:00
Akira Hatanaka e9d0b318b1 [mips] Compare splat value with element size instead of calling isUIntN.
No intended changes in functionality.

llvm-svn: 180130
2013-04-23 18:09:42 +00:00
Owen Anderson 2d4cca35c3 DAGCombine should not aggressively fold SEXT(VSETCC(...)) into a wider VSETCC without first checking the target's vector boolean contents.
This exposed an issue with PowerPC AltiVec where it appears it was setting the wrong vector boolean contents.  The included change
fixes the PowerPC tests, and was OK'd by Hal.

llvm-svn: 180129
2013-04-23 18:09:28 +00:00
Aaron Ballman 31c0adc68c Testing for _XCR_XFEATURE_ENABLED_MASK instead of a specific MSVC version because some MSVC 2010 SP1 installations do not have the _xgetbv intrinsic. Patch thanks to Serge Pavlov!
llvm-svn: 180125
2013-04-23 17:38:44 +00:00
Vincent Lejeune 117f075f6e R600: Use .AMDGPU.config section to emit stacksize
llvm-svn: 180124
2013-04-23 17:34:12 +00:00
Vincent Lejeune b6bfe85a07 R600: Add CF_END
llvm-svn: 180123
2013-04-23 17:34:00 +00:00
Nadav Rotem 71c9d6d333 LoopVectorizer: Fix 15830. When scalarizing and unrolling stores make sure that the order in which the elements are scalarized is the same as the original order.
This fixes a miscompilation in FreeBSD's regex library.

llvm-svn: 180121
2013-04-23 17:12:42 +00:00
Jyotsna Verma a696239bec Hexagon: Remove duplicate instructions to handle global/immediate values
for absolute/absolute-set addressing modes.

llvm-svn: 180120
2013-04-23 17:11:46 +00:00
Pekka Jaaskelainen d3c90e132a Call the potentially costly isAnnotatedParallel() only once.
Made the uniform write test's checks a bit stricter.

llvm-svn: 180119
2013-04-23 16:44:43 +00:00
Stephen Lin 6c70dc7842 Add some constraints to use of 'returned':
1) Disallow 'returned' on parameter that is also 'sret' (no sensible semantics, as far as I can tell).
2) Conservatively disallow tail calls through 'returned' parameters that also are 'zext' or 'sext' (for consistency with treatment of other zero-extending and sign-extending operations in tail call position detection...can be revised later to handle situations that can be determined to be safe).

This is a new attribute that is not yet used, so there is no impact.

llvm-svn: 180118
2013-04-23 16:31:56 +00:00
Tom Stellard a1fd35a04c Wrap.h: Define wrap / unwrap function for ExecutionEngine
llvm-svn: 180112
2013-04-23 15:13:36 +00:00
Alexey Samsonov fdcff04ad5 Fixup for r180094: properly use MSan interface functions
llvm-svn: 180103
2013-04-23 13:35:32 +00:00
Carlo Kok 8c6719bf07 Expose IRBuilder::CreateAtomicRMW as LLVMBuildAtomicRMW in llvm-c.
llvm-svn: 180100
2013-04-23 13:21:19 +00:00
Alexey Samsonov 0c9f1bfae5 Tell MSan that memory initialized by libz is valid
llvm-svn: 180094
2013-04-23 12:17:46 +00:00
Alexey Samsonov 068fc8ae6e Use zlib to uncompress debug sections in DWARF parser.
This makes llvm-dwarfdump and llvm-symbolizer understand
debug info sections compressed by ld.gold linker.

llvm-svn: 180088
2013-04-23 10:17:34 +00:00
Hans Wennborg 63761d4bc4 Add llvm_unreachable after fully covered switch to pacify GCC
llvm-svn: 180087
2013-04-23 10:12:16 +00:00
Alexey Samsonov 28acf056e1 Add more guards around zlib-dependent code
llvm-svn: 180084
2013-04-23 08:57:30 +00:00
Alexey Samsonov 2fb337e77a Add basic zlib support to LLVM. This would allow to use compression/uncompression in selected LLVM tools.
llvm-svn: 180083
2013-04-23 08:28:39 +00:00
Pekka Jaaskelainen 6f2f66b63f Refuse to (even try to) vectorize loops which have uniform writes,
even if erroneously annotated with the parallel loop metadata.

Fixes Bug 15794: 
"Loop Vectorizer: Crashes with the use of llvm.loop.parallel metadata"

llvm-svn: 180081
2013-04-23 08:08:51 +00:00
Tim Northover 2ac2d4c59d AArch64: remove unnecessary check that RS is valid
AArch64 always demands a register-scavenger, so the pointer should never be
NULL. However, in the spirit of paranoia, we'll assert it before use just in
case.

llvm-svn: 180080
2013-04-23 06:55:15 +00:00
Manman Ren 4a4970ec6a Struct-path aware TBAA: update getMostGenericTBAA
The tag is of type TBAANode when flag EnableStructPathTBAA is off.

Move implementation of MDNode::getMostGenericTBAA to TypeBasedAliasAnalysis.cpp
since it depends on how to interprete the MDNodes for scalar TBAA and
struct-path aware TBAA.

llvm-svn: 180068
2013-04-22 23:00:44 +00:00
Matt Arsenault 034ca0fe41 Remove unused DwarfSectionOffsetDirective string
The value isn't actually used, and setting it emits a COFF specific
directive.

llvm-svn: 180064
2013-04-22 22:49:11 +00:00
Eric Christopher 04d4e9312c Move C++ code out of the C headers and into either C++ headers
or the C++ files themselves. This enables people to use
just a C compiler to interoperate with LLVM.

llvm-svn: 180063
2013-04-22 22:47:22 +00:00
Chad Rosier 65dd0399c6 [ms-inline asm] Removed this unnecessary check. In the current implementation,
Disp will always be one of MCSymbolRefExpr or MCConstantExpr, and never NULL.

llvm-svn: 180059
2013-04-22 22:38:35 +00:00
Chad Rosier dba3fe557c [ms-inline asm] Get the OpDecl and remove a redundant lookup.
Part of rdar://13663589

llvm-svn: 180057
2013-04-22 22:12:12 +00:00
Chad Rosier 732b837a41 [ms-inline asm] Add the OpDecl to the InlineAsmIdentifierInfo struct and in turn
the MCParsedAsmOperand.
Part of rdar://13663589

llvm-svn: 180054
2013-04-22 22:04:25 +00:00
Eli Bendersky 58b04b7e2e Optimize MachineBasicBlock::getSymbol by caching the symbol. Since the symbol
name computation is expensive, this helps save about 25% of the time spent in
this function.

llvm-svn: 180049
2013-04-22 21:21:08 +00:00
Anat Shemer 10260a75e3 Changed back (relative to commit 179786) the operations executed when extract(cast) is transformed to cast(extract). It uses the Builder class as before. In addition the result node is added to the Worklist, so all the previous extract users will become the new scalar cast users.
llvm-svn: 180045
2013-04-22 20:51:10 +00:00