llvm-project

Commit Graph

Author	SHA1	Message	Date
Chris Lattner	72a364c107	fix emacs language spec's, patch by Edmund Grimley-Evans! llvm-svn: 111241	2010-08-17 16:20:04 +00:00
Jakob Stoklund Olesen	b93331f3be	Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. When a target instruction wants to set target-specific flags, it should simply set bits in the TSFlags bit vector defined in the Instruction TableGen class. This works well because TableGen resolves member references late: class I : Instruction { AddrMode AM = AddrModeNone; let TSFlags{3-0} = AM.Value; } let AM = AddrMode4 in def ADD : I; TSFlags gets the expected bits from AddrMode4 in this example. llvm-svn: 100384	2010-04-05 03:10:20 +00:00
Wesley Peck	e4801e49c9	Adding the MicroBlaze backend. The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969	2010-02-23 19:15:24 +00:00

Author

SHA1

Message

Date

Chris Lattner

72a364c107

fix emacs language spec's, patch by Edmund Grimley-Evans!

llvm-svn: 111241

2010-08-17 16:20:04 +00:00

Jakob Stoklund Olesen

b93331f3be

Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.

When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.

This works well because TableGen resolves member references late:

class I : Instruction {
  AddrMode AM = AddrModeNone;
  let TSFlags{3-0} = AM.Value;
}

let AM = AddrMode4 in
def ADD : I;

TSFlags gets the expected bits from AddrMode4 in this example.

llvm-svn: 100384

2010-04-05 03:10:20 +00:00

Wesley Peck

e4801e49c9

Adding the MicroBlaze backend.

The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze

The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.

llvm-svn: 96969

2010-02-23 19:15:24 +00:00

3 Commits