Commit Graph

285588 Commits

Author SHA1 Message Date
Tobias Grosser e5340a8ce9 Move code generation test case to test/CodeGen/
llvm-svn: 327857
2018-03-19 15:05:30 +00:00
Zaara Syeda ff05e2b0e6 [MachineLICM] Add functions to MachineLICM to hoist invariant stores
This patch adds functions to allow MachineLICM to hoist invariant stores.
Currently, MachineLICM does not hoist any store instructions, however
when storing the same value to a constant spot on the stack, the store
instruction should be considered invariant and be hoisted. The function
isInvariantStore iterates each operand of the store instruction and checks
that each register operand satisfies isCallerPreservedPhysReg. The store
may be fed by a copy, which is hoisted by isCopyFeedingInvariantStore.
This patch also adds the PowerPC changes needed to consider the stack
register as caller preserved.

Differential Revision: https://reviews.llvm.org/D40196

llvm-svn: 327856
2018-03-19 14:52:25 +00:00
Simon Pilgrim 30c38c3849 [X86] Generalize schedule classes to support multiple stages
Currently the WriteResPair style multi-classes take a single pipeline stage and latency, this patch generalizes this to make it easier to create complex schedules with ResourceCycles and NumMicroOps be overriden from their defaults.

This has already been done for the Jaguar scheduler to remove a number of custom schedule classes and adding it to the other x86 targets will make it much tidier as we add additional classes in the future to try and replace so many custom cases.

I've converted some instructions but a lot of the models need a bit of cleanup after the patch has been committed - memory latencies not being consistent, the class not actually being used when we could remove some/all customs, etc. I'd prefer to keep this as NFC as possible so later patches can be smaller and target specific.

Differential Revision: https://reviews.llvm.org/D44612

llvm-svn: 327855
2018-03-19 14:46:07 +00:00
Miklos Vajna 10fe9bc79e run-clang-tidy: forward clang-tidy exit status
Exit with a non-zero value in case any of the underlying clang-tidy
invocations exit with a non-zero value.

This is useful in case WarningsAsErrors is enabled for some of the
checks: if any of those checks find something, the exit status now
reflects that.

Also add the ability to use run-clang-tidy.py via lit, and assert that
the exit code is not 0 when modernize-use-auto is triggered
intentionally.

Reviewers: alexfh, aaron.ballman

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D44366

llvm-svn: 327854
2018-03-19 14:43:59 +00:00
Sanjay Patel 05daae75ad [x86] put nops into the WriteNop class and customize for Jaguar
1. Given that we already have a classification bucket with 'nop' in the name, 
   that's where 'nop' belongs. Right now, it's only used for prefix bytes and 'pause'.
2. Make the latency of this class '1' for Jaguar to tell the scheduler (and presumably 
   llvm-mca) how to model the resource requirements better even though a nop has no 
   dependencies.

Differential Revision: https://reviews.llvm.org/D44608

llvm-svn: 327853
2018-03-19 14:26:50 +00:00
Ilya Biryukov 749788eab6 Updated a usage of createTemporaryFile that does not expect file to be created.
Summary:
This fixes a usage of createTemporaryFile in clang repo after
a change in llvm repo.

Reviewers: klimek, bkramer, krasimir, espindola, ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D36828

llvm-svn: 327852
2018-03-19 14:20:25 +00:00
Ilya Biryukov 8418576304 Changed createTemporaryFile without FD to actually create a file.
Summary:
This commit changes semantics of createUniqueFile and
createTemporaryFile variants that do not return file descriptors.
Previously they only checked if files exist, therefore being subject
to race conditions. Now they will create an empty file to avoid them.

Functions that do not create a file are now called
getPotentiallyUniqueTempFileName and getPotentiallyUniqueFileName.

Reviewers: klimek, bkramer, krasimir, JDevlieghere, espindola

Reviewed By: klimek

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D36827

llvm-svn: 327851
2018-03-19 14:19:58 +00:00
Nicolai Haehnle 2ad19016c0 TableGen: Explicitly forbid self-references to field members
Summary:
Otherwise, patterns like in the test case produce cryptic error
messages about fields being resolved incompletely.

Change-Id: I713c0191f00fe140ad698675803ab1f8823dc5bd

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44476

llvm-svn: 327850
2018-03-19 14:14:28 +00:00
Nicolai Haehnle 4186cc7c08 TableGen: Check the dynamic type of !cast<Rec>(string)
Summary:
The docs already claim that this happens, but so far it hasn't. As a
consequence, existing TableGen files get this wrong a lot, but luckily
the fixes are all reasonably straightforward.

To make this work with all the existing forms of self-references (since
the true type of a record is only built up over time), the lookup of
self-references in !cast is delayed until the final resolving step.

Change-Id: If5923a72a252ba2fbc81a889d59775df0ef31164

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D44475

llvm-svn: 327849
2018-03-19 14:14:20 +00:00
Nicolai Haehnle 18f1998a00 TableGen: Explicitly test some cases of self-references and !cast errors
Summary:
These are cases of self-references that exist today in practice. Let's
add tests for them to avoid regressions.

The self-references in PPCInstrInfo.td can be expressed in a simpler
way. Allowing this type of self-reference while at the same time
consistently doing late-resolve even for self-references is problematic
because there are references to fields that aren't in any class. Since
there's no need for this type of self-reference anyway, let's just
remove it.

Change-Id: I914e0b3e1ae7adae33855fac409b536879bc3f62

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: nemanjai, wdng, kbarton, llvm-commits

Differential Revision: https://reviews.llvm.org/D44474

llvm-svn: 327848
2018-03-19 14:14:10 +00:00
Nicolai Haehnle 335c70f55e TableGen: Only fold when some operand made resolve progress
Summary:
Make sure that we always fold immediately, so there's no point in
attempting to re-fold when nothing changes.

Change-Id: I069e1989455b6f2ca8606152f6adc1a5e817f1c8

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44198

llvm-svn: 327847
2018-03-19 14:14:04 +00:00
Nicolai Haehnle a43af64fa2 TableGen: Remove OpInit::Fold
Summary:
Virtual dispatch is not actually used anywhere.

Change-Id: I9829c5c59920ea27fb9bc17f1442156a3bb09a65

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44197

llvm-svn: 327846
2018-03-19 14:13:59 +00:00
Nicolai Haehnle 1eaebc62d7 TableGen: Move GenStrConcat to a helper function in BinOpInit
Summary:
Make it accessible for more users.

Change-Id: Ib05f09ba14e7942ced5d2f24b205efa285e40cd5

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44196

llvm-svn: 327845
2018-03-19 14:13:54 +00:00
Nicolai Haehnle c47fe129cb TableGen: Remove the cast-from-string-to-variable-reference feature
Summary:
Cast-from-string for records isn't going away, but cast-from-string for
variables is a pretty dodgy feature to have, especially when referencing
template arguments. It's doubtful that this ever worked in a reliable
way, and nobody seems to be using it, so let's get rid of it and get
some related cleanups.

Change-Id: I395ac8a43fef4cf98e611f2f552300d21e99b66a

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44195

llvm-svn: 327844
2018-03-19 14:13:37 +00:00
Matt Arsenault fed0a45036 AMDGPU/GlobalISel: RegBankSelect for basic int ops
llvm-svn: 327843
2018-03-19 14:07:23 +00:00
Matt Arsenault 69932e4d69 AMDGPU: Don't leave dead illegal VGPR->SGPR copies
Normally DCE kills these, but at -O0 these get left behind
leaving suspicious looking illegal copies.

Replace with IMPLICIT_DEF to avoid iterator issues.

llvm-svn: 327842
2018-03-19 14:07:15 +00:00
Karl-Johan Karlsson 1af12b587b [NFC] Fix minor typos in comments
llvm-svn: 327841
2018-03-19 13:48:40 +00:00
Clement Courbet 6d047b70a4 [MergeICmps] Re-land 324317 "Enable the MergeICmps Pass by default."
Now that PR36557 is fixed.

llvm-svn: 327840
2018-03-19 13:37:04 +00:00
Sjoerd Meijer d16037d9bb [ARM] Support for v4f16 and v8f16 vectors
This is the groundwork for adding the Armv8.2-A FP16 vector intrinsics, which
uses v4f16 and v8f16 vector operands and return values. All the moving parts
are tested with two intrinsics, a 1-operand v8f16 and a 2-operand v4f16
intrinsic. In a follow-up patch the rest of the intrinsics and tests will be
added.

Differential Revision: https://reviews.llvm.org/D44538

llvm-svn: 327839
2018-03-19 13:35:25 +00:00
Xin Tong 116c309181 Stylish change. NFC
llvm-svn: 327838
2018-03-19 13:35:23 +00:00
Andrea Di Biagio 91ab2ee954 [llvm-mca] Add pipeline stall events.
This patch introduces a new class named HWStallEvent (see HWEventListener.h),
and updates the event listener interface. A HWStallEvent represents a pipeline
stall caused by the lack of hardware resources. Similarly to HWInstructionEvent,
the event type is an unsigned, and the exact meaning depends on the subtarget.
At the moment, HWStallEvent supports a few generic dispatch events.

The main goals of this patch is to remove the logic that counts dispatch stalls
from the DispatchUnit to the BackendStatistics view.

Previously, DispatchUnit was responsible for counting and classifying dispatch
stall events. With this patch, we delegate the task of counting and classifying
stall events to the listeners (i.e. in our case, it is view
"BackendStatistics"). So, the DispatchUnit doesn't have to do extra
(unnecessary) bookkeeping.

This patch also helps futher simplifying the Backend interface. Now class
BackendStatistics no longer has to query the Backend interface to obtain the
number of dispatch stalls. As a consequence, we can get rid of all the
'getNumXXX()' methods from class Backend.
The long term goal is to remove all the remaining dependencies between the
Backend and the BackendStatistics interface.

Differential Revision: https://reviews.llvm.org/D44621

llvm-svn: 327837
2018-03-19 13:23:07 +00:00
Sjoerd Meijer 87793e7599 [ARM] Pass half or i16 types for NEON intrinsics
For generating NEON intrinsics, this determines the NEON data type, and whether
it should be a half type or an i16 type. I.e., we always pass a half type for
AArch64, this hasn't changed, but now also for ARM but only when FullFP16 is
enabled, and i16 otherwise.

This is intended to be non-functional change, but together with the backend
work in D44538 which adds support for f16 vectors, this enables adding the
AArch32 FP16 (vector) intrinsics.

Differential Revision: https://reviews.llvm.org/D44561

llvm-svn: 327836
2018-03-19 13:22:49 +00:00
Hans Wennborg f646bcc2de build_llvm_package.bat: Drop LLDB from the package.
I don't think anyone ever got this to work, what with getting exactly
the right Python dependency and so on. Removing it simplifies the
script, removes a number of hairy dependencies, and cuts ~30 MB off the
installer size.

llvm-svn: 327835
2018-03-19 13:05:37 +00:00
Jonas Paulsson a6216ec4cc [SystemZ] Bugfix of CC liveness in emitMemMemWrapper (CLC).
If DoneMBB becomes empty it must have CC added to its live-in list, since it
will fall-through into EndMBB. This happens when the CLC loop does the
complete range.

Review: Ulrich Weigand
llvm-svn: 327834
2018-03-19 13:05:22 +00:00
Alexander Kornienko fcefdb877c [clang-tidy] New check bugprone-unused-return-value
Summary:
Detects function calls where the return value is unused.

Checked functions can be configured.

Reviewers: alexfh, aaron.ballman, ilya-biryukov, hokein

Reviewed By: alexfh, aaron.ballman

Subscribers: hintonda, JonasToth, Eugene.Zelenko, mgorny, xazax.hun, cfe-commits

Tags: #clang-tools-extra

Patch by Kalle Huttunen!

Differential Revision: https://reviews.llvm.org/D41655

llvm-svn: 327833
2018-03-19 13:02:32 +00:00
Hans Wennborg 13e8a85820 HexagonISelLowering.cpp: fix 'enum in bool context' warning
llvm-svn: 327832
2018-03-19 12:55:58 +00:00
Alex Bradbury 0171a9f4ec [RISCV] Peephole optimisation for load/store of global values or constant addresses
(load (add base, off), 0) -> (load base, off)
(store val, (add base, off)) -> (store val, base, off)

This is similar to an equivalent peephole optimisation in PPCISelDAGToDAG.

llvm-svn: 327831
2018-03-19 11:54:28 +00:00
Alexander Potapenko fa0217276a [MSan] fix the types of RegSaveAreaPtrPtr and OverflowArgAreaPtrPtr
Despite their names, RegSaveAreaPtrPtr and OverflowArgAreaPtrPtr
used to be i8* instead of i8**.

This is important, because these pointers are dereferenced twice
(first in CreateLoad(), then in getShadowOriginPtr()), but for some
reason MSan allowed this - most certainly because it was possible
to optimize getShadowOriginPtr() away at compile time.

Differential revision: https://reviews.llvm.org/D44520

llvm-svn: 327830
2018-03-19 10:08:04 +00:00
Alexander Potapenko 014ff63f24 [MSan] Don't create zero offsets in getShadowPtrForArgument(). NFC
For MSan instrumentation with MS.ParamTLS and MS.ParamOriginTLS being
TLS variables, the CreateAdd() with ArgOffset==0 is a no-op, because
the compiler is able to fold the addition of 0.

But for KMSAN, which receives ParamTLS and ParamOriginTLS from a call
to the runtime library, this introduces a stray instruction which
complicates reading/testing the IR.

Differential revision: https://reviews.llvm.org/D44514

llvm-svn: 327829
2018-03-19 10:03:47 +00:00
Alexander Potapenko e0bafb4359 [MSan] Introduce insertWarningFn(). NFC
This is a step towards the upcoming KMSAN implementation patch.
KMSAN is going to use a different warning function,
__msan_warning_32(uptr origin), so we'd better create the warning
calls in one place.

Differential Revision: https://reviews.llvm.org/D44513

llvm-svn: 327828
2018-03-19 09:59:44 +00:00
Mikhail Maltsev f07278ec31 [ARM] Fix warnings about missing parentheses in ARMAsmParser
llvm-svn: 327827
2018-03-19 09:48:58 +00:00
Serguei Katkov 7d0664b41f [SCEV] Factor out isKnownViaInduction. NFC.
This just extracts the isKnownViaInduction from isKnownPredicate.

Reviewers: sanjoy, mkazantsev, reames
Reviewed By: mkazantsev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44554

llvm-svn: 327824
2018-03-19 08:32:09 +00:00
Peter Smith 3d044f57d4 [ELF] Recommit 327248 with Arm using the .got for _GLOBAL_OFFSET_TABLE_
This is the same as 327248 except Arm defining _GLOBAL_OFFSET_TABLE_ to
be the base of the .got section as some existing code is relying upon it.

For most Targets the _GLOBAL_OFFSET_TABLE_ symbol is expected to be at
the start of the .got.plt section so that _GLOBAL_OFFSET_TABLE_[0] =
reserved value that is by convention the address of the dynamic section.
Previously we had defined _GLOBAL_OFFSET_TABLE_ as either the start or end
of the .got section with the intention that the .got.plt section would
follow the .got. However this does not always hold with the current
default section ordering so _GLOBAL_OFFSET_TABLE_[0] may not be consistent
with the reserved first entry of the .got.plt.

X86, X86_64 and AArch64 will use the .got.plt. Arm, Mips and Power use .got

Fixes PR36555

Differential Revision: https://reviews.llvm.org/D44259

llvm-svn: 327823
2018-03-19 06:52:51 +00:00
Serguei Katkov 529f42331e [SCEV] Re-land: Fix isKnownPredicate
This is re-land of https://reviews.llvm.org/rL327362 with a fix
and regression test.

The crash was due to it is possible that for found MDL loop,
LHS or RHS may contain an invariant unknown SCEV which
does not dominate the MDL. Please see regression
test for an example.

Reviewers: sanjoy, mkazantsev, reames
Reviewed By: mkazantsev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44553

llvm-svn: 327822
2018-03-19 06:35:30 +00:00
Craig Topper e18fbab988 [X86] Merge XADD8rr regular expression with XADD16rr/XADD32rr/XADD64rr in a couple scheduler models.
llvm-svn: 327821
2018-03-19 04:21:42 +00:00
Craig Topper d10ceffa5f [X86] Add ADD16i16/ADD32i32/ADD64i32 and similar to the scheduler models to match ADD8i8.
Also move ADC8i8 and SBB8i8 in the Sandy Bridge model to the same class as ADC8ri and SBB8ri. That seems more accurate since its the 8i8 is just the register forced to AL instead of coming from modrm.

llvm-svn: 327820
2018-03-19 04:21:40 +00:00
Craig Topper e9c99d32b3 [X6] Remove two unused InstrItinClass
llvm-svn: 327819
2018-03-19 02:07:32 +00:00
Jan Vesely 5b10494fa8 remainder: Port from amd builtins
Mostly ported from amd_builtins, uses only denormal path for fp32.
Passes CTS on carrizo and turks

Reviewer: Aaron Watry <awatry@gmail.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 327818
2018-03-19 01:01:10 +00:00
Craig Topper 793733a6c8 [X86] Use IIC_CMOV64_RR/RM on 64-bit cmov instructions.
llvm-svn: 327817
2018-03-19 00:56:12 +00:00
Craig Topper 9b60dcb29b [X86] Merge 32 and 64-bit RORX/SHLX/SARX/SHRX into single regular expressions in scheduler models.
llvm-svn: 327816
2018-03-19 00:56:11 +00:00
Craig Topper 13a1650d8a [X86] Merge 8-bit instructions into instregex with 16/32/64 instructions in the scheduler models as much as possible. NFCI
This reduces the total number of generated scheduler classes from 5404 to 5316.

llvm-svn: 327815
2018-03-19 00:56:09 +00:00
Dylan McKay a35ee70641 [AVR] Lower i128 divisions to runtime library calls
This patch adds i128 division support by instruction LLVM to lower
128-bit divisions to the __udivmodti4 and __divmodti4 rtlib functions.

This also adds test for 64-bit division and 128-bit division.

Patch by Peter Nimmervoll.

llvm-svn: 327814
2018-03-19 00:55:50 +00:00
Craig Topper f545cfee52 [Mips] Remove duplicate lines from MipsScheduleP5600.td and enable FullInstRWOverlapCheck.
This fixes the errors found by the new check added in r327808.

llvm-svn: 327813
2018-03-18 22:16:54 +00:00
Craig Topper 75aeb62eb4 [AArch64] Fix a few InstRWs in the A53 scheduler model and enable FullInstRWOverlapCheck.
This fixes the errors found by the new check added in r327808.

llvm-svn: 327812
2018-03-18 22:16:53 +00:00
Craig Topper f7fdfb3fb6 [SelectionDAG] Don't default the SelectionDAG* parameter to SDValue::dump to nullptr. Use two different signatures instead.
This matches what we do in SDNode.

This should allow SDValue::dump to be used in the debugger without getting an error if you don't pass an argument.

llvm-svn: 327811
2018-03-18 21:28:11 +00:00
Jan Kratochvil c4d65751df Move the codebase to use: DWARFCompileUnit -> DWARFUnit
Now the codebase can use the DWARFUnit superclass. It will make it later
seamlessly work also with DWARFPartialUnit for DWZ.

This patch is only a search-and-replace easily undone, nothing interesting
in it.

Differential revision: https://reviews.llvm.org/D42892

llvm-svn: 327810
2018-03-18 20:11:02 +00:00
Jan Kratochvil 2ccddfe3c6 DWARFUnit split out of DWARFCompileUnit
DW_TAG_partial_unit for DWZ can be then presented by DWARFPartialUnit also
inherited from DWARFUnit.

Differential revision: https://reviews.llvm.org/D40466

llvm-svn: 327809
2018-03-18 20:09:02 +00:00
Craig Topper e1d6a4df1c [TableGen] When trying to reuse a scheduler class for instructions from an InstRW, make sure we haven't already seen another InstRW containing this instruction on this CPU.
This is similar to the check later when we remap some of the instructions from one class to a new one. But if we reuse the class we don't get to do that check.

So many CPUs have violations of this check that I had to add a flag to the SchedMachineModel to allow it to be disabled. Hopefully we can get those cleaned up quickly and remove this flag.

A lot of the violations are due to overlapping regular expressions, but that's not the only kind of issue it found.

llvm-svn: 327808
2018-03-18 19:56:15 +00:00
Simon Pilgrim 203876f104 [X86][Btver2] Fix crc32 schedule costs
The default is currently FAdd for some reason

llvm-svn: 327807
2018-03-18 19:54:42 +00:00
Marshall Clow c8faf3a93c Updated C++2a status with changes from Jacksonville WG21 meeting
llvm-svn: 327806
2018-03-18 19:29:21 +00:00