Evan Cheng
6f7d31ea50
Added 128-bit packed integer subtraction.
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llvm-svn: 27096
2006-03-25 01:33:37 +00:00
Evan Cheng
8e481df625
Added CVTTPS2PI.
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llvm-svn: 27095
2006-03-25 01:31:59 +00:00
Evan Cheng
980c4d5b46
Added CVTSS2SI.
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llvm-svn: 27094
2006-03-25 01:00:18 +00:00
Evan Cheng
e7ee6a5e32
Support for scalar to vector with zero extension.
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llvm-svn: 27091
2006-03-24 23:15:12 +00:00
Evan Cheng
2f0277bf48
Added LDMXCSR
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llvm-svn: 27087
2006-03-24 22:28:37 +00:00
Chris Lattner
97599f1211
plug the intrinsics into the patterns for movmsk*
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llvm-svn: 27083
2006-03-24 21:49:18 +00:00
Jim Laskey
f0729b4067
Add dwarf register numbering to register data.
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llvm-svn: 27081
2006-03-24 21:15:58 +00:00
Evan Cheng
082c8785ef
Handle BUILD_VECTOR with all zero elements.
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llvm-svn: 27056
2006-03-24 07:29:27 +00:00
Chris Lattner
f5efddf80b
Gabor points out that we can't spell. :)
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llvm-svn: 27049
2006-03-24 07:12:19 +00:00
Evan Cheng
a91d8a5b43
All v2f64 shuffle cases can be handled.
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llvm-svn: 27044
2006-03-24 06:40:32 +00:00
Evan Cheng
2595a687da
More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd.
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llvm-svn: 27040
2006-03-24 02:58:06 +00:00
Evan Cheng
6afb3c2de7
A new entry
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llvm-svn: 27039
2006-03-24 02:57:03 +00:00
Evan Cheng
d27fb3e85e
Handle more shuffle cases with SHUFP* instructions.
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llvm-svn: 27024
2006-03-24 01:18:28 +00:00
Evan Cheng
f842ea57bb
Typo
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llvm-svn: 26997
2006-03-23 20:26:04 +00:00
Jim Laskey
3c43609f1f
Add support to locate local variables in frames (early version.)
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llvm-svn: 26994
2006-03-23 18:12:57 +00:00
Jim Laskey
cf0166fbeb
Change interface to DwarfWriter.
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llvm-svn: 26991
2006-03-23 18:09:44 +00:00
Chris Lattner
ce0206e119
Fix the encodings of these new instructions, hopefully fixing the JIT
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failures from last night
llvm-svn: 26981
2006-03-23 16:13:50 +00:00
Evan Cheng
82ed4a42f9
Following icc's lead: use movdqa to load / store 128-bit integer vectors
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llvm-svn: 26980
2006-03-23 07:44:07 +00:00
Chris Lattner
6f95ab7abb
Eliminate IntrinsicLowering from TargetMachine.
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Make the CBE and V9 backends create their own, since they're the only ones that use it.
llvm-svn: 26974
2006-03-23 05:43:16 +00:00
Evan Cheng
7055878170
Add v4i32 <-> v4f32 bitconvert patterns.
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llvm-svn: 26969
2006-03-23 02:36:37 +00:00
Evan Cheng
b9b0550dc6
Add 128-bit integer vector load and add (for testing).
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llvm-svn: 26967
2006-03-23 01:57:24 +00:00
Nate Begeman
fb6e02931c
Add support for 8 bit immediates with 16/32 bit cmp instructions
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llvm-svn: 26966
2006-03-23 01:29:48 +00:00
Evan Cheng
021bb7c956
Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do
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64-bit vector shuffle.
llvm-svn: 26964
2006-03-22 22:07:06 +00:00
Evan Cheng
ed794cd27b
SHUFP* are two address code.
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llvm-svn: 26959
2006-03-22 20:08:18 +00:00
Evan Cheng
bc04722860
Some clean up.
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llvm-svn: 26957
2006-03-22 19:22:18 +00:00
Evan Cheng
d4e1557941
- Supposely movlhps is faster / better than unpcklpd.
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- Don't forget pshufd is only available with sse2.
llvm-svn: 26956
2006-03-22 19:16:21 +00:00
Evan Cheng
68ad48bd1a
- Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support
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splat and PSHUFD cases.
- Clean up shuffle / splat matching code.
llvm-svn: 26954
2006-03-22 18:59:22 +00:00
Evan Cheng
8fdbdf20cd
- VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches
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PSHUFD. We can make permutes entries which point to the undef pointing
anything we want.
- Change some names to appease Chris.
llvm-svn: 26951
2006-03-22 08:01:21 +00:00
Evan Cheng
3617caf526
Fix PSHUF* and SHUF* jit code emission problems
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llvm-svn: 26949
2006-03-22 07:10:28 +00:00
Chris Lattner
f5e36c8bc0
fix a warning
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llvm-svn: 26941
2006-03-22 04:18:34 +00:00
Evan Cheng
d097e67544
Some splat and shuffle support.
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llvm-svn: 26940
2006-03-22 02:53:00 +00:00
Evan Cheng
b1d3c64d1f
Add a couple more pseudo instructions.
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llvm-svn: 26939
2006-03-22 02:52:03 +00:00
Evan Cheng
baea59c61c
Didn't mean to check this in. No MMX support yet.
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llvm-svn: 26933
2006-03-21 23:04:23 +00:00
Evan Cheng
d5e905d762
- Use movaps to store 128-bit vector integers.
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- Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd.
llvm-svn: 26932
2006-03-21 23:01:21 +00:00
Chris Lattner
00f4683bf6
These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will.
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llvm-svn: 26930
2006-03-21 20:51:05 +00:00
Evan Cheng
2d819f5fa4
Combine 2 entries
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llvm-svn: 26921
2006-03-21 07:18:26 +00:00
Evan Cheng
aeebc96099
Add a note about x86 register coallescing
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llvm-svn: 26920
2006-03-21 07:12:57 +00:00
Evan Cheng
1208d9179a
- Remove scalar to vector pseudo ops. They are just wrong.
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- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS
and MOVAPD. Mark them as move instructions and *hope* they will be deleted.
llvm-svn: 26919
2006-03-21 07:09:35 +00:00
Evan Cheng
e4d1416239
x86 ISD::SCALAR_TO_VECTOR support.
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llvm-svn: 26911
2006-03-21 00:33:35 +00:00
Evan Cheng
fb872b41c0
Junk unused vector register classes.
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llvm-svn: 26910
2006-03-21 00:30:59 +00:00
Chris Lattner
80b6bd2746
Add a build_vector node
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llvm-svn: 26895
2006-03-20 06:18:01 +00:00
Evan Cheng
e6448448c2
Move a few things around.
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llvm-svn: 26893
2006-03-20 06:04:52 +00:00
Chris Lattner
d16f6fdd49
add a note with a testcase
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llvm-svn: 26877
2006-03-19 22:27:41 +00:00
Evan Cheng
f7c2e3628b
Vector undef's
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llvm-svn: 26870
2006-03-19 09:38:54 +00:00
Evan Cheng
5111c81a3c
Turning on LSR by default
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llvm-svn: 26861
2006-03-19 06:08:49 +00:00
Evan Cheng
66a9c0dea7
Remember which tests are hurt by LSR.
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llvm-svn: 26860
2006-03-19 06:08:11 +00:00
Chris Lattner
f7b6e7212f
rename these nodes
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llvm-svn: 26848
2006-03-19 01:13:28 +00:00
Evan Cheng
9bf978dc20
Use the generic vector register classes VR64 / VR128 rather than V4F32,
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V8I16, etc.
llvm-svn: 26838
2006-03-18 01:23:20 +00:00
Evan Cheng
b09a56f3a4
Darwin should use _setjmp/_longjmp instead of setjmp/longjmp.
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llvm-svn: 26833
2006-03-17 20:31:41 +00:00
Evan Cheng
4f674921d6
Move some pattern fragments to the right files.
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llvm-svn: 26831
2006-03-17 19:55:52 +00:00