5 Commits

Author	SHA1	Message	Date
David Blaikie	a79ac14fa6	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction ... Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794	2015-02-27 21:17:42 +00:00
Rafael Espindola	cca5f562db	Add a cpu to try to bring back the atom bots. ... llvm-svn: 182734	2013-05-27 13:22:52 +00:00
Andrew Trick	8972aba193	Track IR ordering of SelectionDAG nodes 4/4. ... Unit test cases for -pre-RA-sched=source. llvm-svn: 182706	2013-05-25 03:26:51 +00:00
Dan Gohman	40503396da	Eliminate more uses of llvm-as and llvm-dis. ... llvm-svn: 81290	2009-09-08 23:54:48 +00:00
Evan Cheng	5456a37280	Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g. ... vr1024 = extract_subreg vr1025, 1 ... vr1024 = mov8rr AH If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH. llvm-svn: 56118	2008-09-11 20:07:10 +00:00