Commit Graph

104126 Commits

Author SHA1 Message Date
Eric Christopher f438164d30 Remove caching of the subtarget for X86FrameLowering.
llvm-svn: 210290
2014-06-05 22:00:31 +00:00
Eric Christopher c22a04c063 Remove duplicate copy of InstrItineraryData from the TargetMachine,
it's already on the subtarget.

llvm-svn: 210289
2014-06-05 21:42:54 +00:00
Tom Roeder 4b239ed3ec Adding explicit triples to the ARM jumptable tests
llvm-svn: 210288
2014-06-05 21:40:13 +00:00
Rafael Espindola c286f4bf2a Add a testcase where there is an overflow when combining two constants.
I noticed that a proposed optimization would have prevented this.

llvm-svn: 210287
2014-06-05 21:29:49 +00:00
Kevin Enderby 980b25840f Add "-format darwin" to llvm-nm to be like darwin's nm(1) -m output.
This is a first step in seeing if it is possible to make llvm-nm produce
the same output as darwin's nm(1).  Darwin's default format is bsd but its
-m output prints the longer Mach-O specific details.  For now I added the
"-format darwin" to do this (whos name may need to change in the future).
As there are other Mach-O specific flags to nm(1) which I'm hoping to add some
how in the future.  But I wanted to see if I could get the correct output for
-m flag using llvm-nm and the libObject interfaces.

I got this working but would love to hear what others think about this approach
to getting object/format specific details printed with llvm-nm.

llvm-svn: 210285
2014-06-05 21:21:57 +00:00
Bill Schmidt a1184635ce [PPC64LE] Correct vperm -> shuffle transform for little endian
As discussed in cfe commit r210279, the correct little-endian
semantics for the vec_perm Altivec interfaces are implemented by
reversing the order of the input vectors and complementing the permute
control vector.  This converts the desired permute from little endian
element order into the big endian element order that the underlying
PowerPC vperm instruction uses.  This is represented with a
ppc_altivec_vperm intrinsic function.

The instruction combining pass contains code to convert a
ppc_altivec_vperm intrinsic into a vector shuffle operation when the
intrinsic has a permute control vector (mask) that is a constant.
However, the vector shuffle operation assumes that vector elements are
in natural order for their endianness, so for little endian code we
will get the wrong result with the existing transformation.

This patch reverses the semantic change to vec_perm that was performed
in altivec.h by once again swapping the input operands and
complementing the permute control vector, returning the element
ordering to little endian.

The correctness of this code is tested by the new perm.c test added in
a previous patch, and by other tests in the test suite that fail
without this patch.

llvm-svn: 210282
2014-06-05 19:46:04 +00:00
Tom Roeder 544d1c22be Removing spurious dependency of IPO on JumpInstrTables
llvm-svn: 210281
2014-06-05 19:43:57 +00:00
Tom Roeder 44cb65fff1 Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.
It includes a pass that rewrites all indirect calls to jumptable functions to pass through these tables.

This also adds backend support for generating the jump-instruction tables on ARM and X86.
Note that since the jumptable attribute creates a second function pointer for a
function, any function marked with jumptable must also be marked with unnamed_addr.

llvm-svn: 210280
2014-06-05 19:29:43 +00:00
Yaron Keren eadc9b3f88 Document how to select build configuration with Visual C++ IDE or command line.
llvm-svn: 210273
2014-06-05 16:42:26 +00:00
Bill Schmidt 82f9e8a62e [PPC64LE] Temporarily disable VSX support in little-endian mode
This is a preliminary patch for the PowerPC64LE support.  In stage 1
of the vector support, we will support the VMX (Altivec) instruction
set, but will not yet support the VSX instructions.  This is merely a
staging issue to provide functional vector support as soon as
possible.

llvm-svn: 210271
2014-06-05 16:21:13 +00:00
Evgeniy Stepanov 493df136d9 [asancov] Fix coverage line info some more.
Now it should always point to the opening brace of the function (in
-asan-coverage=1 mode).

llvm-svn: 210266
2014-06-05 14:34:45 +00:00
Evgeniy Stepanov bec9dedf78 Add missing const specifier to a const method.
llvm-svn: 210265
2014-06-05 14:32:15 +00:00
Ulrich Weigand 53e8cd3dea XFAIL: test/DebugInfo/missing-abstract-variable.ll on s390x as well
llvm-svn: 210264
2014-06-05 14:20:54 +00:00
Ulrich Weigand 2c356f3a7a [SystemZ] Do not install IfConverter pass at -O0
When not optimizing, do not run the IfConverter pass, this makes
debugging more difficult (and causes a testsuite failure in
DebugInfo/unconditional-branch.ll).

llvm-svn: 210263
2014-06-05 14:20:10 +00:00
Sasa Stankovic 6781426130 [mips] Modify long branch for NaCl:
* Move the instruction that changes sp outside of the branch delay slot.
  * Bundle-align the target of indirect branch.

Differential Revision: http://llvm-reviews.chandlerc.com/D3928

llvm-svn: 210262
2014-06-05 13:52:08 +00:00
Sasa Stankovic 56c12e679a Prevent hoisting the instruction whose def might be clobbered by the terminator.
llvm-svn: 210261
2014-06-05 13:42:48 +00:00
Matheus Almeida 39796a2ec5 [mips] Fix triple.
Mips2 is a 32-bit architecture.

llvm-svn: 210254
2014-06-05 12:07:14 +00:00
Iain Sandoe 5248f9f0a5 lld (build with configur and make) Enable build
r210177 added Makefiles to the lld project. 
This revision enables the automatic build of lld when the sources are found in tools/lld.

llvm-svn: 210245
2014-06-05 08:49:55 +00:00
Matt Arsenault 3e332a4862 R600: Fix test. Using wrong check prefix.
llvm-svn: 210244
2014-06-05 08:00:36 +00:00
Nick Lewycky ff114dae5a Fix coverage for files with global constructors again. Adds a testcase to the commit from r206671, as requested by David Blaikie.
llvm-svn: 210239
2014-06-05 04:31:43 +00:00
David Blaikie 72c3aa39b7 Revert r210221 again, due to a crash Richard Smith has provided involving self-hosting LLVM with libc++.
Test case coming, once I reduce it.

llvm-svn: 210236
2014-06-05 02:04:59 +00:00
David Blaikie 367fb01d70 DebugInfo: Reuse existing LexicalScope to retrieve the scope's MDNode, rather than looking it up through the DebugLoc.
No functional change intended, just streamlines the abstract variable
lookup/construction to use a common entry point.

llvm-svn: 210234
2014-06-05 01:30:50 +00:00
David Blaikie 087e7203a9 DebugInfo: Roll argument insertion into variable insertion to ensure arguments are correctly handled in all cases.
No functional change intended.

llvm-svn: 210233
2014-06-05 01:04:20 +00:00
David Blaikie bb6a4e2fea PR19388: DebugInfo: Emit dead arguments in their originally declared order.
Unused arguments were not being added to the argument list, but instead
treated as arbitrary scope variables. This meant they weren't carefully
added in the original argument order.

In this particular example, though, it turns out the argument is only
/mostly/ unused (well, actually it's entirely used, but in a specific
way). It's a struct that, due to ABI reasons, is decomposed into chunks
(exactly one chunk, since it has one member) and then passed. Since only
one of those chunks is used (SROA, etc, kill the original reconstitution
code) we don't have a location to describe the whole variable.

In this particular case, since the struct consists of just the one int,
once we have partial location information, this should have a location
that describes the entire variable (since the piece is the entirety of
the object).

And at some point we'll need to describe the location of even /entirely/
unused arguments so that they can at least be printed on function entry.

llvm-svn: 210231
2014-06-05 00:51:35 +00:00
Alexey Samsonov ad81f0f419 Use AArch64 instead of now removed ARM64 in test configs
llvm-svn: 210229
2014-06-05 00:25:30 +00:00
David Blaikie 6cfa9e1a6d DebugInfo: Add comments/assert description to r209674 based on Eric Christopher's post-commit review feedback.
llvm-svn: 210228
2014-06-05 00:25:26 +00:00
Eric Christopher 21a5e5c1c7 We've got a getSlotSize call already that we use everywhere else,
use it here too.

llvm-svn: 210227
2014-06-05 00:22:13 +00:00
Matt Arsenault 151304691c R600/SI: Match rsq instructions
llvm-svn: 210226
2014-06-05 00:15:55 +00:00
Eric Christopher 52fa6599e8 80-columns.
llvm-svn: 210224
2014-06-05 00:09:08 +00:00
Eric Christopher 11b05cccfa Remove uses of the TargetMachine from X86FrameLowering.
llvm-svn: 210223
2014-06-05 00:09:05 +00:00
Matt Arsenault c6f338dd5e Use nullptr
llvm-svn: 210222
2014-06-05 00:01:12 +00:00
David Blaikie 36408e7569 DebugInfo: Reapply r209984 (reverted in r210143), asserting that abstract DbgVariables have DIEs.
Abstract variables within abstract scopes that are entirely optimized
away in their first inlining are omitted because their scope is not
present so the variable is never created. Instead, we should ensure the
scope is created so the variable can be added, even if it's been
optimized away in its first inlining.

This fixes the incorrect debug info in missing-abstract-variable.ll
(added in r210143) and passes an asserts self-hosting build, so
hopefully there's not more of these issues left behind... *fingers
crossed*.

llvm-svn: 210221
2014-06-04 23:50:52 +00:00
Nick Lewycky ce98b43316 Explain why we skip DbgInfoIntrinsics when looking at line numbers in .gcno file emission.
llvm-svn: 210218
2014-06-04 21:47:19 +00:00
Hans Wennborg 8e873329a1 Don't emit structors for available_externally globals (PR19933)
We would previously assert here when trying to figure out the section
for the global.

This makes us handle the situation more gracefully since the IR isn't
malformed.

Differential Revision: http://reviews.llvm.org/D4022

llvm-svn: 210215
2014-06-04 21:04:54 +00:00
Rafael Espindola 78598d9ab5 Add a Constant version of stripPointerCasts.
Thanks to rnk for the suggestion.

llvm-svn: 210205
2014-06-04 19:01:48 +00:00
Rafael Espindola 4dc5dfc56b Clauses in a landingpad are always Constant. Use a stricter type.
llvm-svn: 210203
2014-06-04 18:51:31 +00:00
Yaron Keren 2207190cd5 Two small enhancements for the JIT.
When JITting a large project such as Boost it's quite hard to figure out the problematic inline asm without debug location. This patch provides debug location printout before the JIT aborts due to inline asm. printDebugLoc() was exposed from MachineInstr.cpp and reused here.

If the JIT run with debug info, don't bomb on DBG_VALUE but ignore them.

http://reviews.llvm.org/D3416

llvm-svn: 210201
2014-06-04 17:35:28 +00:00
David Blaikie 484610c69b XFAIL: test/DebugInfo/missing-abstract-variable.ll on mips and ppc64 due to an inlined parameter that goes missing.
llvm-svn: 210200
2014-06-04 17:05:23 +00:00
Saleem Abdulrasool 72e9a25c76 tools: fix parenthesis warning from GCC
Add parenthesis as suggested by GCC.

llvm-svn: 210194
2014-06-04 16:03:20 +00:00
Saleem Abdulrasool 8c49170879 tools: fix silly typo in llvm-readobj
Case insensitive case preserving file systems are not a good choice for
development.

llvm-svn: 210193
2014-06-04 16:03:18 +00:00
Saleem Abdulrasool e6971cab30 tools: initial implementation of WoA EH decoding
Add support to llvm-readobj to decode Windows ARM Exception Handling data.  This
uses the previously added datastructures to decode the information into a format
that can be used by tests.  This is a necessary step to add support for emitting
Windows on ARM exception handling information.

A fair amount of formatting inspiration is drawn from the Win64 EH printer as
well as the ARM EHABI printer.  This allows for a reasonably thorough look into
the encoded data.

llvm-svn: 210192
2014-06-04 15:47:15 +00:00
Saleem Abdulrasool 6ba36dc132 tools: introduce StreamWriter::printBoolean
Add a helper print method to print a boolean value as "Yes" or "No".  This is
intended to be used by the Windows ARM EH printer.

llvm-svn: 210191
2014-06-04 15:47:11 +00:00
Saleem Abdulrasool 3b293a1dd5 Support: style/documentation cleanup for format
This is purely a documentation/whitespace cleanup for the format support
functions.

The current style does not duplicate the function/class names in the
documentation; conform to this style.

Additionally, there was a large amount of duplication of comments that added no
real value.  Use block comments for the related sets of functions which are used
for type deduction and parameter container classes.

No functional change.

llvm-svn: 210190
2014-06-04 15:47:07 +00:00
Saleem Abdulrasool 5e1c51edcf Support: add additional comment for ARM EH structure
Replicate the fact that ARM::WinEH::RuntimeFunction purposefully does not merge
functions to accommodate raw data access use cases in tools such as readobj.
Pointed out by Renato during post-commit review.

No functional change.

llvm-svn: 210189
2014-06-04 15:47:04 +00:00
Rafael Espindola 04c2258624 InstCombine: Improvement to check if signed addition overflows.
This patch implements two things:

1. If we know one number is positive and another is negative, we return true as
    signed addition of two opposite signed numbers will never overflow.

2. Implemented TODO : If one of the operands only has one non-zero bit, and if
    the other operand has a known-zero bit in a more significant place than it
    (not including the sign bit) the ripple may go up to and fill the zero, but
    won't change the sign. e.x -  (x & ~4) + 1

We make sure that we are ignoring 0 at MSB.

Patch by Suyog Sarda.

llvm-svn: 210186
2014-06-04 15:39:14 +00:00
Tilmann Scheller 5d8d72c5df [AArch64] clang-format the load/store optimizer.
No change in functionality.

llvm-svn: 210182
2014-06-04 12:40:35 +00:00
Tilmann Scheller 4aad3bd6ac [AArch64] Fix some LLVM Coding Standards violations in the load/store optimizer.
Variable names should start with an upper case letter.

No change in functionality.

llvm-svn: 210181
2014-06-04 12:36:28 +00:00
Patrik Hagglund 3154171d2d Fix gcc -Wparentheses warning.
llvm-svn: 210178
2014-06-04 11:21:11 +00:00
Nick Lewycky 0a9a866ce1 Fix a use of uninitialized value. OldCC is set when IsCmpZero || IsSwapped and read when ShouldUpdateCC || IsSwapped, and ShouldUpdateCC is independent. Fixes PR19932, but no test since I wasn't able to get any symptoms to appear, not even with valgrind and the testcase from the PR. It's clear what happened from inspection of the code.
llvm-svn: 210168
2014-06-04 07:45:54 +00:00
Andrew Trick 8d2ee37f31 Add a subtarget hook: enablePostMachineScheduler.
As requested by AArch64 subtargets.

Note that this will have no effect until the
AArch64 target actually enables the pass like this:
substitutePass(&PostRASchedulerID, &PostMachineSchedulerID);

As soon as armv7 switches over, PostMachineScheduler will become the
default postRA scheduler, so this won't be necessary any more.
Targets using the old postRA schedule would then do:
substitutePass(&PostMachineSchedulerID, &PostRASchedulerID);

llvm-svn: 210167
2014-06-04 07:06:27 +00:00