36b1f5476e
Instructions with unique labels or embedded jumptables cannot be duplicated during ifcvt.
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llvm-svn: 37606
2007-06-15 21:15:00 +00:00
297d43be00
Added CanBeDuplicated(). It returns true if an instruction can be safely duplicated (e.g. during ifcvt).
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llvm-svn: 37605
2007-06-15 21:13:54 +00:00
a575a7dfda
test case for annotate attribute
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llvm-svn: 37604
2007-06-15 20:52:47 +00:00
cb1b96047d
Add local var annotation intrinsic.
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llvm-svn: 37603
2007-06-15 20:50:54 +00:00
00cb117b07
Fold a binary operator with constant operands when expanding code for a SCEV.
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llvm-svn: 37602
2007-06-15 19:21:55 +00:00
f852e339b6
Fix CodeGen/X86/inline-asm-x-scalar.ll:test4, by retaining regclass info
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for tied register constraints.
llvm-svn: 37601
2007-06-15 19:11:01 +00:00
2d7f447a7a
make this test harder, include a tied register.
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llvm-svn: 37600
2007-06-15 19:09:53 +00:00
234a90e83e
MachineInstr::isPredicable() is no longer needed.
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llvm-svn: 37599
2007-06-15 19:06:07 +00:00
32312ad370
No longer needed.
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llvm-svn: 37598
2007-06-15 19:05:13 +00:00
92bf2c628c
Workaround for PR1508.
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llvm-svn: 37597
2007-06-15 19:04:19 +00:00
203a035251
Use SCEVConstant::get instead of SCEVUnknown::get to create an
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integer constant SCEV.
llvm-svn: 37596
2007-06-15 18:00:55 +00:00
acaed06827
Fix test/Transforms/GVNPRE/2007-06-15-Looping.ll
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llvm-svn: 37595
2007-06-15 17:55:15 +00:00
ad9743225e
Add a testcase where GVNPRE what getting confused by a loop.
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llvm-svn: 37594
2007-06-15 17:54:05 +00:00
cd5f5e3ecd
Extra edges are deleted later if needed.
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llvm-svn: 37593
2007-06-15 17:34:48 +00:00
8e21e69efb
Use "ignore" rather than grep tricks.
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llvm-svn: 37592
2007-06-15 17:13:53 +00:00
cb9e09ad57
Add a SCEV class and supporting code for sign-extend expressions.
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This created an ambiguity for expandInTy to decide when to use
sign-extension or zero-extension, but it turns out that most of its callers
don't actually need a type conversion, now that LLVM types don't have
explicit signedness. Drop expandInTy in favor of plain expand, and change
the few places that actually need a type conversion to do it themselves.
llvm-svn: 37591
2007-06-15 14:38:12 +00:00
92fb5453c3
Allow small blocks to be duplicated to enable if-conversion.
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llvm-svn: 37590
2007-06-15 07:36:12 +00:00
373389260f
Generalize many transforms to work on ~ of vectors in addition to ~ of
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integer ops. This implements Transforms/InstCombine/and-or-not.ll
test3/test4, and finishes off PR1510
llvm-svn: 37589
2007-06-15 06:23:19 +00:00
9923af42cf
add vector versions of this test
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llvm-svn: 37588
2007-06-15 06:22:32 +00:00
ce4d2dd644
m_not should match vector not
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llvm-svn: 37587
2007-06-15 06:13:47 +00:00
72e3958003
add a Constant::getAllOnesValue helper function, which works on integers
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AND vectors.
llvm-svn: 37586
2007-06-15 06:10:53 +00:00
1edec381a5
Enhance BinaryOperator::isNot to support vector not.
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llvm-svn: 37585
2007-06-15 06:04:24 +00:00
481e28b1f5
Implement two xforms:
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1. ~(~X | Y) === (X & ~Y)
2. (A|B) & ~(A&B) -> A^B
This allows us to transform ~(~(a|b) | (a&b)) -> a^b.
This implements PR1510 for scalar values.
llvm-svn: 37584
2007-06-15 05:58:24 +00:00
a8de4cccd9
testcase for PR1510
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llvm-svn: 37583
2007-06-15 05:57:20 +00:00
f14e5175ed
delete some obviously dead vector operations, which deletes a few thousand
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operations from Duraids example.
llvm-svn: 37582
2007-06-15 05:26:55 +00:00
add977670f
No really, clear predcessors states.
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llvm-svn: 37581
2007-06-14 23:34:09 +00:00
9fc56c079d
If BB is predicated, invalidate its predecessor(s) which would if-convert it. It needs to be re-analyzed.
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llvm-svn: 37580
2007-06-14 23:13:19 +00:00
5c4413120f
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
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llvm-svn: 37579
2007-06-14 22:58:02 +00:00
616627b002
Do not treat FP_REG_KILL as terminator in branch analysis (X86).
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llvm-svn: 37578
2007-06-14 22:03:45 +00:00
e08f0eefa6
Fix typo.
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llvm-svn: 37577
2007-06-14 21:26:08 +00:00
4a4a8eb00e
Add a target hook to allow loads from constant pools to be rematerialized, and an
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implementation for x86.
llvm-svn: 37576
2007-06-14 20:50:44 +00:00
1e6f08b2a2
Fix some stupid bugs that have effectively disabled if-conversion.
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llvm-svn: 37575
2007-06-14 20:28:52 +00:00
3a8e2a8b2f
Eliminate some redundant newlines in asm output.
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llvm-svn: 37574
2007-06-14 15:00:27 +00:00
40f775bf67
Fix typos.
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llvm-svn: 37573
2007-06-14 11:27:07 +00:00
f274efef9f
Add support to tablegen for specifying subregister classes on a per register class basis.
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llvm-svn: 37572
2007-06-13 22:20:15 +00:00
c68554683d
Handle blocks with 2 unconditional branches in AnalyzeBranch.
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llvm-svn: 37571
2007-06-13 17:59:52 +00:00
7413736a7e
Only correctly lower exception handing intrinsics if exception handling is
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turned on. Likewise for scanning of invokes to mark landing pads.
llvm-svn: 37570
2007-06-13 16:53:21 +00:00
26455c4ae0
Introduce new SelectionDAG node opcodes VEXTRACT_SUBVECTOR and
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VCONCAT_VECTORS. Use these for CopyToReg and CopyFromReg legalizing in
the case that the full register is to be split into subvectors instead
of scalars. This replaces uses of VBIT_CONVERT to present values as
vector-of-vector types in order to make whole subvectors accessible via
BUILD_VECTOR and EXTRACT_VECTOR_ELT.
This is in preparation for adding extended ValueType values, where
having vector-of-vector types is undesirable.
llvm-svn: 37569
2007-06-13 15:12:02 +00:00
cbd51c8b60
When creating CopyFromReg nodes, always use legal types. And use the
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correct types for the result vector, even though it is currently bitcasted
to a different type immediately.
llvm-svn: 37568
2007-06-13 14:55:16 +00:00
97f7236e70
The fix that was applied for PR1224 stops the compiler
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crashing but breaks exception handling. The problem
described in PR1224 is that invoke is a terminator that
can produce a value. The value may be needed in other
blocks. The code that writes to registers values needed
in other blocks runs before terminators are lowered (in
this case invoke) so asserted because the value was not
yet available. The fix that was applied was to do invoke
lowering earlier, before writing values to registers.
The problem this causes is that the code to copy values
to registers can be output after the invoke call. If
an exception is raised and control is passed to the
landing pad then this copy-code will never execute. If
the value is needed in some code path reached via the
landing pad then that code will get something bogus.
So revert the original fix and simply skip invoke values
in the general copying to registers code. Instead copy
the invoke value to a register in the invoke lowering code.
llvm-svn: 37567
2007-06-13 05:51:31 +00:00
cbaaff58bf
Typo
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llvm-svn: 37566
2007-06-13 00:04:00 +00:00
9acfa7b063
Now if-converting all 4 variants of triangles.
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llvm-svn: 37565
2007-06-12 23:54:05 +00:00
4036ad485f
Fix test/Transforms/GVNPRE/2007-06-12-PhiTranslate.ll
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llvm-svn: 37564
2007-06-12 22:43:57 +00:00
b1c82db828
Add a test where phi translation was producing a null result.
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llvm-svn: 37563
2007-06-12 22:42:35 +00:00
149a7616dc
isReachableFromEntry() is not suitable for post dominator.
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llvm-svn: 37562
2007-06-12 17:50:25 +00:00
47419ee142
Remove redundant check.
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llvm-svn: 37561
2007-06-12 17:35:20 +00:00
2f9d2bcb19
Protect updateDFSNumbers()
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llvm-svn: 37560
2007-06-12 17:30:56 +00:00
dcf0c03ff7
Check A dominates B and vise versa first while searching for nearest
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common dominator.
llvm-svn: 37559
2007-06-12 17:17:57 +00:00
2150cde0e4
one final bugfix
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llvm-svn: 37558
2007-06-12 17:01:15 +00:00
2b0bf4fc3b
modernize example
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llvm-svn: 37557
2007-06-12 17:00:26 +00:00
Evan Cheng