Commit Graph

2470 Commits

Author SHA1 Message Date
Uday Bondhugula 01d97a3549 [MLIR] Add support to use aligned_alloc to lower AllocOp from std to llvm
Support to recognize and deal with aligned_alloc was recently added to
LLVM's TLI/MemoryBuiltins and its various optimization passes. This
revision adds support for generation of aligned_alloc's when lowering
AllocOp from std to LLVM. Setting 'use-aligned_alloc=1' will lead to
aligned_alloc being used for all heap allocations. An alignment and size
that works with the constraints of aligned_alloc is chosen.

Using aligned_alloc is preferable to "using malloc and adjusting the
allocated pointer to align for indexing" because the pointer access
arithmetic done for the latter only makes it harder for LLVM passes to
deal with for analysis, optimization, attribute deduction, and rewrites.

Differential Revision: https://reviews.llvm.org/D77528
2020-04-08 15:10:19 +05:30
River Riddle 1834ad4a69 [mlir][Pass] Update the PassGen to generate base classes instead of utilities
Summary:
This is much cleaner, and fits the same structure as many other tablegen backends. This was not done originally as the CRTP in the pass classes made it overly verbose/complex.

Differential Revision: https://reviews.llvm.org/D77367
2020-04-07 14:08:52 -07:00
River Riddle 80aca1eaf7 [mlir][Pass] Remove the use of CRTP from the Pass classes
This revision removes all of the CRTP from the pass hierarchy in preparation for using the tablegen backend instead. This creates a much cleaner interface in the C++ code, and naturally fits with the rest of the infrastructure. A new utility class, PassWrapper, is added to replicate the existing behavior for passes not suitable for using the tablegen backend.

Differential Revision: https://reviews.llvm.org/D77350
2020-04-07 14:08:52 -07:00
River Riddle 722f909f7a [mlir][Pass][NFC] Replace usages of ModulePass with OperationPass<ModuleOp>
ModulePass doesn't provide any special utilities and thus doesn't give enough benefit to warrant a special pass class. This revision replaces all usages with the more general OperationPass.

Differential Revision: https://reviews.llvm.org/D77339
2020-04-07 14:08:52 -07:00
Jacques Pienaar 3f7439b280 [mlir][DRR] Add location directive
Summary:
Add directive to indicate the location to give to op being created. This
directive is optional and if unused the location will still be the fused
location of all source operations.

Currently this directive only works with other op locations, reusing an
existing op location or a fusion of op locations. But doesn't yet support
supplying metadata for the FusedLoc.

Based off initial revision by antiagainst@ and effectively mirrors GlobalIsel
debug_locations directive.

Differential Revision: https://reviews.llvm.org/D77649
2020-04-07 13:38:25 -07:00
Stella Laurenzo f5deb0878d Remove FxpMathOps dialect and Quantizer tool.
Summary:
* Removal of FxpMathOps was discussed on the mailing list.
* Will send a courtesy note about also removing the Quantizer (which had some dependencies on FxpMathOps).
* These were only ever used for experimental purposes and we know how to get them back from history as needed.
* There is a new proposal for more generalized quantization tooling, so moving these older experiments out of the way helps clean things up.

Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, grosul1, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77479
2020-04-07 13:22:39 -07:00
River Riddle c0a33aaa80 [mlir][Diagnostic] Don't store Operation arguments as a DiagnosticArgument
Summary: Diagnostics may be cached in the parallel diagnostic handler to preserve proper ordering. Storing the Operation as a DiagnosticArgument is problematic as the operation may be erased or changed before it finally gets printed.

Differential Revision: https://reviews.llvm.org/D77675
2020-04-07 12:49:06 -07:00
Uday Bondhugula 7023f4b4cb [MLIR] Introduce std.alloca op
Introduce the alloca op for stack memory allocation. When converting to the
LLVM dialect, this is lowered to an llvm.alloca. Refactor the std to
llvm conversion for alloc op to reuse with alloca. Drop useAlloca option
with alloc op lowering.

Differential Revision: https://reviews.llvm.org/D76602
2020-04-07 15:45:07 +05:30
Uday Bondhugula 70da33bf30 [MLIR] fix/update affine data copy utility for max/min bounds
Fix point-wise copy generation to work with bounds that have max/min.
Change structure of copy loop nest to use absolute loop indices and
subtracting base from the indexes of the fast buffers. Update supporting
utilities: Fix FlatAffineConstraints::getLowerAndUpperBound to look at
equalities as well and for a missing division. Update unionBoundingBox
to not discard common constraints (leads to a tighter system). Update
MemRefRegion::getConstantBoundingSizeAndShape to add memref dimension
constraints. Run removeTrivialRedundancy at the end of
MemRefRegion::compute.  Run single iteration loop promotion and
load/store canonicalization after affine data copy (in its test pass as
well).

Differential Revision: https://reviews.llvm.org/D77320
2020-04-07 13:55:42 +05:30
River Riddle ae9edbcea2 [mlir][AsmPrinter] Change value numbering for local scope to be the next isolated operation.
Summary: This revision updates the value numbering when printing to number from the next parent operation that is isolated from above. This is the highest level to number from that still ensures thread-safety. This revision also changes the behavior of Operator::operator<< to use local scope to avoid thread races when numbering operations.

Differential Revision: https://reviews.llvm.org/D77525
2020-04-06 11:09:29 -07:00
Nicolas Vasilache 8f229989d5 [mlir][Linalg] Add a linalg.tensor_reshape to operate on tensors
Summary:
This revision adds a tensor_reshape operation that operates on tensors.
In the tensor world the constraints are less stringent and we can allow more
arbitrary dynamic reshapes, as long as they are contractions.

The expansion of a dynamic dimension into multiple dynamic dimensions is under-specified and is punted on for now.

Differential Revision: https://reviews.llvm.org/D77360
2020-04-06 11:19:17 -04:00
Alexander Belyaev c2d03e4ef1 [MLIR] Change return type of ParallelOp::getInductionVars to ValueRange.
The current return type sometimes leads to code like
to_vector<2>(ValueRange(loop.getInductionIvs())). It would be nice to
shorten it. Users who need access to Block::BlockArgListType (if there
are any), can always call getBody()->getArguments(); if needed.

Also remove getNumInductionVars(), since there is getNumLoops().

Differential Revision: https://reviews.llvm.org/D77526
2020-04-06 10:11:02 +02:00
River Riddle 74d44c43e8 [mlir] Refactor and cleanup the translation facilities.
Summary:
This revision performs several cleanups on the translation infra:
* Removes the TranslateCLParser library and consolidates into Translation
  - This was a weird library that existed in Support, and didn't really justify being a standalone library.
* Cleans up the internal registration and consolidates all of the translation functions within one registry.

Differential Revision: https://reviews.llvm.org/D77514
2020-04-05 16:21:21 -07:00
Uday Bondhugula 3f9cdd44d7 [MLIR] Add pattern rewriter util to erase block; remove dead else
Add a pattern rewriter utility to erase blocks (while notifying the
pattern rewriting driver of the erased ops). Use this to remove trivial
else blocks in affine.if ops.

Differential Revision: https://reviews.llvm.org/D77083
2020-04-05 19:24:43 +05:30
Alexander Belyaev 51e3709c2b [MLIR] Don't insert YieldOp for non-void loop.for by default.
The ForOp::build ensures that there is a block terminator which is great for
the default use case when there are no iter_args and loop.for returns no
results.  In non-zero results case we always need to call replaceOpWithNewOp
which is not the nicest thing in the world. We can stop inserting YieldOp when
iter_args is non-empty. IfOp::build already behaves similarly.
2020-04-05 11:48:22 +02:00
River Riddle 0359b86d8b [mlir][ODS] Add support for variadic regions.
Summary: This revision adds support for marking the last region as variadic in the ODS region list with the VariadicRegion directive.

Differential Revision: https://reviews.llvm.org/D77455
2020-04-05 01:03:38 -07:00
Kazuaki Ishizaki 5aacce3db2 [mlir] NFC: Fix trivial typo
Differential Revision: https://reviews.llvm.org/D77473
2020-04-05 11:30:30 +09:00
River Riddle e3bb36370d [mlir][DeclarativeParser] Emit an error if a `:` follows an attribute with a non-constant type.
Summary: The attribute grammar includes an optional trailing colon type, so for attributes without a constant buildable type this will generally lead to unexpected and undesired behavior. Given that, it's better to just error out on these cases.

Differential Revision: https://reviews.llvm.org/D77293
2020-04-03 19:23:56 -07:00
River Riddle 79afdfab9a [mlir] Change the default of `mlir-print-op-on-diagnostic` to true
Summary: It is a very common user trap to think that the location printed along with the diagnostic is the same as the current operation that caused the error. This revision changes the behavior to always print the current operation, except for when diagnostics are being verified. This is achieved by moving the command line flags in IR/ to be options on the MLIRContext.

Differential Revision: https://reviews.llvm.org/D77095
2020-04-03 19:02:51 -07:00
Alex Zinenko f27f1e8c27 [mlir] DialectConversion: support block creation in ConversionPatternRewriter
PatternRewriter and derived classes provide a set of virtual methods to
manipulate blocks, which ConversionPatternRewriter overrides to keep track of
the manipulations and undo them in case the conversion fails. However, one can
currently create a block only by splitting another block into two. This not
only makes the API inconsistent (`splitBlock` is allowed in conversion
patterns, but `createBlock` is not), but it also make it impossible for one to
create blocks with argument lists different from those of already existing
blocks since in-place block updates are not supported either. Such
functionality precludes dialect conversion infrastructure from being used more
extensively on region-containing ops, for example, for value-returning "if"
operations. At the same time, ConversionPatternRewriter already allows one to
undo block creation as block creation is one of the primitive operations in
already supported region inlining.

Support block creation in conversion patterns by hooking `createBlock` on the
block action undo mechanism. This requires to make `Builder::createBlock`
virtual, similarly to Op insertion. This is a minimal change to the Builder
infrastructure that will later help support additional use cases such as block
signature changes. `createBlock` now additionally takes the types of the block
arguments that are added immediately so as to avoid in-place argument list
manipulation that would be illegal in conversion patterns.
2020-04-03 20:30:03 +02:00
Benjamin Kramer 71305033d1 [LoopOps] Return ArrayRefs from accessors instead of iterator_ranges
Same funcitonality, but a bit friendlier for users passing it along to
APIs that take ArrayRefs.
2020-04-03 17:13:22 +02:00
Alex Grosul 3a5192098c [mlir][VectorOps] Implement canonicalization for TransposeOp.
Two back-to-back transpose operations are combined into a single transpose, which uses a combination of their permutation vectors.

Differential Revision: https://reviews.llvm.org/D77331
2020-04-02 18:36:40 -07:00
Nicolas Vasilache aef0877b1b [mlir][Linalg] NFC - Rename Linalg and Vector EDSCs to avoid collisions
A certain number of EDSCs have a named form (e.g. `linalg.matmul`) and a generic form (e.g. `linalg.generic` with matmul traits).
Despite living in different namespaces, using the same name is confusiong in clients.
Rename them as `linalg_matmul` and `linalg_generic_matmul` respectively.
2020-04-02 21:09:49 -04:00
Alex Zinenko 0a2131b7e2 [mlir] LLVMFuncOp: provide a capability to pass attributes through to LLVM IR
Summary:
LLVM IR functions can have arbitrary attributes attached to them, some of which
affect may affect code transformations. Until we can model all attributes
consistently, provide a pass-through mechanism that forwards attributes from
the LLVMFuncOp in MLIR to LLVM IR functions during translation. This mechanism
relies on LLVM IR being able to recognize string representations of the
attributes and performs some additional checking to avoid hitting assertions
within LLVM code.

Differential Revision: https://reviews.llvm.org/D77072
2020-04-02 12:52:46 +02:00
Uday Bondhugula 5e8093134a [MLIR] Add method to drop duplicate result exprs from AffineMap
Add a method that given an affine map returns another with just its unique
results. Use this to drop redundant bounds in max/min for affine.for. Update
affine.for's canonicalization pattern and createCanonicalizedForOp to use
this.

Differential Revision: https://reviews.llvm.org/D77237
2020-04-02 03:00:19 +05:30
River Riddle 8bf1583b71 [mlir] Move LLVMPassIncGen to LLVMIR/Transforms/CMakeLists.txt
This fixes a build error with the make generator for a missing
sub-directory.
2020-04-01 14:10:05 -07:00
Uday Bondhugula 68316afb29 [MLIR][NFC] loop transforms/analyis utils cleanup / modernize
Modernize/cleanup code in loop transforms utils - a lot of this code was
written prior to the currently available IR support / code style. This
patch also does some variable renames including inst -> op, comment
updates, turns getCleanupLoopLowerBound into a local function.

Differential Revision: https://reviews.llvm.org/D77175
2020-04-01 22:36:25 +05:30
Tres Popp a67cd71acd [MLIR] Implement LoopLikeInterface for loop.parallel
Summary:
This is to allow optimizations like loop invariant code motion to work
on the ParallelOp.

Additional small cleanup on the ForOp implementation of
LoopLikeInterface and the test file of loop-invariant-code-motion.

Differential Revision: https://reviews.llvm.org/D77128
2020-04-01 16:47:57 +02:00
River Riddle 9be4be3e53 [mlir][Pass] Add support for generating pass documention from the tablegen definition
Summary:
This revision adds support for auto-generating pass documentation, replacing the need to manually keep Passes.md up-to-date. This matches the behavior already in place for dialect and interface documentation.

Differential Revision: https://reviews.llvm.org/D76660
2020-04-01 02:10:46 -07:00
River Riddle 9a277af2d4 [mlir][Pass] Add support for generating pass utilities via tablegen
This revision adds support for generating utilities for passes such as options/statistics/etc. that can be inferred from the tablegen definition. This removes additional boilerplate from the pass, and also makes it easier to remove the reliance on the pass registry to provide certain things(e.g. the pass argument).

Differential Revision: https://reviews.llvm.org/D76659
2020-04-01 02:10:46 -07:00
River Riddle 3dddd8969f [mlir][Pass] Move the registration of conversion passes to tablegen
This removes the need to statically register conversion passes, and also puts all of the conversions within one centralized file.

Differential Revision: https://reviews.llvm.org/D76658
2020-04-01 02:10:46 -07:00
River Riddle e3d834a54a [mlir][Pass] Move the registration of dialect passes to tablegen
This generates a Passes.td for all of the dialects that have transformation passes. This removes the need for global registration for all of the dialect passes.

Differential Revision: https://reviews.llvm.org/D76657
2020-04-01 02:10:46 -07:00
River Riddle 8155e41ac6 [mlir][Pass] Add a tablegen backend for defining Pass information
This will greatly simplify a number of things related to passes:
* Enables generation of pass registration
* Enables generation of boiler plate pass utilities
* Enables generation of pass documentation

This revision focuses on adding the basic structure and adds support for generating the registration for passes in the Transforms/ directory. Future revisions will add more support and move more passes over.

Differential Revision: https://reviews.llvm.org/D76656
2020-04-01 02:10:46 -07:00
Ulysse Beaugnon 49af380942 Add a method to build affine maps with zero or more results.
Summary:
The commit provides a single method to build affine maps with zero or more
results. Users of mlir::AffineMap previously had to dispatch between two methods
depending on the number of results.

At the same time, this commit fixes the method for building affine map with zero
results that was previously ignoring its `symbolCount` argument.

Differential Revision: https://reviews.llvm.org/D77126
2020-04-01 10:47:18 +02:00
Tres Popp 90b7bbffdd [MLIR] Rename collapsePLoops -> collapseParallelLoops
Summary:
Additionally, NFC code cleanups were done.

This is to address additional comments on
https://reviews.llvm.org/D76363

Differential Revision: https://reviews.llvm.org/D77052
2020-04-01 10:15:13 +02:00
Tres Popp 61bab7c31a [MLIR] Replace OpBuilder(Block) with atBlockBegin and atBlockEnd
Summary:
OpBuilder(Block) is specifically replaced with
OpBuilder::atBlockEnd(Block);

This is to make insertion behavior clear due to there being no one
correct answer for which location in a block the default insertion
point should be.

Differential Revision: https://reviews.llvm.org/D77060
2020-04-01 10:06:41 +02:00
Hanhan Wang 6dd696ae4f [mlir][Linalg] Extend fusion to support WAW atm on buffers.
Summary:
The RAW fusion happens only if the produecer block dominates the consumer block.
The WAW pattern also works with the precondition. I.e., if a producer can
dominate the consumer, they can fairly fuse together.

Since they are all tilable, we can think the pattern like this way:

Input:
```
linalg_op1 view

tile_loop
  subview_2
  linalg_op2 subview_2
```

Tile the first Linalg op as same as the second Linalg.
```
tile_loop
  subview_1
  linalg_op1 subview_1

tile_loop
  subview_2
  liangl_op2 subview_2
```

Since the first Linalg op is tilable in the same way and the computation are
independently, it's fair to fuse it with the second Linalg op.
```
tile_loop
  subview_1
  linalg_op1 subview_1
  linalg_op2 subview_2
```

In short, this patch includes:
- Handling both RAW and WAW pattern.
- Adding a interface method to get input and output buffers.
- Exposing a method to get a StringRef of a dependency type.
- Fixing existing WAW tests and add one more use case: initialize the buffer
  before conv op.

Differential Revision: https://reviews.llvm.org/D76897
2020-03-31 21:33:50 -07:00
Hanhan Wang 69ddee1d2a [mlir][Linalg] Introduce linalg.pooling_min/max/sum op.
Summary:
Performs an N-D pooling operation similarly to the description in the TF
documentation:
https://www.tensorflow.org/api_docs/python/tf/nn/pool

Different from the description, this operation doesn't perform on batch and
channel. It only takes tensors of rank `N`.

```
  output[x[0], ..., x[N-1]] =
    REDUCE_{z[0], ..., z[N-1]}
      input[
            x[0] * strides[0] - pad_before[0] + dilation_rate[0]*z[0],
            ...
            x[N-1]*strides[N-1] - pad_before[N-1] + dilation_rate[N-1]*z[N-1]
            ],
```

The required optional arguments are:
  - strides: an i64 array specifying the stride (i.e. step) for window
    loops.
  - dilations: an i64 array specifying the filter upsampling/input
    downsampling rate
  - padding: an i64 array of pairs (low, high) specifying the number of
    elements to pad along a dimension.

If strides or dilations attributes are missing then the default value is
one for each of the input dimensions. Similarly, padding values are zero
for both low and high in each of the dimensions, if not specified.

Differential Revision: https://reviews.llvm.org/D76414
2020-03-31 21:21:54 -07:00
Alex Grosul 855e738be2 [VectorOps] Implement a simple folder for identity vector.transpose operations.
Differential Revision: https://reviews.llvm.org/D77088
2020-03-31 17:03:10 -07:00
Lei Zhang ee77607ca6 [mlir][spirv] Include SPIR-V op definitions in main SPIR-V doc
Differential Revision: https://reviews.llvm.org/D77174
2020-03-31 18:29:17 -04:00
Lei Zhang d26435c170 [mlir][spirv] Change op doc description autogen separator
This commit changes the separator line for dividing auto-generated
docs from spec and manually added appendix from "### Custom assembly
form" to "<!-- End of AutoGen section -->". This is in preparation
to use the declarative assembly form in MLIR core. We will replace
more and more manually written assembly forms to be autogenerated.

Differential Revision: https://reviews.llvm.org/D77158
2020-03-31 15:28:06 -04:00
Andy Davis 31a346cc35 [MLIR][Vector] Add support for TupleGetOp folding through InsertSlicesOp and ExtractSlicesOp.
Summary:
Add support for TupleGetOp folding through InsertSlicesOp and ExtractSlicesOp.
Vector-to-vector transformations for unrolling and lowering to hardware vectors
can generate chains of structured vector operations (InsertSlicesOp,
ExtractSlicesOp and ShapeCastOp) between the producer of a hardware vector
value and its consumer. Because InsertSlicesOp, ExtractSlicesOp and ShapeCastOp
are structured, we can track the location (tuple index and vector offsets) of
the consumer vector value through the chain of structured operations to the
producer, enabling a much more powerful producer-consumer fowarding of values
through structured ops and tuple, which in turn enables a more powerful
TupleGetOp folding transformation.

Reviewers: nicolasvasilache, aartbik

Reviewed By: aartbik

Subscribers: grosul1, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76889
2020-03-31 08:39:17 -07:00
Mehdi Amini bab5bcf8fd Add a flag on the context to protect against creation of operations in unregistered dialects
Differential Revision: https://reviews.llvm.org/D76903
2020-03-30 19:37:31 +00:00
Uday Bondhugula f273e5c507 [MLIR] Fix permuteLoops utility
Rewrite mlir::permuteLoops (affine loop permutation utility) to fix
incorrect approach. Avoiding using sinkLoops entirely - use single move
approach. Add test pass.

This fixes https://bugs.llvm.org/show_bug.cgi?id=45328

Depends on D77003.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D77004
2020-03-30 23:38:23 +05:30
River Riddle 16f27b70a5 [mlir][NFC] Update dialect/op documentation to be consistent
Summary:
This revision performs a lot of different cleanups on operation documentation to ensure that they are consistent, e.g. using mlir code blocks, formatting, etc.

This revision also includes the auto-generated documentation into the hand-written documentation for the dialects that have a specific top-level dialect file. This updates the documentation for all dialects aside from SPIRV and STD. These dialects will be updated in a followup.

Differential Revision: https://reviews.llvm.org/D76734
2020-03-29 22:02:23 -07:00
River Riddle f86104bb68 [mlir][NFC] Use the auto-generated op documentation in the standard dialect documentation
Summary: This revision updates the dialect documentation to use the auto-generated markdown for operations. This allows for updating some out-of-date bits of documentation, and allows for displaying a large of number of newly added operations that did not have a counter part in Standard.md.

Differential Revision: https://reviews.llvm.org/D76743
2020-03-29 21:53:40 -07:00
River Riddle 3d44f48edc [mlir][Diagnostics] Don't print note source line if it is the same as the previous diagnostic
Summary: This revision updates the SourceMgrDiagnosticHandler to not print the source location of a note if it is the same location as the previously printed diagnostic. This helps avoid redundancy, and potential confusion, when looking at the diagnostic output.

Differential Revision: https://reviews.llvm.org/D76787
2020-03-29 21:43:44 -07:00
Uday Bondhugula 4e4ea2cde4 [MLIR] Add missing asserts in interchangeLoops util, doc comment update
Add missing assert checks for input to mlir::interchangeLoops utility.
Rename interchangeLoops -> permuteLoops; update doc comments to clarify
inputs / return val. Other than the assert checks, this is NFC.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D77003
2020-03-30 00:03:12 +05:30
Kazuaki Ishizaki b632bd88a6 [mlir] NFC: fix trivial typo in documents
Reviewers: mravishankar, antiagainst, nicolasvasilache, herhut, aartbik, mehdi_amini, bondhugula

Reviewed By: mehdi_amini, bondhugula

Subscribers: bondhugula, jdoerfert, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, bader, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76993
2020-03-30 00:34:23 +09:00
Aaron Smith 6dab806712 [mlir] Add exp2 conversion to llvm.intr.exp2 2020-03-29 01:23:08 -07:00