Commit Graph

200114 Commits

Author SHA1 Message Date
Ahmed Bougacha e8d0c4ccea [ARM][FastISel] Use TST #1 instead of CMP #0 for select.
Since r234249, i1 are sext instead of zext; because of that, doing
"CMP rN, #0; IT EQ/NE" isn't correct anymore.

"TST #1" is the conservatively correct alternative - the tradeoff being
that it doesn't have a 16-bit encoding -, so use that instead.

llvm-svn: 236569
2015-05-06 04:14:02 +00:00
Sanjoy Das 77b16b78e9 [Statepoints] Remove broken test case.
statepoint-indirect-return.ll breaks on linux systems.  Delete the test
case to make the bots green while I figure out what the right fix is.

llvm-svn: 236568
2015-05-06 02:51:46 +00:00
Sanjoy Das 63245b5d3c [IRBuilder] Fix indentation. NFC.
Whitespace-only change.

llvm-svn: 236567
2015-05-06 02:36:34 +00:00
Sanjoy Das 4bfb472072 [Statepoint] Clean up StatepointLowering: symbolic constants.
For accessors in the `Statepoint` class, use symbolic constants for
offsets into the argument vector instead of literals.  This makes the
code intent clearer and simpler to change.

llvm-svn: 236566
2015-05-06 02:36:31 +00:00
Sanjoy Das b023d06bb0 [Statepoint] Clean up Statepoint.h: clang-format.
llvm-svn: 236565
2015-05-06 02:36:28 +00:00
Sanjoy Das 499d703f52 [Statepoint] Clean up Statepoint.h: accessor names.
Use getFoo() as accessors consistently and some other naming changes.

llvm-svn: 236564
2015-05-06 02:36:26 +00:00
Sanjoy Das c6bf3e9f12 [StatepointLowering] Don't create temporary instructions. NFCI.
Summary:
Instead of creating a temporary call instruction and lowering that, use
SelectionDAGBuilder::lowerCallOperands.

Reviewers: reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9480

llvm-svn: 236563
2015-05-06 02:36:20 +00:00
Ahmed Bougacha 5191911a57 Revert "[analyzer] scan-build: support spaces in compiler path and arguments."
This reverts commit r236423 and its followup r236533, as indiscriminate
quoting makes for too much quoting (and clang doesn't like both '"-c"'
and -D"FOO=bar").

llvm-svn: 236562
2015-05-06 02:08:27 +00:00
Ahmed Bougacha ed363c5dcb [WinEH] Reset WinEHPrepare::SEHExceptionCodeSlot when we're done.
This caused a use-after-free on test/CodeGen/X86/win32-eh.ll
No functional change intended.

llvm-svn: 236561
2015-05-06 01:28:58 +00:00
Chaoren Lin f9c4c424ac Update gdbremote_testcase to accomodate new adb:// scheme.
Reviewers: chying, ovyalov

Reviewed By: chying, ovyalov

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9510

llvm-svn: 236560
2015-05-06 01:28:04 +00:00
Evgeniy Stepanov ce29096614 [asan] Fix dynamic-runtime tests.
They are not part of check-all :(

This change adds sized-delete operators to the version list, and disables the
hack that excluded versioned symbols from the dynamic list - this is not an
issue in this case.

llvm-svn: 236559
2015-05-06 00:29:57 +00:00
Justin Bogner 0b4c484fb9 InstrProf: Strip filename prefixes from the names we display for coverage
For consumers of coverage data, any filename prefixes we store in the
profile data are just noise. Strip this prefix if it exists.

llvm-svn: 236558
2015-05-05 23:44:48 +00:00
Pete Cooper d0dae3e577 [X86 fast-isel] Constrain the index reg class to not include SP.
The index reg on instructions with complex address modes is a GPR64_NOSP.  Constrain it to appease the machine verifier.

llvm-svn: 236557
2015-05-05 23:41:53 +00:00
Evgeniy Stepanov 8af114d93c [asan] Fix compiler-rt build.
i386 runtime library was accidentally using the x86_64 version script without a dependency.

llvm-svn: 236556
2015-05-05 23:13:50 +00:00
Sanjoy Das 1194d1e799 [SelectionDAG] Make an argument optional in RFV::getCopyToRegs. NFC.
Summary:
We default the value argument to nullptr.  The only use of the value is
in diagnosePossiblyInvalidConstraint and that seems to be resilient to
it being nullptr.

Reviewers: atrick, reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9479

llvm-svn: 236555
2015-05-05 23:06:57 +00:00
Sanjoy Das 3936a97f11 [SelectionDAG] Move RegsForValue into SelectionDAGBuilder.h. NFC.
Summary:
The exported class will be used in later change, in
StatepointLowering.cpp.  It is still internal to SelectionDAG (not
exported via include/).

Reviewers: reames, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9478

llvm-svn: 236554
2015-05-05 23:06:54 +00:00
Sanjoy Das 84153c450a [SelectionDAG] Pass explicit type to lowerCallOperands. NFC.
Summary:
Currently this does not change anything, but change will be used in a
later change to StatepointLowering.cpp

Reviewers: reames, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9477

llvm-svn: 236553
2015-05-05 23:06:52 +00:00
Sanjoy Das 3fb91c0a0d [StatepointLowering] Rename variable, NFC.
Rename LoweredArgs to LoweredMetaArgs to clarify intent.

llvm-svn: 236552
2015-05-05 23:06:49 +00:00
Evgeniy Stepanov e8b9d791c2 [asan] Use a version script to limit the symbols exported by the ASan shared runtime library.
llvm-svn: 236551
2015-05-05 22:51:35 +00:00
Pete Cooper ce9ad757c7 Fix IfConverter to handle regmask machine operands.
Note, this is a recommit of r236515 after fixing an error in r236514.  The buildbot ran fast enough that it picked up r236514 prior to r236515 and threw an error.  r236515 itself ran 'make check' without errors.

Original commit message follows:

A regmask (typically seen on a call) clobbers the set of registers it lists.  The IfConverter, in UpdatePredRedefs, was handling register defs, but not regmasks.

These are slightly different to a def in that we need to add both an implicit use and def to appease the machine verifier.  Otherwise, uses after the if converted call could think they are reading an undefined register.

Reviewed by Matthias Braun and Quentin Colombet.

llvm-svn: 236550
2015-05-05 22:09:41 +00:00
Oleksiy Vyalov 8a28b21fde Mark TestMultithreaded.test_sb_api_listener_resume as XFAIL with gcc 4.8 and higher.
llvm-svn: 236549
2015-05-05 22:02:56 +00:00
Kostya Serebryany ca6a2a2f1c [lib/Fuzzer] on crash print the contents of the crashy input as base64
llvm-svn: 236548
2015-05-05 21:59:51 +00:00
Justin Bogner 6d721fa28c InstrProf: Don't start or end coverage regions inside of system macros
It doesn't make much sense to try to show coverage inside system
macros, and source locations in builtins confuses the coverage
mapping. Just avoid doing this.

Fixes an assert that fired when a __block storage specifier starts a
region.

llvm-svn: 236547
2015-05-05 21:46:14 +00:00
Sanjay Patel 801caff64d propagate IR-level fast-math-flags to DAG nodes (NFC)
This patch adds the minimum plumbing necessary to use IR-level
fast-math-flags (FMF) in the backend without actually using
them for anything yet. This is a follow-on to:
http://reviews.llvm.org/rL235997

...which split the existing nsw / nuw / exact flags and FMF
into their own struct.

There are 2 structural changes here:

1. The main diff is that we're preparing to extend the optimization
flags to affect more than just binary SDNodes. Eg, IR intrinsics 
( https://llvm.org/bugs/show_bug.cgi?id=21290 ) or non-binop nodes
that don't even exist in IR such as FMA, FNEG, etc.

2. The other change is that we're actually copying the FP fast-math-flags
from the IR instructions to SDNodes. 

Differential Revision: http://reviews.llvm.org/D8900

llvm-svn: 236546
2015-05-05 21:40:38 +00:00
Kostya Serebryany f3343c5b38 [asan] fix IsDeadlySignal
llvm-svn: 236545
2015-05-05 21:38:50 +00:00
Sanjay Patel fbca70d767 use range-based for-loop; NFC
llvm-svn: 236544
2015-05-05 21:20:52 +00:00
Chaoren Lin f62b7fc317 Fix typo. platfrom -> platform
llvm-svn: 236543
2015-05-05 20:34:36 +00:00
David Majnemer 9f77e90dcc Update testcase to match r236539
llvm-svn: 236542
2015-05-05 20:34:29 +00:00
Greg Clayton 9c284c4d7a Make sure that the following paths say they are equal:
/private/tmp/main.cpp
/private/tmp/..//tmp/main.cpp

We saw paths like this in makefile generate binaries when someone left an extra '/' on the end of a makefile variable.

<rdar://problem/18945972>

llvm-svn: 236541
2015-05-05 20:26:58 +00:00
Andrey Churbanov 7ecb0714be Added Andrey Churbanov as the owner of the OpenMP runtime library code
llvm-svn: 236540
2015-05-05 20:17:53 +00:00
David Majnemer ac256cfed2 [Inliner] Discard empty COMDAT groups
COMDAT groups which have become rendered unused because of inline are
discardable if we can prove that we've made the group empty.

This fixes PR22285.

llvm-svn: 236539
2015-05-05 20:14:22 +00:00
Pete Cooper 7605e37a63 Refactor UpdatePredRedefs and StepForward to avoid duplication. NFC
Note, this is a reapplication of r236515 with a fix to not assert on non-register operands, but instead only handle them until the subsequent commit.  Original commit message follows.

The code was basically the same here already.  Just added an out parameter for a vector of seen defs so that UpdatePredRedefs can call StepForward first, then do its own post processing on the seen defs.

Will be used in the next commit to also handle regmasks.

llvm-svn: 236538
2015-05-05 20:14:22 +00:00
Evgeniy Stepanov 91960900f8 Build ASan runtime library with -z global on Android.
llvm-svn: 236537
2015-05-05 20:13:39 +00:00
Peter Collingbourne 85a0e23bc8 Thumb2SizeReduction: Check the correct set of registers for LDMIA.
The register set for LDMIA begins at offset 3, not 4. We were previously
missing the short encoding of this instruction in the case where the base
register was the first register in the register set.

Also clean up some dead code:

- The isARMLowRegister check is redundant with what VerifyLowRegs does;
  replace with an assert.
- Remove handling of LDMDB instruction, which has no short encoding (and
  does not appear in ReduceTable).

Differential Revision: http://reviews.llvm.org/D9485

llvm-svn: 236535
2015-05-05 20:07:10 +00:00
Andrey Churbanov 648467ed05 Integrate libiomp CMake into LLVM CMake build system.
This patch integrates the libiomp CMake build system into the LLVM CMake build 
system so that users can checkout libiomp into the projects directory of llvm 
and build llvm,clang, and libiomp all together.  These changes specifically 
introduce a new install target which will put libraries and headers into the 
correct locations when either a standalone build or part of llvm.
The copy_recipe() method has been removed in favor of the POST_BUILD method 
to move headers into the exports subdirectory.  And lastly, the MicroTests.cmake 
file was refactored which led to simpler target dependencies and a new target, 
make libiomp-micro-tests, which performs the 5 small tests (test-relo, 
test-touch, etc.) when called.

llvm-svn: 236534
2015-05-05 20:02:52 +00:00
Anton Yartsev 22f6189fb0 [analyzer] This eliminates regression caused by r236423.
Wrap an argument with quotes only if it has spaces.

llvm-svn: 236533
2015-05-05 19:43:37 +00:00
Ulrich Weigand 5722c0f192 [SystemZ] Add support for z13 low-level vector builtins
This adds low-level builtins to allow access to all of the z13 vector
instructions.  Note that instructions whose semantics can be described
by standard C (including clang extensions) do not get any builtins.

For each instructions whose semantics *cannot* (fully) be described, we
define a builtin named __builtin_s390_<insn> that directly maps to this
instruction.  These are intended to be compatible with GCC.

For instructions that also set the condition code, the builtin will take
an extra argument of type "int *" at the end.  The integer pointed to by
this argument will be set to the post-instruction CC value.

For many instructions, the low-level builtin is mapped to the corresponding
LLVM IR intrinsic.  However, a number of instructions can be represented
in standard LLVM IR without requiring use of a target intrinsic.

Some instructions require immediate integer operands within a certain
range.  Those are verified at the Sema level.

Based on a patch by Richard Sandiford.

llvm-svn: 236532
2015-05-05 19:36:42 +00:00
Ulrich Weigand 66ff51b4ea [SystemZ] Add support for z13 and its vector facility
This patch adds support for the z13 architecture type.  For compatibility
with GCC, a pair of options -mvx / -mno-vx can be used to selectively
enable/disable use of the vector facility.

When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
  (except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.

The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.

However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.

These alignment rules are not only implemented at the C language level,
but also at the LLVM IR level.  This is done by selecting a different
DataLayout string depending on whether the vector ABI is in effect or not.

Based on a patch by Richard Sandiford.

llvm-svn: 236531
2015-05-05 19:35:52 +00:00
Ulrich Weigand 9958c489bb [DAGCombiner] Account for getVectorIdxTy() when narrowing vector load
This patch makes ReplaceExtractVectorEltOfLoadWithNarrowedLoad convert
the element number from getVectorIdxTy() to PtrTy before doing pointer
arithmetic on it.  This is needed on z, where element numbers are i32
but pointers are i64.

Original patch by Richard Sandiford.

llvm-svn: 236530
2015-05-05 19:34:10 +00:00
Ulrich Weigand af2c618e2b [DAGCombiner] Fix ReplaceExtractVectorEltOfLoadWithNarrowedLoad for BE
For little-endian, the function would convert (extract_vector_elt (load X), Y)
to X + Y*sizeof(elt).  For big-endian it would instead use
X + sizeof(vec) - Y*sizeof(elt).  The big-endian case wasn't right since
vector index order always follows memory/array order, even for big-endian.
(Note that the current handling has to be wrong for Y==0 since it would
access beyond the end of the vector.)

Original patch by Richard Sandiford.

llvm-svn: 236529
2015-05-05 19:33:37 +00:00
Ulrich Weigand 2693c0a491 [LegalizeVectorTypes] Allow single loads and stores for more short vectors
When lowering a load or store for TypeWidenVector, the type legalizer
would use a single load or store if the associated integer type was legal.
E.g. it would load a v4i8 as an i32 if i32 was legal.

This patch extends that behavior to promoted integers as well as legal ones.
If the integer type for the full vector width is TypePromoteInteger,
the element type is going to be TypePromoteInteger too, and it's still
better to use a single promoting load or truncating store rather than N
individual promoting loads or truncating stores.  E.g. if you have a v2i8
on a target where i16 is promoted to i32, it's better to load the v2i8 as
an i16 rather than load both i8s individually.

Original patch by Richard Sandiford.

llvm-svn: 236528
2015-05-05 19:32:57 +00:00
Ulrich Weigand c1708b2618 [SystemZ] Add vector intrinsics
This adds intrinsics to allow access to all of the z13 vector instructions.
Note that instructions whose semantics can be described by standard LLVM IR
do not get any intrinsics.

For each instructions whose semantics *cannot* (fully) be described, we
define an LLVM IR target-specific intrinsic that directly maps to this
instruction.

For instructions that also set the condition code, the LLVM IR intrinsic
returns the post-instruction CC value as a second result.  Instruction
selection will attempt to detect code that compares that CC value against
constants and use the condition code directly instead.

Based on a patch by Richard Sandiford.

llvm-svn: 236527
2015-05-05 19:31:09 +00:00
Ulrich Weigand 5211f9ff4d [SystemZ] Mark v1i128 and v1f128 as unsupported
The ABI specifies that <1 x i128> and <1 x fp128> are supposed to be
passed in vector registers.  We do not yet support those types, and
some infrastructure is missing before we can do so.

In order to prevent accidentally generating code violating the ABI,
this patch adds checks to detect those types and error out if user
code attempts to use them.

llvm-svn: 236526
2015-05-05 19:30:05 +00:00
Ulrich Weigand cd2a1b5341 [SystemZ] Handle sub-128 vectors
The ABI allows sub-128 vectors to be passed and returned in registers,
with the vector occupying the upper part of a register.  We therefore
want to legalize those types by widening the vector rather than promoting
the elements.

The patch includes some simple tests for sub-128 vectors and also tests
that we can recognize various pack sequences, some of which use sub-128
vectors as temporary results.  One of these forms is based on the pack
sequences generated by llvmpipe when no intrinsics are used.

Signed unpacks are recognized as BUILD_VECTORs whose elements are
individually sign-extended.  Unsigned unpacks can have the equivalent
form with zero extension, but they also occur as shuffles in which some
elements are zero.

Based on a patch by Richard Sandiford.

llvm-svn: 236525
2015-05-05 19:29:21 +00:00
Ulrich Weigand 49506d78e7 [SystemZ] Add CodeGen support for scalar f64 ops in vector registers
The z13 vector facility includes some instructions that operate only on the
high f64 in a v2f64, effectively extending the FP register set from 16
to 32 registers.  It's still better to use the old instructions if the
operands happen to fit though, since the older instructions have a shorter
encoding.

Based on a patch by Richard Sandiford.

llvm-svn: 236524
2015-05-05 19:28:34 +00:00
Ulrich Weigand 80b3af7ab3 [SystemZ] Add CodeGen support for v4f32
The architecture doesn't really have any native v4f32 operations except
v4f32->v2f64 and v2f64->v4f32 conversions, with only half of the v4f32
elements being used.  Even so, using vector registers for <4 x float>
and scalarising individual operations is much better than generating
completely scalar code, since there's much less register pressure.
It's also more efficient to do v4f32 comparisons by extending to 2
v2f64s, comparing those, then packing the result.

This particularly helps with llvmpipe.

Based on a patch by Richard Sandiford.

llvm-svn: 236523
2015-05-05 19:27:45 +00:00
Ulrich Weigand cd808237b2 [SystemZ] Add CodeGen support for v2f64
This adds ABI and CodeGen support for the v2f64 type, which is natively
supported by z13 instructions.

Based on a patch by Richard Sandiford.

llvm-svn: 236522
2015-05-05 19:26:48 +00:00
Ulrich Weigand ce4c109585 [SystemZ] Add CodeGen support for integer vector types
This the first of a series of patches to add CodeGen support exploiting
the instructions of the z13 vector facility.  This patch adds support
for the native integer vector types (v16i8, v8i16, v4i32, v2i64).

When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
  (except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.

The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.

However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.

These alignment rules are not only implemented at the C language level
(implemented in clang), but also at the LLVM IR level.  This is done
by selecting a different DataLayout string depending on whether the
vector ABI is in effect or not.

Based on a patch by Richard Sandiford.

llvm-svn: 236521
2015-05-05 19:25:42 +00:00
Ulrich Weigand a8b04e1cbc [SystemZ] Add z13 vector facility and MC support
This patch adds support for the z13 processor type and its vector facility,
and adds MC support for all new instructions provided by that facilily.

Apart from defining the new instructions, the main changes are:

- Adding VR128, VR64 and VR32 register classes.
- Making FP64 a subclass of VR64 and FP32 a subclass of VR32.
- Adding a D(V,B) addressing mode for scatter/gather operations
- Adding 1-, 2-, and 3-bit immediate operands for some 4-bit fields.
  Until now all immediate operands have been the same width as the
  underlying field (hence the assert->return change in decode[SU]ImmOperand).

In addition, sys::getHostCPUName is extended to detect running natively
on a z13 machine.

Based on a patch by Richard Sandiford.

llvm-svn: 236520
2015-05-05 19:23:40 +00:00
Kaelyn Takata b8499f09fa Allow TransformTypos to ignore corrections to a specified VarDecl.
This is needed to prevent a TypoExpr from being corrected to a variable
when the TypoExpr is a subexpression of that variable's initializer.

Also exclude more keywords from the correction candidate pool when the
subsequent token is .* or ->* since keywords like "new" or "return"
aren't valid on the left side of those operators.

Fixes PR23140.

llvm-svn: 236519
2015-05-05 19:17:03 +00:00