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Author SHA1 Message Date
Joerg Sonnenberger 852ab890b5 Bug#9033: For the ELF assembler output, always quote the section name. 
llvm-svn: 126963
 2011-03-03 22:31:08 +00:00
Eli Friedman d92d17bf67 PR9352: Always emit a relocation for weak symbols. Not emitting relocations 
for calls to weak symbols with a definition has the appearance of working
with LLVM-generated code because weak symbol definitions are put in their
own sections.

llvm-svn: 126933
 2011-03-03 07:24:36 +00:00
Bob Wilson 6f6d739b6e TableGen should not ignore BX instructions for the ARM disassembler. pr9368. 
llvm-svn: 126931
 2011-03-03 07:19:52 +00:00
Bob Wilson ec84568904 pr9367: Add missing predicated BLX instructions. 
Patch by Jyun-Yan You, with some minor adjustments and a testcase from me.

llvm-svn: 126915
 2011-03-03 01:41:01 +00:00
Kevin Enderby b8b6041734 Fixes an assertion failure while disassembling ARM rsbs reg/reg form. 
Patch by Ted Kremenek!

llvm-svn: 126895
 2011-03-02 23:08:33 +00:00
Bill Wendling 3b1459b810 Narrow right shifts need to encode their immediates differently from a normal 
shift.

   16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
   32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
   64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>

llvm-svn: 126723
 2011-03-01 01:00:59 +00:00
Kevin Enderby 58775fea6f Fix the arm's disassembler for blx that was building an MCInst without the 
needed two predicate operands before the imm operand.

llvm-svn: 126662
 2011-02-28 18:46:31 +00:00
Chris Lattner 78178749e9 split this test into arch specific pieces, so the ARM 
test isn't run when the arm backend isn't built.  This
fixes PR9327

llvm-svn: 126500
 2011-02-25 19:06:35 +00:00
Joerg Sonnenberger afb36fad99 Restore r125595 (reverted in r126336) with modifications: 
Introduce a variable in the AsmParserExtension whether [] is valid in an
expression. If it is true, parse them like (). Enable this for ELF only.

llvm-svn: 126443
 2011-02-24 21:59:22 +00:00
Devang Patel b52040da17 Move arch specific tests in arch specific directories. 
llvm-svn: 126401
 2011-02-24 19:06:27 +00:00
Jim Grosbach fe4858f269 Remove file. Previous commit deleted content, but left the file around. 
llvm-svn: 126337
 2011-02-23 21:43:31 +00:00
Jim Grosbach 0c03a3a146 Revert r125595, which is an X86-only undocumented assembly syntax extension 
enabled for all targets. Non-X86 targets should not have this behavior
enabled by default.

Joerg, if you would like to resubmit with the behavior conditionalized to be
X86-ELF only, that's fine.

llvm-svn: 126336
 2011-02-23 21:26:51 +00:00
Rafael Espindola 9e18e96264 Put in the symbol table symbols only used in a .globl statement. 
Fixes PR9292.

llvm-svn: 126330
 2011-02-23 20:22:07 +00:00
Sean Callanan 34770edf43 Fixed a bug in the enhanced disassembler that caused 
it to ignore valid uses of FS and GS as additional
base registers in address computations.  Added a test
case for this.

llvm-svn: 126302
 2011-02-23 03:31:28 +00:00
Joerg Sonnenberger b7e635dcad Use the same (%dx) hack for in[bwl] as for out[bwl]. 
llvm-svn: 126244
 2011-02-22 20:40:09 +00:00
Sean Callanan c1b7775e0f Added a testcase for the enhanced disassembly bug 
fixed in r126147, where a field in the X86 decode
structure was being read as bits, not bytes.

llvm-svn: 126182
 2011-02-22 02:19:18 +00:00
Joerg Sonnenberger 60e7629258 Recognize loopz and loopnz as aliases for loope and loopne. 
From Dimitry Andric.

llvm-svn: 126168
 2011-02-22 00:43:07 +00:00
Rafael Espindola e39062199e Implement xgetbv and xsetbv. 
Patch by Jai Menon.

llvm-svn: 126165
 2011-02-22 00:35:18 +00:00
Joerg Sonnenberger 37d5484d18 Handle FK_PCRel_1 and add a test case for this and FK_PCRel_4. 
llvm-svn: 126157
 2011-02-21 23:25:41 +00:00
Rafael Espindola f849bf81bd Add some limited support for labels in org directives. Hopefully enough to fix 
PR9245.

llvm-svn: 126091
 2011-02-20 20:20:07 +00:00
Chris Lattner 47ffd35bea implement PR9264: disambiguating 'bt mem, imm' as a btl. 
This is reasonable to do since all bt-mem forms do the
same thing.

llvm-svn: 126047
 2011-02-19 21:06:36 +00:00
Bruno Cardoso Lopes 9cd43977c3 Add assembly parsing support for "msr" and also fix its encoding. Also add 
testcases for the disassembler to make sure it still works for "msr".

llvm-svn: 125948
 2011-02-18 19:45:59 +00:00
Joerg Sonnenberger f69c80bac2 Recognize monitor/mwait with explicit register arguments 
llvm-svn: 125805
 2011-02-18 00:48:11 +00:00
Joerg Sonnenberger 889a508157 Recognize leavel and leaveq aliases for leave. 
Validate encoding of leave in 64bit mode.

llvm-svn: 125795
 2011-02-17 23:36:39 +00:00
Rafael Espindola 490d02a334 Gas is very inconsistent about when a relaxation/relocation is needed. Do 
the right thing and stop trying to copy it. Fixes PR8944.

llvm-svn: 125648
 2011-02-16 03:25:55 +00:00
Rafael Espindola 58ac6e1677 Add support for pushsection and popsection. Patch by Joerg Sonnenberger. 
llvm-svn: 125629
 2011-02-16 01:08:29 +00:00
Roman Divacky 4e0f4957bc Add support for parsing [expr]. 
This is submitted by Joerg Sonnenberger and fixes his PR8685.

llvm-svn: 125595
 2011-02-15 20:43:39 +00:00
Bruno Cardoso Lopes 90d1dfe4c6 Fix encoding and add parsing support for the arm/thumb CPS instruction: 
- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
  from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
  wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.

llvm-svn: 125489
 2011-02-14 13:09:44 +00:00
Reid Kleckner 2406b7d179 Add encodings and mnemonics for FXSAVE64 and FXRSTOR64. 
These are just FXSAVE and FXRSTOR with REX.W prefixes.  These versions use
64-bit pointer values instead of 32-bit pointer values in the memory map they
dump and restore.

llvm-svn: 125446
 2011-02-12 23:24:13 +00:00
Jim Grosbach 6e2e29bd11 Do AsmMatcher operand classification per-opcode. 
When matching operands for a candidate opcode match in the auto-generated
AsmMatcher, check each operand against the expected operand match class.
Previously, operands were classified independently of the opcode being
handled, which led to difficulties when operand match classes were
more complicated than simple subclass relationships.

llvm-svn: 125245
 2011-02-10 00:08:28 +00:00
Owen Anderson 4ebf471c9b Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 (which worked around it). This should get us back to the old, correct behavior, though it will make the integrated assembler unhappy for the time being. 
llvm-svn: 125127
 2011-02-08 22:39:40 +00:00
Benjamin Kramer 7b7caf51e9 Support for .ifdef / .ifndef in the assembler parser. Patch by Joerg Sonnenberger. 
llvm-svn: 125120
 2011-02-08 22:29:56 +00:00
Bruno Cardoso Lopes 36dd43fda6 Add support for parsing dmb/dsb instructions 
llvm-svn: 125055
 2011-02-07 22:09:15 +00:00
Jason W Kim 202630c6ee Teach ARM/MC/ELF about gcc compatible reloc output to get past odd linkage 
failures with relocations.

The code committed is a first cut at compatibility for emitted relocations in
ELF .o.

Why do this? because existing ARM tools like emitting relocs symbols as
explicit relocations, not as section-offset relocs.

Result is that with these changes,
1) relocs are now substantially identical what to gcc outputs.
2) larger apps (including many spec2k tests) compile, cross-link, and pass

Added reminder fixme to tests for future conversion to .s form.

llvm-svn: 124996
 2011-02-07 01:11:15 +00:00
Jason W Kim 4761fba833 Teach ARM/MC/ELF about EF_ARM_EABI_VERSION. The magic number is set to 
5 to match the current doc.
Added FIXME reminder Make it really configurable later.

llvm-svn: 124899
 2011-02-04 21:41:11 +00:00
Jason W Kim d2e2f56c36 Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps. 
(yes, this is different from R_ARM_CALL)

- Adds a new method getARMBranchTargetOpValue() which handles the
  necessary distinction between the conditional and unconditional br/bl
  needed for ARM/ELF

At least for ARM mode, the needed fixup for conditional versus unconditional
br/bl is identical, but the ARM docs and existing ARM tools expect this
reloc type...

Added a few FIXME's for future naming fixups in ARMInstrInfo.td

llvm-svn: 124895
 2011-02-04 19:47:15 +00:00
Evan Cheng 2ea68db927 Fix test for non-darwin targets. 
llvm-svn: 124640
 2011-02-01 01:16:18 +00:00
Bob Wilson 775eec2280 PR9030: Fix disassembly of ARM "mov pc, lr" instruction. 
Patch by Jyun-Yan You.

llvm-svn: 124492
 2011-01-28 17:50:30 +00:00
Roman Divacky 7e9e290952 Add support for parsing .float 
llvm-svn: 124485
 2011-01-28 14:20:32 +00:00
Nico Weber 4ada0d9164 PR8951: Support for .equiv in integrated assembler, patch by Jörg Sonnenberger! 
llvm-svn: 124467
 2011-01-28 03:04:41 +00:00
Evan Cheng bb8420a070 Fix PLD encoding. 
llvm-svn: 124458
 2011-01-27 23:48:34 +00:00
Roman Divacky ed5efb4053 Add support for specifying register name in cfi-register/offset/def 
as well as register number.

llvm-svn: 124379
 2011-01-27 17:16:37 +00:00
Bruno Cardoso Lopes ce0af9c961 Add encoding testcases for ARM vcvtr variations 
llvm-svn: 124289
 2011-01-26 13:53:38 +00:00
Bruno Cardoso Lopes 178c1e0c9b fix the encoding and add testcases for ARM nop, yield, wfe and wfi instructions 
llvm-svn: 124288
 2011-01-26 13:28:14 +00:00
Rafael Espindola 78c9f78fc9 Jörg Sonnenberger noticed that we were missing this test. 
llvm-svn: 124139
 2011-01-24 19:40:38 +00:00
Rafael Espindola 689939e648 Handle strings in section names the same way as gas: 
* If the name is a single string, we remove the quotes
* If the name starts without a quote, we include any quotes in the name

llvm-svn: 124127
 2011-01-24 18:02:54 +00:00
Rafael Espindola b3eca9bb71 Add support for the --noexecstack option. 
llvm-svn: 124077
 2011-01-23 17:55:27 +00:00
Rafael Espindola 8bac423ddb Add support for lowercase variants. 
llvm-svn: 124071
 2011-01-23 16:11:25 +00:00
Rafael Espindola 4b7b7fba38 Delay the creation of eh_frame so that the user can change the defaults. 
Add support for SHT_X86_64_UNWIND.

llvm-svn: 124059
 2011-01-23 05:43:40 +00:00
Bruno Cardoso Lopes 4bd612384a Fix the encoding of QADD/SUB, QDADD/SUB. While qadd16, qadd8 use "rd, rn, rm", 
qadd and qdadd uses "rd, rm, rn", the same applies to the 'sub' variants. This
is described in ARM manuals and matches the encoding used by the gnu assembler.

llvm-svn: 123975
 2011-01-21 14:07:40 +00:00