Commit Graph

412957 Commits

Author SHA1 Message Date
Amir Ayupov c2a961e414 [BOLT] Imported llvm-bolt-wrapper script
Commit history in chronological order:

[BOLT] llvm-bolt-wrapper: added wrapper for bolt binary matching

Summary:
Wrapper to compare two versions of BOLT to see if they produce the same output
binary given the same input.

(cherry picked from FBD26626137)

[BOLT] llvm-bolt-wrapper: support for no-output tests and heatmap mode

Summary:
- Added an option `skip_binary_cmp` to support invocations that don't output
  a binary
- Minor fixes for heatmap mode, timeout, log comparison
- Rearranged in-line config example to be copy-pasteable

(cherry picked from FBD26822016)

[BOLT] llvm-bolt-wrapper: merge stdout/stderr, search for config in script dir

(cherry picked from FBD27529335)

[BOLT] llvm-bolt-wrapper: handle /dev/null

Summary:
Fixed the wrapper to preserve `-o /dev/null` and skip binary matching for such
invocations.

(cherry picked from FBD28013747)

[BOLT] llvm-bolt-wrapper: handle cases where output binary doesn't exist

Summary:
Handle invocations where output binary is not generated (e.g. due to an expected
assertion or exit with BOLT-ERROR) and skip binary comparison in such cases.

(cherry picked from FBD28080158)

[BOLT] llvm-bolt-wrapper: handle boltdiff mode

Summary:
Handle `llvm-boltdiff` invocation similarly to `perf2bolt`

(cherry picked from FBD28080157)

[BOLT] llvm-bolt-wrapper: find section with mismatch

Summary:
For mismatching ELF files, find section with mismatch and print sections table
with highlighted mismatch section.

(cherry picked from FBD28087231)

[BOLT] llvm-bolt-wrapper: ignore-build-id in perf2bolt mode

Summary:
When perf2bolt fails to match build-id from perf output for cmp binary, we need
to use -ignore-build-id option to override the strict checking behavior.

(cherry picked from FBD28087232)

[BOLT] llvm-bolt-wrapper: suppress -bolt-info=0 in heatmap mode

Summary:
Heatmap mode is incompatible with `-bolt-info=0` used to suppress binary
differences. Remove it.

(cherry picked from FBD28087230)

[BOLT] llvm-bolt-wrapper: add config-generator mode

Summary:
llvm-bolt-wrapper config can be generated by the script itself.
It makes the workflow more reliable compared to preparing the config manually.

(cherry picked from FBD28358939)

[BOLT] llvm-bolt-wrapper: fix mismatch reporting

Summary:
1. Fixed header comparison issue where headers were skipped due to
  `skip_end == 0` (`lst[:-n]` does not work if n==0).
2. Detect color support while printing mismatching section:
  - use bold color if terminal supports ANSI escape codes,
  - otherwise print ">" at mismatching section.
3. Remove extra 0x before mismatching offset.

(cherry picked from FBD28691979)

[BOLT] llvm-bolt-wrapper: handle perf2bolt tests with ignore-build-id

Summary:
`ignore-build-id` must be passed not more than once. Account for that.

(cherry picked from FBD29830266)

[BOLT] llvm-bolt-wrapper: fix running subprocesses in parallel

Summary:
The commands were running sequentially due to the use of blocking `communicate`
call, which is needed when stdout/stderr are directed to a pipe.
Fix this behavior by directing the output to a file.

(cherry picked from FBD29951863)
2022-01-28 12:28:55 -08:00
Florian Hahn 9dd5fffd30
[GVN] Add tests with redundant load of pointer select.
Additional test cases for D118144.
2022-01-28 20:15:32 +00:00
Jordan Rupprecht 282c83c323 [libc] Add missing sqrt deps for layering checks 2022-01-28 12:11:27 -08:00
Philip Reames 746e435ff7 Revert "[SLP] Add a clarifying assert in block scheduling [NFC]"
This reverts commit db49a78900.  The reasoning in the patch applied to a downstream branch, and I got myself confused when trying to split apart pieces.  Thankfully, the assert was simply weaker than the actual invariant currently upstream which is that ReadyInsts is not empty.
2022-01-28 12:10:31 -08:00
harsh 80e0bf1af1 Add vector.scan op
This patch adds the vector.scan op which computes the
scan for a given n-d vector. It requires specifying the operator,
the identity element and whether the scan is inclusive or
exclusive.

TEST: Added test in ops.mlir

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D117171
2022-01-28 20:07:57 +00:00
Siva Chandra 0e91c48df0 [libc] Enable creat, fsync, open, openat, read and write for aarch64. 2022-01-28 12:06:08 -08:00
Aaron Ballman 86797fdb6f Add BITINT_MAXWIDTH support
Part of the _BitInt feature in C2x
(http://www.open-std.org/jtc1/sc22/wg14/www/docs/n2763.pdf) is a new
macro in limits.h named BITINT_MAXWIDTH that can be used to determine
the maximum width of a bit-precise integer type. This macro must expand
to a value that is at least as large as ULLONG_WIDTH.

This adds an implementation-defined macro named __BITINT_MAXWIDTH__ to
specify that value, which is used by limits.h for the standard macro.

This also limits the maximum bit width to 128 bits because backends do
not currently support all mathematical operations (such as division) on
wider types yet. This maximum is expected to be increased in the future.
2022-01-28 15:04:29 -05:00
Valentin Clement 944dca758f
[flang][NFC] Remove obsolete ComplexExpr helper
Functionality present in `flang/include/flang/Lower/ComplexExpr.h` are
available in `flang/include/flang/Optimizer/Builder/Complex.h`. This patch removes
the obsolete files.

Reviewed By: kiranchandramohan, schweitz

Differential Revision: https://reviews.llvm.org/D118462
2022-01-28 21:02:14 +01:00
Jacob Lambert edf7e026a8 [clang][NFC] Fix Typo 2022-01-28 11:55:46 -08:00
Andrew Litteken 3785c1d055 [IRSim][IROutliner] Allowing Intrinsic Calls to be Used in Similarity Matching and Outlined Regions
Due to some complications with lifetime, and assume-like intrinsics, intrinsics were not included as outlinable instructions. This patch opens up most intrinsics, excluding lifetime and assume-like intrinsics, to be outlined. For similarity, it is required that the intrinsic IDs, and the intrinsics names match exactly, as well as the function type. This puts intrinsics in a different class than normal call instructions (https://reviews.llvm.org/D109448), where the name will no longer have to match.

This also adds an additional command line flag debug option to disable outlining intrinsics.

Recommit of: 8de76bd569
Adds extra checking of intrinsic function calls names to avoid taking the address of intrinsic calls when extracting function calls.

Reviewers: paquette, jroelofs

Differential Revision: https://reviews.llvm.org/D109450
2022-01-28 13:52:21 -06:00
Fangrui Song 33b38339a0 [lld] Add module name to LTO inline asm diagnostic
Close #52781: for LTO, the inline asm diagnostic uses `<inline asm>` as the file
name (lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp) and it is unclear which
module has the issue.

With this patch, we will see the module name (say `asm.o`) before `<inline asm>` with ThinLTO.

```
% clang -flto=thin -c asm.c && myld.lld asm.o -e f
ld.lld: error: asm.o <inline asm>:1:2: invalid instruction mnemonic 'invalid'
        invalid
        ^~~~~~~
```

For regular LTO, unfortunately the original module name is lost and we only get
ld-temp.o.

Reviewed By: #lld-macho, ychen, Jez Ng

Differential Revision: https://reviews.llvm.org/D118434
2022-01-28 11:32:42 -08:00
Siva Chandra Reddy 4abfe47e1f [libc] Add implementations of the POSIX creat and openat functions.
Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D118435
2022-01-28 19:28:12 +00:00
LLVM GN Syncbot 00d4316cd0 [gn build] Port f489e86a24 2022-01-28 19:20:50 +00:00
Aaron Ballman f489e86a24 Remove Waymarking.h as it is unused
This file was added in https://reviews.llvm.org/D74415. There was no
justification as to why it was added, and after about a year of being
in-tree, it's still unused, so this removes it.
2022-01-28 14:20:06 -05:00
William S. Moses 0d04c77856 [ScalarEvolution] Mark a loop as finite if in a willreturn function
A limited version of (https://reviews.llvm.org/D118090) that only marks a loop as finite if in a willreturn function.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D118429
2022-01-28 14:17:05 -05:00
Florian Hahn 56659c80d0
[GVN] Add additional tests for PRE with pointer selects.
Additional tests for D118143.
2022-01-28 19:11:36 +00:00
Philip Reames db49a78900 [SLP] Add a clarifying assert in block scheduling [NFC]
The fact we could have a block with a valid scheduling window, but nothing to schedule was surprising to me.  After digging through the code, this can only happen if we don't find anything to directly vectorize.  However, the reduction handling code relies on this mode, so we can't simply consider such trees unvectorizeable.  The assert conveys both that this situation can happen, but also that it can *only* happen for an immediate gather.

Context: We built the bundle before deciding that vectorization of a bundle is possible.  A side effect of bundle construction is manipulating the scheduling window, so a bundle which isn't vectorizable can cause the creation or expansion of a scheduling window.
2022-01-28 11:08:59 -08:00
David Blaikie 277123376c GCC ABI Compatibility: Preserve alignment of non-pod members in packed structs
This matches GCC: https://godbolt.org/z/sM5q95PGY

I realize this is an API break for clang+clang - so I'm totally open to
discussing how we should deal with that. If Apple wants to keep the
Clang layout indefinitely, if we want to put a flag on this so non-Apple
folks can opt out of this fix/new behavior.

Differential Revision: https://reviews.llvm.org/D117616
2022-01-28 11:04:20 -08:00
Roger Kim 422084332a [lld][Macho] Include dead-stripped symbols in mapfile
ld64 outputs dead stripped symbols when using the -dead-strip flag. This change mimics that behavior for lld.

ld64's -dead_strip flag outputs:
```
$ ld -map map basics.o -o out -dead_strip -L/Library/Developer/CommandLineTools/SDKs/MacOSX.sdk/usr/lib -lSystem
$ cat map
# Path: out
# Arch: x86_64
# Object files:
[  0] linker synthesized
[  1] basics.o
# Sections:
# Address       Size            Segment Section
0x100003F97     0x00000021      __TEXT  __text
0x100003FB8     0x00000048      __TEXT  __unwind_info
0x100004000     0x00000008      __DATA_CONST    __got
0x100008000     0x00000010      __DATA  __ref_section
0x100008010     0x00000001      __DATA  __common
# Symbols:
# Address       Size            File  Name
0x100003F97     0x00000006      [  1] _ref_local
0x100003F9D     0x00000001      [  1] _ref_private_extern
0x100003F9E     0x0000000C      [  1] _main
0x100003FAA     0x00000006      [  1] _no_dead_strip_globl
0x100003FB0     0x00000001      [  1] _ref_from_no_dead_strip_globl
0x100003FB1     0x00000006      [  1] _no_dead_strip_local
0x100003FB7     0x00000001      [  1] _ref_from_no_dead_strip_local
0x100003FB8     0x00000048      [  0] compact unwind info
0x100004000     0x00000008      [  0] non-lazy-pointer-to-local: _ref_com
0x100008000     0x00000008      [  1] _ref_data
0x100008008     0x00000008      [  1] l_ref_data
0x100008010     0x00000001      [  1] _ref_com

# Dead Stripped Symbols:
#               Size            File  Name
<<dead>>        0x00000006      [  1] _unref_extern
<<dead>>        0x00000001      [  1] _unref_local
<<dead>>        0x00000007      [  1] _unref_private_extern
<<dead>>        0x00000001      [  1] _ref_private_extern_u
<<dead>>        0x00000008      [  1] _unref_data
<<dead>>        0x00000008      [  1] l_unref_data
<<dead>>        0x00000001      [  1] _unref_com
```

Reviewed By: int3, #lld-macho, thevinster

Differential Revision: https://reviews.llvm.org/D114737
2022-01-28 10:51:27 -08:00
Tue Ly ad4ee2d778 [libc] Refactor sqrt implementations and add tests for generic sqrt implementations.
Re-apply https://reviews.llvm.org/D118173 with fix for aarch64.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D118433
2022-01-28 13:39:03 -05:00
Bixia Zheng 91865cc027 [mlir][taco] Accept an integer list for the ordering when defining a tensor format.
The unit tests for PyTACO hasn't been upstreamed yet. A unit test for this
change will be added when we upstream all the unit tests for PyTACO.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D118417
2022-01-28 10:33:25 -08:00
David Tenty 27ee91162d [AIX][clang] include_next through clang provided float.h
AIX provides additional definitions in the system libc float.h that we
would like to be available to users, so we need to include_next through,
similar to what is done on some other platforms.

We also adjust the guards for some definitions which are restricted
based on language level to also be provide with the _ALL_SOURCE feature
test macro on AIX, similar to what is done by the platform float.h
header, so we don't run into cases where we don't provide the compiler
macro but still have a different definition from the system.

Differential Revision: https://reviews.llvm.org/D117935
2022-01-28 13:27:10 -05:00
Shoaib Meenai f4744e9ae0 Reapply "[llvm-libtool-darwin] Print a warning if object file names are repeated"
Loosen the test to make it pass on Windows.

This reapplies commit 4993eff3e2.
This reverts commit 96c6604012.
2022-01-28 10:19:33 -08:00
Stella Stamenova 738d73fbf4 [lldb] Update the lldb build instructions on Windows
The existing instructions for lldb on Windows can be more explicit. This adds a few details on how to install various components and the easiest way to get to a working build.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D118425
2022-01-28 10:18:19 -08:00
Shubham Sandeep Rastogi 4ce1f3d47c Emit swift5 reflection section data in dsym bundle generated by dsymutil in the Dwarf section.
Add support for Swift reflection metadata to dsymutil.

This patch adds support for copying Swift reflection metadata (__swift5_.* sections) from .o files to into the symbol-rich binary in the output .dSYM. The functionality is automatically enabled only if a .o file has reflection metadata sections and the binary doesn't. When copying dsymutil moves the section from the __TEXT segment to the __DWARF segment.

rdar://76973336

Differential Revision: https://reviews.llvm.org/D115007
2022-01-28 10:13:17 -08:00
Stella Stamenova c0861fcbb9 [mlir] Only build mlir-cpu-runner when the native arch is targeted
mlir-cpu-runner has a dependency on ExecutionEngine which is only built for the native arch. So currently mlir-cpu-runner does not link correctly when the native arch is not targeted.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D118422
2022-01-28 10:09:09 -08:00
Yuanfang Chen a41c8b8fd5 [ADT] support fixed-width output with `utohexstr`
Will use it to output a hash value that needs fixed-width.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D118427
2022-01-28 10:07:54 -08:00
Jay Foad 68e3946270 [AMDGPU] SILoadStoreOptimizer: break lists on instructions with side effects
This just helps to keep the lists shorter and faster to sort. NFCI.

Differential Revision: https://reviews.llvm.org/D118384
2022-01-28 18:03:42 +00:00
Craig Topper 06bd56d47d [RISCV] Update comments about getInstSizeInBytes hard-coding the number of bytes.
After D118175, we get the information from the tablegen definition.

Differential Revision: https://reviews.llvm.org/D118488
2022-01-28 09:51:49 -08:00
Steven Wan 760e69223d [NFC][AIX]Disable new pcm tests on AIX
Same as D114481, the PCH reader looks for a `__clangast` section in the precompiled module file, which isn't present on AIX, and we don't support writing this custom section in XCOFF yet.

Reviewed By: Jake-Egan, daltenty, sfertile

Differential Revision: https://reviews.llvm.org/D118477
2022-01-28 12:39:09 -05:00
Craig Topper ea05ee9059 [RISCV] Preserve VL when truncating i64 gather/scatter indices on RV32.
We were creating a truncate with the default for the type, but for
VP intrinsics we have a VL that we should use.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D118406
2022-01-28 09:25:30 -08:00
Ellis Hoag eea002a9c4 [InstrProf][NFC] Move function out of InstrProf.h
`createIRLevelProfileFlagVar()` seems to be only used in
`PGOInstrumentation.cpp` so we move it to that file. Then it can also
take advantage of directly using options rather than passing them as
arguments.

Reviewed By: kyulee, phosek

Differential Revision: https://reviews.llvm.org/D118097
2022-01-28 09:24:26 -08:00
Craig Topper de0c2d75bf [RISCV] Use tablegen size for getInstSizeInBytes.
Fix the pseudos to have the correct size in the MCInstrDesc description.

Inspired by D118009 and D117970.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D118175
2022-01-28 09:21:28 -08:00
Alexey Bataev cec8b614f3 [SLP]Do not reorder top nodes if they do not require reordering.
No need to reorder the top nodes, if they are not stores or
insertelement instructions and each node should be analized only
once, when the bottom-to-top analysis is performed.
We still endup with extractelements for the top node scalars and
the final shuffle just adds an extra cost and currently
crashes the compiler for PHI nodes.

Differential Revision: https://reviews.llvm.org/D116760
2022-01-28 09:16:18 -08:00
Fangrui Song c80d349859 [msan][tsan] Refine __fxstat{,at}{,64} condition
In glibc before 2.33, include/sys/stat.h defines fstat/fstat64 to
`__fxstat/__fxstat64` and provides `__fxstat/__fxstat64` in libc_nonshared.a.
The symbols are glibc specific and not needed on other systems.

Reviewed By: vitalybuka, #sanitizers

Differential Revision: https://reviews.llvm.org/D118423
2022-01-28 09:15:39 -08:00
Cullen Rhodes 5d089d9a83 [DAGCombiner] Fix invalid size request in combineRepeatedFPDivisors
If we have a vector FP division with a splatted divisor, use
getVectorMinNumElements when scaling the num of uses by splat factor.

For AArch64 the combine kicks in for the <vscale x 4 x float> case since it's
above the fdiv threshold (3) when scaling num uses by splat factor, but the
codegen is worse (splat + vector fdiv + vector fmul) than the <vscale x 2 x
double> case (splat + vector fdiv).

If the combine could be converted into a scalar FP division by
scalarizeBinOpOfSplats it may be cheaper, but it looks like this is predicated
on the isExtractVecEltCheap TLI function which is implemented for x86 but not
AArch64. Perhaps for now combineRepeatedFPDivisors should only scale num uses
by splat if the division can be converted into scalar op.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D118343
2022-01-28 17:01:08 +00:00
Michał Górny ac666d1799 [lldb] [gdb-remote] Support getting siginfo via API
Add Thread::GetSiginfo() and SBThread::GetSiginfo() methods to retrieve
the siginfo value from server.

Differential Revision: https://reviews.llvm.org/D118055
2022-01-28 17:47:47 +01:00
Siva Chandra Reddy a858e25f1c [libc][NFC] Create file with all permissions for the user in read_write_test. 2022-01-28 16:41:52 +00:00
Jake Egan 6f4f745668 [clang][deps] Adapt test to be compatible when the assembler is called by default
When `-fno-integrated-as` is in effect (the default on AIX) the cc1 job produces a `.s` file instead. This patch adapts the test to accept `.s` or `.o` files.

Reviewed By: jansvoboda11

Differential Revision: https://reviews.llvm.org/D118152
2022-01-28 11:40:16 -05:00
Arjun P 6db019582a [MLIR] Introduce LexSimplex to support lexicographic optimization
This patch introduces a class LexSimplex that can currently be used to find the
lexicographically minimal rational point in an IntegerPolyhedron. This is a
series of patches leading to computing the lexicographically minimal integer
lattice point as well parametric lexicographic minimization.

Reviewed By: Groverkss

Differential Revision: https://reviews.llvm.org/D117437
2022-01-28 22:06:58 +05:30
David Tenty 9939bb6682 [NFC][AIX][clang] un-XFAIL gcc profile flag compat test
We can pass this test now thanks to recent changes that allow us to use PGO without LTO, so un-XFAIL the test and update the comments.

Differential Revision: https://reviews.llvm.org/D118474
2022-01-28 11:18:55 -05:00
Augusto Noronha b414954a5f [lldb] Make ReadCStringFromMemory default to read from the file-cache.
Differential Revision: https://reviews.llvm.org/D118265
2022-01-28 13:08:30 -03:00
Kito Cheng a9d5bb926d [RISCV] Use __extendhfsf2/__truncsfhf2 for fp16 <-> fp32
`__gnu_h2f_ieee` and `__gnu_f2h_ieee` are introduce by ARM and set that as
default name for fp16 and fp32 conversion in LLVM.

However RISC-V GCC using default naming scheme for that, which is
`__extendhfsf2` and `__truncsfhf2` for that, that cause runtime ABI
incompatible issue.

Although we didn't have formal runtime ABI spec to specify those naming
convention yet, but I think it would be great to fix the incompatible
issue first.

And I've plan to create a runtime ABI spec undere psABI spec this year.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D118207
2022-01-29 00:01:00 +08:00
Nikita Popov 7d176844d0 [CodeExtractor] Fix warning in assert (NFC) 2022-01-28 16:33:34 +01:00
Nikita Popov cf0357a545 [BasicBlockUtils] Fix typo in API name (NFC)
detatch -> detach. As this requires touching all uses, also
lower-case it in accordance with the style guide.
2022-01-28 16:32:13 +01:00
Nikita Popov 8a4293f3ef [Loads] Require Align in isDereferenceableAndAlignedPointer() (NFC)
Now that loads always have an alignment, we should not perform an
ABI alignment fallback here.
2022-01-28 16:23:32 +01:00
Sanjay Patel b4b97ec813 [x86] try harder to scalarize a vector load with extracted integer op uses
extract_vec_elt (load X), C --> scalar load (X+C)

As noted in the comment, DAGCombiner has this fold -- and the code in this
patch is adapted from DAGCombiner::scalarizeExtractedVectorLoad() -- but
x86 should benefit even if the loaded vector has other uses as long as we
apply some other x86-specific conditions. The motivating example from #50310
is shown in vec_int_to_fp.ll.

Fixes #50310

Differential Revision: https://reviews.llvm.org/D118376
2022-01-28 10:22:52 -05:00
Alex Bradbury 588f121ada [RISCV][NFC] Make Zb* instruction naming match the convention used elsewhere in the RISC-V backend
Where the instruction mnemonic contains a dot, we name the corresponding
instruction in the .td file using a _ in the place of the dot. e.g. LR_W
rather than LRW. This commit updates RISCVInstrInfoZb.td to follow that
convention.
2022-01-28 15:20:37 +00:00
eopXD 5f856c5b30 [NFC][RISCV] Bundle up ISAInfo updates and checks
Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D118334
2022-01-28 07:13:24 -08:00
Nikita Popov 0ebbf3435f [ArgPromotion] Don't assume all entry block instrs are executed
We should abort this walk if we hit any instruction that is not
guaranteed to transfer.
2022-01-28 16:08:42 +01:00