b67912d5cd
Add support for .int.
...
llvm-svn: 119512
2010-11-17 16:24:40 +00:00
5c996894bd
Add support for .2byte, .4byte and .8byte.
...
Fixes PR8631.
llvm-svn: 119511
2010-11-17 16:15:42 +00:00
9898ac97fd
Proper encoding for VLDM and VSTM instructions. The register lists for these
...
instructions have to distinguish between lists of single- and double-precision
registers in order for the ASM matcher to do a proper job. In all other
respects, a list of single- or double-precision registers are the same as a list
of GPR registers.
llvm-svn: 119460
2010-11-17 04:32:08 +00:00
7d19efd6ff
A bit more of gnu as compatibility when handling relocations with aliases.
...
llvm-svn: 119328
2010-11-16 04:11:46 +00:00
92756fff57
Test encodings for LDM and STM.
...
llvm-svn: 119315
2010-11-16 01:38:20 +00:00
05a8daee21
Add Thumb2 encodings for mov and friends.
...
llvm-svn: 119295
2010-11-16 00:29:56 +00:00
d1993eb2a4
Change the 11 byte nop to be a single instruction.
...
llvm-svn: 119286
2010-11-15 23:10:30 +00:00
7d97a99f4c
Provide Thumb2 encodings for sxtb and friends.
...
llvm-svn: 119185
2010-11-15 21:12:05 +00:00
2a3c22efba
Add Thumb2 encodings for comparison and shift operators.
...
llvm-svn: 119176
2010-11-15 19:58:36 +00:00
0e7d728327
Add correct Thumb2 encodings for mvn and friends.
...
llvm-svn: 119170
2010-11-15 18:45:17 +00:00
8c3039b67b
Change MCExpr::EvaluateAsRelocatableImpl of variables to return the original
...
variable if recursing fails to simplify it.
Factor AliasedSymbol to be a method of MCSymbol.
Update MCAssembler::EvaluateFixup to match the change in
EvaluateAsRelocatableImpl.
Remove the WeakRefExpr hack, as the object writer now sees the weakref with
no extra effort needed.
Nothing else is using MCTargetExpr, but keep it for now.
Now that the ELF writer sees relocations with aliases, handle
.weak foo2
foo2:
.weak bar2
.set bar2,foo2
.quad bar2
the same way gas does and produce a relocation with bar2.
llvm-svn: 119152
2010-11-15 16:33:49 +00:00
46c79ef113
Fix PR8565.
...
This moves most of the isUsed logic to the MCSymbol itself. With this we
get a bit more relaxed about allowing definitions after uses: uses that
don't evaluate their argument immediately (jmp foo) are accepted.
ddunbar, this was the smallest compromise I could think of that lets us
accept gcc (and clang!) assembly.
llvm-svn: 119144
2010-11-15 14:40:36 +00:00
240028d11d
Move the logic to decide with which symbol we produce a relocation (if any) to
...
a central location. This also makes us a bit more compatible with gas.
llvm-svn: 119094
2010-11-14 23:53:26 +00:00
a7d0bed336
Fix another case of a .comm directive without a corresponding .type
...
directive.
llvm-svn: 119073
2010-11-14 21:11:16 +00:00
b05ef7377a
Fix the type of a symbol created with .comm and no corresponding .type.
...
llvm-svn: 119060
2010-11-14 19:40:55 +00:00
2cd8b08207
Segregate tests by target.
...
llvm-svn: 119050
2010-11-14 18:14:32 +00:00
7d0ba3464e
Handle a peculiar comdat case: Creating a section with an undefined
...
signature symbol causes a local symbol to be created unless there is
some other use of the symbol.
llvm-svn: 119026
2010-11-14 04:17:37 +00:00
82471189b7
Fixed error and re-enabled MBlaze MC disassembler tests.
...
llvm-svn: 118987
2010-11-13 05:48:21 +00:00
4bcf94c75a
Parse and record the gnu_unique_object type.
...
llvm-svn: 118980
2010-11-13 04:51:02 +00:00
bee283837f
This test stops after disassembling 1 instructions on
...
darwin and, judging from the buildbots, Linux.
Removing it for now, but this is not the right fix,
Wesley please look at it.
llvm-svn: 118977
2010-11-13 03:55:04 +00:00
f01b622902
Parse and remember discriminators in .loc line. I try to output them with
...
another patch.
This lets us parse a bit more of the gcc 4.5 output.
llvm-svn: 118975
2010-11-13 03:18:27 +00:00
99837837ec
Add test cases that should have been committed with 118969.
...
llvm-svn: 118974
2010-11-13 02:51:00 +00:00
b3099e6863
1. Adding test cases for MBlaze MC disassembler.
...
2. Fixing several errors in disassembler uncovered by test cases.
3. Fixing invalid encoding of PCMPEQ and PCMPNE uncovered by test cases.
llvm-svn: 118969
2010-11-13 02:37:59 +00:00
1d37f35eea
Fix the encoding of negative line deltas.
...
llvm-svn: 118962
2010-11-13 01:06:27 +00:00
240162629c
1. Adding missing immediate mode asm parser test cases.
...
2. Fixing improper immediate mode reverse subtract.
llvm-svn: 118948
2010-11-13 00:03:46 +00:00
4b074b8995
Fixing improperly encoded reverse subtract instructions in MBlaze backend.
...
llvm-svn: 118943
2010-11-12 23:41:10 +00:00
c542248602
1. Finishing MBlaze MC asm parser test cases
...
2. Parsing .word directive in MBlaze asm parser
3. Fixing hack where memory instructions reversed order of last two parameters
4. Fixing many improperly encoded instructions
5. Support parsing special instructions (MFS,MTS,etc.)
6. Removing unused functions from inst printer
llvm-svn: 118941
2010-11-12 23:30:17 +00:00
8fdd172502
First stab at providing correct Thumb2 encodings, start with adc.
...
llvm-svn: 118924
2010-11-12 21:12:40 +00:00
87cf7f787e
accept lret as an alias for lretl, fixing the reopened part of PR8592
...
llvm-svn: 118916
2010-11-12 18:54:56 +00:00
5b013b102d
implement PR8592: empirically "lretq" is a "lret" with a rex.w prefix.
...
llvm-svn: 118903
2010-11-12 17:41:20 +00:00
de990b270d
gnu as support both % and @ before types, do the same.
...
llvm-svn: 118893
2010-11-12 15:47:08 +00:00
ce2250fba4
Fill out support for Thumb2 encodings of NEON instructions.
...
llvm-svn: 118854
2010-11-11 23:12:55 +00:00
bf65066a37
Fix tblgen instruction errors exposed by MC asm parser tests
...
Fix minimum 16-bit signed value error exposed by MC asm parser tests
Add initial MC asm parser tests for the MBlaze backend
llvm-svn: 118844
2010-11-11 21:40:53 +00:00
99a8cb4875
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4].
...
llvm-svn: 118843
2010-11-11 21:36:43 +00:00
a56a2e1fc5
Flesh out tests for Thumb2 encodings of NEON instructions.
...
llvm-svn: 118837
2010-11-11 21:15:47 +00:00
7ffe3b35ac
Add support for Thumb2 encodings of NEON data processing instructions, using the new PostEncoderMethod infrastructure.
...
More tests to come.
llvm-svn: 118819
2010-11-11 19:07:48 +00:00
84d031870c
Mark labels declared in tls sections as STT_TLS. This matches the behavior of
...
gas.
llvm-svn: 118818
2010-11-11 19:04:55 +00:00
a3e9a2298d
Initial comdat implementation.
...
llvm-svn: 118805
2010-11-11 18:13:52 +00:00
fb6540c112
Make AliasedSymbol able to handle MCTargetExpr. They can get here if
...
a weakref is used with a VariantKind.
llvm-svn: 118798
2010-11-11 17:24:43 +00:00
fa7b55754c
Fix the symbol index of weak references. Also make RecordRelocation a bit
...
easier to read by having const references to the symbol, aliased symbol and
renamed symbol.
llvm-svn: 118793
2010-11-11 16:48:11 +00:00
c7baee31ad
Add support for ARM's specialized vector-compare-against-zero instructions.
...
llvm-svn: 118453
2010-11-08 23:21:22 +00:00
9d17a3194e
Set default flags for .rodata.
...
llvm-svn: 118395
2010-11-08 02:47:59 +00:00
5665a93bc5
Relax dwarf line fragments. This fixes a crash in the included testcase.
...
llvm-svn: 118365
2010-11-07 02:07:12 +00:00
0530c024b6
implement aliases for div/idiv that have an explicit A register operand,
...
implementing rdar://8431864
llvm-svn: 118364
2010-11-06 22:41:18 +00:00
9654e108d7
add aliases for movs between seg registers and mem. There are multiple
...
different forms of this instruction (movw/movl/movq) which we reported
as being ambiguous. Since they all do the same thing, gas just picks the
one with the shortest encoding. Follow its lead here.
This implements rdar://8208615
llvm-svn: 118362
2010-11-06 22:35:34 +00:00
ca7801e472
go to great lengths to work around a GAS bug my previous patch
...
exposed:
GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.
Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).
As such, switch the canonical form of this instruction to "pi" instead
of "ip". This makes the code generator and disassembler generate pi,
avoiding the gas bug.
llvm-svn: 118356
2010-11-06 21:37:06 +00:00
64f91b9825
rework the rotate-by-1 instructions to be defined like the
...
shift-by-1 instructions, where the asmstring doesn't contain
the implicit 1. It turns out that a bunch of these rotate
instructions were completely broken because they used 1
instead of $1.
This fixes assembly mismatches on "rclb $1, %bl" and friends,
where we used to generate the 3 byte form, we now generate the
proper 2-byte form.
llvm-svn: 118355
2010-11-06 21:23:40 +00:00
05031e7f1a
change the fp comparison instructions to not have %st0 explicitly
...
listed in its asm string, for consistency with the other similar
instructions.
llvm-svn: 118354
2010-11-06 20:55:09 +00:00
fab9413b01
correct suffix matching to search for s/l/t suffixes on
...
floating point stack instructions instead of looking for b/w/l/q.
This fixes issues where we'd accidentally match fistp to fistpl,
when it is in fact an ambiguous instruction.
This changes the behavior of llvm-mc to reject fstp, which was the
correct fix for rdar://8456389:
t.s:1:1: error: ambiguous instructions require an explicit suffix (could be 'fstps', 'fstpl', or 'fstpt')
fstp (%rax)
it also causes us to correctly reject fistp and fist, which addresses
PR8528:
t.s:2:1: error: ambiguous instructions require an explicit suffix (could be 'fistps', or 'fistpl')
fistp (%rax)
^
t.s:3:1: error: ambiguous instructions require an explicit suffix (could be 'fists', or 'fistl')
fist (%rax)
^
Thanks to Ismail Donmez for tracking down the issue here!
llvm-svn: 118346
2010-11-06 18:28:02 +00:00
30c4892ea5
Add codegen and encoding support for the immediate form of vbic.
...
llvm-svn: 118291
2010-11-05 19:27:46 +00:00
c002463ac4
Add encoding for VSTR.
...
llvm-svn: 118220
2010-11-04 00:59:42 +00:00
bc9b31c493
Covert VORRIMM to be produced via early target-specific DAG combining, rather than legalization.
...
This is both the conceptually correct place for it, as well as allowing it to be more aggressive.
llvm-svn: 118204
2010-11-03 23:15:26 +00:00
0747307049
Add support for code generation of the one register with immediate form of vorr.
...
We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.
llvm-svn: 118201
2010-11-03 22:44:51 +00:00
bb81f80af6
Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead,
...
all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.
llvm-svn: 118183
2010-11-03 18:16:27 +00:00
e84eb99cbb
The MC code couldn't handle ARM LDR instructions with negative offsets:
...
vldr.64 d1, [r0, #-32]
The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.
llvm-svn: 118144
2010-11-03 01:49:29 +00:00
11d21e8e78
chase owen.
...
llvm-svn: 118124
2010-11-02 23:55:24 +00:00
d0502c1777
tweak this to pass.
...
llvm-svn: 118122
2010-11-02 23:50:17 +00:00
daf7a2a7de
temporarily xfail this.
...
llvm-svn: 118120
2010-11-02 23:44:50 +00:00
603bd8f54c
Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work
...
with immediates up to 16-bits in size. The same logic is applied to other LDR
encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in
VLDR's case). Removing the "12" allows it to be more generic.
llvm-svn: 118094
2010-11-02 22:31:46 +00:00
dec87e10fd
Provide correct encodings for the remaining vst variants that we currently generate.
...
llvm-svn: 118087
2010-11-02 22:18:18 +00:00
b95618cfe0
Add correct encodings for basic variants for vst3 and vst4.
...
llvm-svn: 118082
2010-11-02 21:47:03 +00:00
fa08e1e277
Add correct encodings for the basic variants for vst2.
...
llvm-svn: 118068
2010-11-02 21:16:58 +00:00
87c62e54e6
Add correct encodings for the basic form of vst1.
...
llvm-svn: 118067
2010-11-02 21:06:06 +00:00
a83859539f
Add correct encodings for the rest of the vld instructions that we generate.
...
llvm-svn: 118053
2010-11-02 20:40:59 +00:00
5e874982f2
Add support for expressions in .sleb/.uleb directives.
...
llvm-svn: 118023
2010-11-02 17:22:24 +00:00
526ffd57d2
Add correct NEON encodings for vld2, vld3, and vld4 basic variants.
...
llvm-svn: 117997
2010-11-02 01:24:55 +00:00
ad40234eff
Add correct NEON encodings for the "multiple single elements" form of vld.
...
llvm-svn: 117984
2010-11-02 00:05:05 +00:00
793af5fa07
Use ARM-style comments.
...
llvm-svn: 117955
2010-11-01 21:16:39 +00:00
cd9da22f68
Use ARM-style comment syntax.
...
llvm-svn: 117941
2010-11-01 18:33:37 +00:00
083ddf7d6a
Covert this test to .s form.
...
llvm-svn: 117939
2010-11-01 18:30:39 +00:00
a7d985738c
Convert this test to .s form.
...
llvm-svn: 117938
2010-11-01 18:26:43 +00:00
e5271a935a
Covert this test to .s form.
...
llvm-svn: 117937
2010-11-01 18:13:11 +00:00
051b7893dd
Covert this test to .s form.
...
llvm-svn: 117935
2010-11-01 18:03:16 +00:00
55ebc962ab
Fix test.
...
llvm-svn: 117932
2010-11-01 17:10:53 +00:00
13ddd6d410
Write the line info to .debug_line.
...
llvm-svn: 117930
2010-11-01 17:07:14 +00:00
0190a649e8
Mark ARM subtarget features that are available for the assembler.
...
llvm-svn: 117929
2010-11-01 16:59:54 +00:00
144fb8af58
Add support for .value.
...
llvm-svn: 117922
2010-11-01 15:29:07 +00:00
1614597873
Implement .weakref.
...
llvm-svn: 117911
2010-11-01 14:28:48 +00:00
1acd6b1edc
"mov[zs]x (mem), GR16" are not ambiguous: the mem
...
must be 8 bits. Support this memory form.
llvm-svn: 117902
2010-11-01 05:41:10 +00:00
dd3b09c234
Implement enough of the missing instalias support to get
...
aliases installed and working. They now work when the
matched pattern and the result instruction have exactly
the same operand list.
This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.
Note that we do not accept instructions like:
movzx 0(%rsp), %rsi
GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand. It could be 8/16/32 bits.
llvm-svn: 117901
2010-11-01 05:34:34 +00:00
fccb9d032f
Convert this test to .s form.
...
llvm-svn: 117900
2010-11-01 05:23:58 +00:00
178f4bb62d
make the asm matcher emitter reject instructions that have comments
...
in their asmstring. Fix the two x86 "NOREX" instructions that have them.
If these comments are important, the instlowering stuff can print them.
llvm-svn: 117897
2010-11-01 04:44:29 +00:00
4d9f157203
fix an encoding mismatch where "sal %eax, 1" was not using the short encoding
...
for shl. Caught by inspection.
llvm-svn: 117820
2010-10-30 18:13:10 +00:00
e490b5c29e
add a test for the ud2a alias.
...
llvm-svn: 117803
2010-10-30 17:01:25 +00:00
193961bb1a
Some instructions end with an "ls" prefix, but it doesn't indicate that they are
...
conditional. Check for those instructions explicitly.
llvm-svn: 117747
2010-10-29 23:50:21 +00:00
45834a0065
Be more strict on when we produce an undefined reference. In gas a file with
...
just
.type foo,@object
will produce an undefined reference to foo. On the other hand, a file with
just
.weakref bar, foo
will not. It is somewhat hard to support both in MC since both statements
should create the symbols. It should be possible if we really need to by
adding to the flags, but hopefully that is not necessary.
With this patch we do not produce a undefined reference in any of those cases.
The assembly file needs an actual use for the undefined reference to be
present.
This is in preparation for a patch implementing .weakref.
llvm-svn: 117735
2010-10-29 23:09:31 +00:00
72dfc6a7c7
Convert this test to .s form.
...
llvm-svn: 117708
2010-10-29 20:39:19 +00:00
665b9e37ff
Convert this test to .s form.
...
llvm-svn: 117704
2010-10-29 20:23:45 +00:00
fe4b52a066
Convert this test to .s form.
...
llvm-svn: 117699
2010-10-29 20:17:07 +00:00
0093f9a634
Convert this test to .s form.
...
llvm-svn: 117696
2010-10-29 20:12:34 +00:00
ede9d861db
Covert this test to .s form.
...
llvm-svn: 117694
2010-10-29 19:56:07 +00:00
6f9cd06ff9
Convert this test to .s form.
...
llvm-svn: 117693
2010-10-29 19:51:11 +00:00
3ad831ac77
Convert this test to .s form.
...
llvm-svn: 117690
2010-10-29 19:45:32 +00:00
302596e5e1
Convert this test to .s form.
...
llvm-svn: 117689
2010-10-29 19:37:05 +00:00
efdf57afdc
Convert this test to .s form.
...
llvm-svn: 117686
2010-10-29 19:17:08 +00:00
221b524fe1
Convert this test to .s form.
...
llvm-svn: 117685
2010-10-29 19:09:08 +00:00
b916206545
Covert this test to .s form.
...
llvm-svn: 117684
2010-10-29 19:05:26 +00:00
733d1b1a60
Convert this test to .s form.
...
llvm-svn: 117683
2010-10-29 18:58:30 +00:00
7d23a78188
Convert this test to .s form.
...
llvm-svn: 117682
2010-10-29 18:48:59 +00:00
7eed15242d
Convert this file to less fragile .s form.
...
llvm-svn: 117681
2010-10-29 18:41:40 +00:00
13ff53e7b6
Replace this test with the less fragile .s version. Still XFAIL'd, since the ASM parser doesn't parse vabal yet.
...
llvm-svn: 117679
2010-10-29 18:31:26 +00:00
66aa87021c
Covert this test to a .s file to reduce fragility.
...
llvm-svn: 117676
2010-10-29 18:18:40 +00:00
b101af04b4
Convert this test to a .s file, so that it's not sensitive to codegen changes.
...
llvm-svn: 117633
2010-10-29 01:01:56 +00:00
5d6f6a061b
add simple support for addrmode5 operands, allowing
...
vldr.64 to work. I have no idea if this is fully right, but
it is in the right direction.
llvm-svn: 117626
2010-10-29 00:27:31 +00:00
8aefb66376
Improvements to .section parsing:
...
* If we have a M or a G, reject sections without the type
* Only parse the flag specific arguments if we have M or G
* Parse the corresponding arguments for M and G
We ignore the G arguments and flag for now.
llvm-svn: 117608
2010-10-28 21:33:33 +00:00
327a61423b
most simple arm instructions match correctly now,
...
it looks like we're not handling [] operands though
llvm-svn: 117607
2010-10-28 21:31:07 +00:00
1be0697ab9
fix the asmmatcher generator to handle targets with no RegisterPrefix
...
(like ARM) correctly. With this change, we can now match "bx lr"
because we recognize lr as a register.
llvm-svn: 117606
2010-10-28 21:28:42 +00:00
63760ba38e
Add support for the .string directive.
...
llvm-svn: 117592
2010-10-28 20:02:27 +00:00
3c5a54e4b9
Defined weak symbols should have non-zero value.
...
llvm-svn: 117585
2010-10-28 19:39:57 +00:00
29f70afbae
Fix relocations with renamed symbols.
...
llvm-svn: 117575
2010-10-28 19:08:03 +00:00
6cd76e63f8
Aliases defined with .symver should copy the binding of the symbols they alias.
...
Move the existing patching for undefined symbols so that all the patching
is done in the same function.
llvm-svn: 117570
2010-10-28 18:33:03 +00:00
fdac6365ab
Implement .equ directive as a synonym to .set.
...
llvm-svn: 117553
2010-10-28 16:22:58 +00:00
936ba3af28
Implement R_X86_64_DTPOFF32.
...
llvm-svn: 117548
2010-10-28 15:11:03 +00:00
2dbec3f762
Implement TLSLD.
...
llvm-svn: 117547
2010-10-28 15:02:40 +00:00
e8f08be11c
Implement DTPOFF.
...
llvm-svn: 117546
2010-10-28 14:48:59 +00:00
6f23eb380d
Implement TLSLDM.
...
llvm-svn: 117544
2010-10-28 14:37:09 +00:00
b3b49bbc39
Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind.
...
llvm-svn: 117543
2010-10-28 14:22:44 +00:00
0165e25564
Disable most of the ARM vfp / NEON MC tests. These are too fragile to be useful.
...
I'll work with Jim, Owen, and Bill on an alternative testing strategy until
the assembly parser is available.
llvm-svn: 117530
2010-10-28 06:46:17 +00:00
2ef668840a
Add correct NEON encodings for vtbl and vtbx.
...
llvm-svn: 117513
2010-10-28 00:18:46 +00:00
14be930317
Add correct NEON encodings for vext, vtrn, vuzp, and vzip.
...
llvm-svn: 117512
2010-10-27 23:56:39 +00:00
9f371e7efa
Tests for NEON encoding of vrev.
...
llvm-svn: 117502
2010-10-27 22:54:49 +00:00
fadb951e5b
Provide correct encodings for NEON vcvt, which has its own special immediate encoding
...
for specifying fractional bits for fixed point conversions.
llvm-svn: 117501
2010-10-27 22:49:00 +00:00
ed9652f959
Provide correct encodings for the get_lane and set_lane variants of vmov.
...
llvm-svn: 117495
2010-10-27 21:28:09 +00:00
f8537165bd
Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE.
...
llvm-svn: 117494
2010-10-27 21:23:52 +00:00
5e7cb5fc27
Added the x86 instruction ud2b (2nd official undefined instruction).
...
llvm-svn: 117485
2010-10-27 20:46:49 +00:00
24c8b04d5f
Implement R_X86_64_GOTTPOFF, R_X86_64_TLSGD and R_X86_64_TPOFF32.
...
llvm-svn: 117481
2010-10-27 20:28:07 +00:00
40d24a4abf
Provide correct NEON encodings for vdup.
...
llvm-svn: 117475
2010-10-27 19:25:54 +00:00
095fa9e5cc
Set default type and flags for .init and .fini.
...
llvm-svn: 117471
2010-10-27 18:45:20 +00:00
fbdeab911a
Tests for NEON encoding of vmovl, vmovn, vqmovn, and vqmovun.
...
llvm-svn: 117469
2010-10-27 18:17:12 +00:00
5fa98baef7
Tests for NEON encoding of vcls, vclz, and vcnt.
...
llvm-svn: 117466
2010-10-27 18:05:25 +00:00
6b5af599c0
Tests for NEON encoding of vneg and vqneg.
...
llvm-svn: 117463
2010-10-27 17:57:26 +00:00
26496e6835
Produce an error for an invalid use of .symver.
...
llvm-svn: 117462
2010-10-27 17:56:18 +00:00
1e5eb98ed8
Tests for NEON encoding of vabs and vqabs.
...
llvm-svn: 117460
2010-10-27 17:50:07 +00:00
8576a42cf3
Add correct NEON encodings for vsli and vsri.
...
llvm-svn: 117459
2010-10-27 17:40:08 +00:00
d7e8135e1e
Add correct NEON encodings for vsra and vrsra.
...
llvm-svn: 117458
2010-10-27 17:29:29 +00:00
cc1b168ef6
Symbols defined as the difference of other two end up in the ABS section.
...
llvm-svn: 117451
2010-10-27 16:04:30 +00:00
eb0c2c170d
Add support for the .symver directive. This is really ugly, but most of it is
...
contained in the ELF object writer.
llvm-svn: 117448
2010-10-27 15:18:17 +00:00
9ad2166899
Yet another tweak to X86 instructions to add ud2a as an alias to ud2
...
(still to add ud2b).
llvm-svn: 117435
2010-10-27 03:01:02 +00:00
20b021c970
Another tweak to X86 instructions to add the missing flex instruction (without
...
the wait prefix).
llvm-svn: 117434
2010-10-27 02:53:04 +00:00
a1917c7555
Tweaks to X86 instructions to allow the 'w' suffix in places it makes
...
sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler
allows for these instructions. Done differently than in r117031 that
caused a valgrind error which was later reverted.
llvm-svn: 117433
2010-10-27 02:32:19 +00:00
ba985d9dd5
Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc
...
will accept versions that the darwin assembler allows. Forms ending in "pi" and
forms without all the operands.
llvm-svn: 117427
2010-10-27 00:59:28 +00:00
825b2d1946
Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun.
...
llvm-svn: 117411
2010-10-26 22:50:46 +00:00
2888e2c7f9
Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn.
...
llvm-svn: 117402
2010-10-26 21:58:41 +00:00
c4126a1a2c
Add tests for NEON encoding of vshll.
...
llvm-svn: 117399
2010-10-26 21:21:47 +00:00
0fbb20769f
Tests for NEON encoding of vshr.
...
llvm-svn: 117396
2010-10-26 21:08:42 +00:00
3665fee8de
Provide correct NEON encodings for vshl, register and immediate forms.
...
llvm-svn: 117394
2010-10-26 20:56:57 +00:00
c9fb35e73b
Add support for .ident.
...
llvm-svn: 117389
2010-10-26 19:35:47 +00:00
db192ba90f
Tests for NEON encoding of vrecpe, vrecps, vrsqrte, and vsqrts.
...
llvm-svn: 117385
2010-10-26 18:43:13 +00:00
b3bcf529fc
Tests for NEON encodings of vpmin and vpmax.
...
llvm-svn: 117382
2010-10-26 18:31:47 +00:00
691ce68d3c
Add correct NEON encoding for vpadal.
...
llvm-svn: 117380
2010-10-26 18:18:03 +00:00
Rafael Espindola