Commit Graph

17 Commits

Author SHA1 Message Date
Craig Topper cfe3b0005f [RISCV] Reorder masked builtin operands. Use clang_builtin_alias for all overloaded vector builtins.
This patch makes the builtin operand order match the C operand order
for all intrinsics. With this we can use clang_builtin_alias for
all overloaded intrinsics.

This should further reduce the test time for vector intrinsics.

Differential Revision: https://reviews.llvm.org/D101700
2021-05-02 10:57:25 -07:00
Hsiangkai Wang d8fa5ef6a2 [RISCV] Apply clang_builtin_alias to overloaded builtins.
We only apply `clang_builtin_alias` to non-masked builtins.
Masked builtins could not use `clang_builtin_alias` because the
operand order is different between overloaded intrinsics and builtins.

A bunch of test cases need to be updated.

Differential Revision: https://reviews.llvm.org/D100658
2021-04-25 18:12:19 +08:00
Hsiangkai Wang 14cc1cb222 [RISCV] Implement the vneg.v builtin.
Differential Revision: https://reviews.llvm.org/D100819
2021-04-23 11:40:18 +08:00
ShihPo Hung 11072a0bdb [RISCV][Clang] Add RVV AMO builtins
Add vamo[swap/add/xor/and/or/min/max/minu/maxu] builtins.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D100448
2021-04-21 01:48:02 -07:00
Zakk Chen 8f683366af [RISCV][Clang] Add RVV miscellaneous intrinsic functions.
1. vreinterpret
2. vundefined
3. LMUL truncation and extension.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D100391
2021-04-16 09:41:19 -07:00
Zakk Chen ea5d33dbc1 [RISCV][Clang] Add vmv and vfmv series intrinsic functions.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Reviewed By: craig.topper, Jim

Differential Revision: https://reviews.llvm.org/D100266
2021-04-14 22:22:39 -07:00
Zakk Chen a8fc0e445c [RISCV][Clang] Add all RVV Mask intrinsic functions.
1. Redefine vpopc and vfirst IR intrinsic so it could adapt on
clang tablegen generator which always appends a type for vl
in IntrinsicType of clang codegen.
2. Remove `c` type transformer and add `u` and `l` for unsigned long
and long type.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D100120
2021-04-11 19:19:02 -07:00
Zakk Chen 01fa222b6d [RISCV][Clang] Add RVV Type-Convert intrinsic functions.
Fix extension macro condition.

Support below instructions:
1. Single-Width Floating-Point/Integer Type-Convert Instructions
2. Widening Floating-Point/Integer Type-Convert Instructions
3. Narrowing Floating-Point/Integer Type-Convert Instructions

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D99742
2021-04-11 19:19:01 -07:00
Hsiangkai Wang 471ae42c04 [RISCV][Clang] Add RVV vleff intrinsic functions.
Reviewed By: craig.topper, liaolucy, jrtc27, khchen

Differential Revision: https://reviews.llvm.org/D99151
2021-04-10 17:10:19 +08:00
Zakk Chen 821547cabb [RISCV][Clang] Update new overloading rules for RVV intrinsics.
RVV intrinsics has new overloading rule, please see
82aac7dad4

Changed:
1. Rename `generic` to `overloaded` because the new rule is not using C11 generic.
2. Change HasGeneric to HasNoMaskedOverloaded because all masked operations
   support overloading api.
3. Add more overloaded tests due to overloading rule changed.

Differential Revision: https://reviews.llvm.org/D99189
2021-03-28 09:04:35 -07:00
Zakk Chen 88c2d4c8eb [RISCV][Clang] Add RVV Vector Indexed Load intrinsic functions.
Support Complex type transformer to define more complexity legal type.

Overall our downstream implementation there are only four instructions need to
use complex type transformer, it's not a common case.
I still feel using a string for prototypes is simple and clear.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D98848
2021-03-23 19:18:50 -07:00
Zakk Chen be947aded0 [RISCV][Clang] Add RVV vle/vse intrinsic functions.
Add new field PermuteOperands to mapping different operand order between
C/C++ API and clang builtin.

Reviewed By: craig.topper, rogfer01

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Differential Revision: https://reviews.llvm.org/D98388
2021-03-17 20:31:25 -07:00
Zakk Chen 95c0125f2b [Clang][RISCV] Add rvv vsetvl and vsetvlmax intrinsic functions.
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D96843
2021-03-17 20:26:06 -07:00
Jim Lin 678241795c [RISCV] Don't emit #undef BUILTIN from RISCVVEmitter.cpp
In BuiltinsRISCV.def, other extension 's intrinsics need to be defined by using macro BUILTIN.
So, it shouldn't undefine macro BUILTIN in the end of declaration for V intrinsics.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D98682
2021-03-16 14:57:45 +08:00
Simon Pilgrim d53866ff47 Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warnings. NFCI. 2021-03-11 10:29:14 +00:00
Craig Topper 9773cad519 [RISCV] Add additional checking to tablgen RISCVVEmitter requested in D95016.
This errors, but doesn't give source location. We'd need to pass
the Record through several layers to get to the location.

Reviewed By: jrtc27

Differential Revision: https://reviews.llvm.org/D98379
2021-03-10 19:46:25 -08:00
Zakk Chen d6a0560bf2 [Clang][RISCV] Add custom TableGen backend for riscv-vector intrinsics.
Demonstrate how to generate vadd/vfadd intrinsic functions

1. add -gen-riscv-vector-builtins for clang builtins.
2. add -gen-riscv-vector-builtin-codegen for clang codegen.
3. add -gen-riscv-vector-header for riscv_vector.h. It also generates
ifdef directives with extension checking, base on D94403.
4. add -gen-riscv-vector-generic-header for riscv_vector_generic.h.
Generate overloading version Header for generic api.
https://github.com/riscv/rvv-intrinsic-doc/blob/master/rvv-intrinsic-rfc.md#c11-generic-interface
5. update tblgen doc for riscv related options.

riscv_vector.td also defines some unused type transformers for vadd,
because I think it could demonstrate how tranfer type work and we need
them for the whole intrinsic functions implementation in the future.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Reviewed By: jrtc27, craig.topper, HsiangKai, Jim, Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D95016
2021-03-10 18:43:43 -08:00