Commit Graph

367329 Commits

Author SHA1 Message Date
Jez Ng f23f512691 [lld-macho] Support -bundle
Not 100% sure but it appears that bundles are almost identical to
dylibs, aside from the fact that they do not contain `LC_ID_DYLIB`. ld64's code
seems to treat bundles and dylibs identically in most places.

Supporting bundles allows us to run e.g. XCTests, as all test suites are
compiled into bundles which get dynamically loaded by the `xctest` test runner.

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D87856
2020-09-25 11:28:32 -07:00
Jez Ng e4e673e75a [lld-macho] Implement support for PIC
* Implement rebase opcodes. Rebase opcodes tell dyld where absolute
  addresses have been encoded in the binary. If the binary is not loaded
  at its preferred address, dyld has to rebase these addresses by adding
  an offset to them.
* Support `-pie` and use it to test rebase opcodes.

This is necessary for absolute address references in dylibs, bundles etc
to work.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D87199
2020-09-25 11:28:31 -07:00
clementval 06104cb9f2 [NFC] Fix comment for DataOp 2020-09-25 14:27:43 -04:00
Sourabh Singh Tomar d2f1f53043 [flang][OpenMP] Place the insertion point to the start of the block
After skeleton of the `Parallel Op` is created set the insertion point to start of the block. So that later `CodeGen` can proceed.

Note: This patch reflects the work that can be upstreamed from PR(merged)
PR: https://github.com/flang-compiler/f18-llvm-project/pull/424

Reviewed By: schweitz, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D88221
2020-09-25 23:56:41 +05:30
Matt Arsenault 55c4ff91bd OpaquePtr: Add type to sret attribute
Make the corresponding change that was made for byval in
b7141207a4. Like byval, this requires a
bulk update of the test IR tests to include the type before this can
be mandatory.
2020-09-25 14:07:30 -04:00
Florian Hahn 7d274aa9be [SCEV] Add support for `x != 0` to CollectCondition.
Add support for NE predicates with 0 constants. Those can be translated
to UMaxExpr(x, 1).
2020-09-25 18:58:55 +01:00
Florian Hahn 3a69ebf0ad [SCEV] Add another test using info from loop guards for BTC with NE. 2020-09-25 18:58:55 +01:00
Hans Wennborg 4f1897c6f0 Move PassBuilder::registerParseTopLevelPipelineCallback out-of-line
For some mysterious reason it doesn't build with clang-cl when compiled
as part of the includes in clang's CodeGenAction.cpp
(crbug.com/1132292).
2020-09-25 19:55:40 +02:00
Adrian Prantl 8055ae31f4 Revert "Add a verifier check that rejects non-distinct DISubprogram function"
This reverts commit e17f52d623.

while investigating bot breakage.
2020-09-25 10:52:19 -07:00
Matt Arsenault 6cb0d23f2e AArch64/GlobalISel: Narrow stack passed argument access size
This fixes a verifier error in the testcase from bug 47619.

The stack passed s3 value was widened to 4-bytes, and producing a
4-byte memory access with a < 1 byte result type. We need to either
widen the result type or narrow the access size. This copies the code
directly from the AMDGPU handling, which narrows the load size. I
don't like that every target has to handle this, but this is currently
broken on the 11 release branch and this is the simplest fix.

This reverts commit 42bfa7c63b.
2020-09-25 13:35:17 -04:00
Haruki Imai c1f8568031 [MLIR] Fix for updating function signature in normalizing memrefs
Normalizing memrefs failed when a caller of symbolic use in a function
can not be casted to `CallOp`. This patch avoids the failure by checking
the result of the casting. If the caller can not be casted to `CallOp`,
it is skipped.

Differential Revision: https://reviews.llvm.org/D87746
2020-09-25 22:56:56 +05:30
Fangrui Song 6caf3fb817 Fix Assembler/disubprogram.ll after e17f52d623 2020-09-25 10:26:35 -07:00
Baptiste Saleil 9b86b70094 [PowerPC] Add accumulator register class and instructions
This patch adds the xxmfacc, xxmtacc and xxsetaccz instructions to manipulate
accumulator registers. It also adds the ACC register class definition for the
accumulator registers.

Differential Revision: https://reviews.llvm.org/D84847
2020-09-25 12:25:13 -05:00
Fangrui Song 7d0556fc13 Fix DISubprogram-v4.ll after e17f52d623 2020-09-25 10:08:43 -07:00
Saleem Abdulrasool 76eb163259 Sema: remove unnecessary parameter for SwiftName handling (NFCI)
This code never actually did anything in the implementation.

`mergeDeclAttribute` is declared as `static`, and referenced exactly
once in the file: from `Sema::mergeDeclAttributes`.

`Sema::mergeDeclAttributes` sets `LocalAMK` to `AMK_None`.  If the
attribute is `DeprecatedAttr`, `UnavailableAttr`, or `AvailabilityAttr`
then the `LocalAMK` is updated.  However, because we are dealing with a
`SwiftNameDeclAttr` here, `LocalAMK` remains `AMK_None`.  This is then
passed to the function which will as a result pass the value of
`AMK_None == AMK_Override` aka `false`.  Simply propagate the value
through and erase the dead codepath.

Thanks to Aaron Ballman for flagging the use of the availability merge
kind here leading to this simplification!

Differential Revision: https://reviews.llvm.org/D88263
Reviewed By: Aaron Ballman
2020-09-25 17:01:06 +00:00
Amara Emerson b5e87c9ef2 [AArch64][GlobalISel] Add selection support for <8 x s16> G_INSERT_VECTOR_ELT with GPR scalar.
Fixes the neon intrinsics test in the test suite.
2020-09-25 09:51:04 -07:00
Vedant Kumar 62c372770d [profile] Add %t LLVM_PROFILE_FILE option to substitute $TMPDIR
Add support for expanding the %t filename specifier in LLVM_PROFILE_FILE
to the TMPDIR environment variable. This is supported on all platforms.

On Darwin, TMPDIR is used to specify a temporary application-specific
scratch directory. When testing apps on remote devices, it can be
challenging for the host device to determine the correct TMPDIR, so it's
helpful to have the runtime do this work.

rdar://68524185

Differential Revision: https://reviews.llvm.org/D87332
2020-09-25 09:39:40 -07:00
Rahul Joshi 2d128b04d9 [NFC] Fix build warnings 2020-09-25 09:35:41 -07:00
Florian Hahn b5a3b901c7 [SCEV] Add support for `x == constant` to CollectCondition.
Add support for EQ predicates with constant operand. In that case, using
the constant instead of an unknown expression should always be
beneficial.
2020-09-25 16:56:49 +01:00
Dávid Bolvanský 179e15d53a [SystemZ] Optimize bcmp calls (PR47420)
Solves https://bugs.llvm.org/show_bug.cgi?id=47420

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D87988
2020-09-25 17:55:39 +02:00
David Tenty c74da051b8 [CMake] Make sure _cmake_system_name has a default
We currently try to pick it up from the CMake arguments passed to llvm_ExternalProject_Add but
if there isn't an explicit option passed, we should reflect CMake's own default behaviour
of targeting the host, since we'll make decisions about what tools to use for the build based on
the setting. Otherwise, we'll get different behaviour between configuring an external project with
the default target and configuring with an explicit one targeting the same platform.

Reviewed By: stevewan, hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D88157
2020-09-25 11:33:12 -04:00
Louis Dionne 2a11a197af [libc++][ci] Don't require passing --token to phabricator-report
The CONDUIT_TOKEN is already taken from the environment. Also, disable
reporting back to Phabricator for now until we're ready to start spamming
the results back. This still needs a bit of testing.
2020-09-25 11:19:19 -04:00
Rahul Joshi 8046ab04a7 [NFC] Fix syntax of ranked memrefs in the MLIR Language Reference.
- Eliminate incorrect |
- Eliminate memspace0 as the memory spaces currently are integer literals and memory
  space 0 is not explicitly printed.

Differential Revision: https://reviews.llvm.org/D88171
2020-09-25 08:17:39 -07:00
Rahul Joshi 0b7f03b98d [NFC] Fix minor typos in comments and reuse concreteOp.
Differential Revision: https://reviews.llvm.org/D88242
2020-09-25 08:16:20 -07:00
Adrian Prantl e17f52d623 Add a verifier check that rejects non-distinct DISubprogram function
attachments. They would crash the backend, which expects all
DISubprograms that are not part of the type system to have a unit field.

Clang right before https://reviews.llvm.org/D79967 would generate this
kind of broken IR.

rdar://problem/69534688
2020-09-25 08:15:16 -07:00
Cameron McInally 9a4767411e [SVE] Revert accidental change from 405e22fbe8719cff6c40eec15c2044f42527f116
Accidentally commited two lines that were not intended. Remove those.
2020-09-25 10:11:10 -05:00
Cameron McInally e2ccf7f178 [SVE] Lower fixed length VECREDUCE_[SMAX|SMIN] to Scalable
This patch is pretty similar to the VECREDUCE_ADD patch, with some minor tweaks.

Results from the AArch64ISD::[SMAX|SMIN]V_PRED return element sized results. This requires an ANY_EXTEND for results < 32-bits, since Legalization promotes those results.

There is no NEON i64 vector support for SMAXV|SMINV, so use SVE for those.

Differential Revision: https://reviews.llvm.org/D88259
2020-09-25 09:58:17 -05:00
David Tenty e03dd978d0 [AIX] Try to not use LLVM tools while building runtimes
Since 64-bit XCOFF and the big AR format is not yet supported in some of these tools, this patch avoids additional setup of these tools. This patch is not intended to prevent picking up the LLVM tools if they happen to be available otherwise.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D85329
2020-09-25 10:55:24 -04:00
Florian Hahn 8858340bd3 [SCEV] Swap operands if LHS is not unknown.
Currently we only use information from guards for unknown expressions.
Swap LHS/RHS and predicate, if LHS is not unknown.
2020-09-25 15:50:01 +01:00
Stefan Pintilie 8c53282d64 [PowerPC][NFC] Merged two switch entries.
Two switch entries did exactly the same thing. This patch merges them.
2020-09-25 09:49:13 -05:00
Simon Pilgrim 132f29ce06 [InstCombine] Add some extra bswap tests from PR39793
Also test for cases where recognizeBSwapOrBitReverseIdiom checks for a truncated bswap pattern.
2020-09-25 15:46:19 +01:00
Aaron Ballman a51d51a0d4 Fix some of the more egregious 80-col and whitespace issues; NFC 2020-09-25 10:37:38 -04:00
Simon Pilgrim 8d90d92f0d [InstCombine] Add 'partial' bswap tests from PR39793
Tests for basic zext(bswap(trunc(x))) patterns shown on PR39793
2020-09-25 15:28:21 +01:00
Aaron Ballman 85cea77ecb Typo fix; NFC 2020-09-25 10:26:29 -04:00
Florian Hahn df77ce7cad [SCEV] Extract code to collect conditions to lambda (NFC).
This makes re-using the common functionality easier in follow-up
patches.
2020-09-25 15:12:42 +01:00
Louis Dionne 9f21d341e8 [libc++] Initial support for pre-commit CI with Buildkite
This commit adds basic files and scripts that are used for the Buildkite
pre-commit CI setup. This was tested to mostly work on a fork of llvm-project,
however some adjustments will have to be made as we complete the real
setup.
2020-09-25 09:51:10 -04:00
Florian Hahn 1fa06162c1 [SCEV] Add more tests using info from loop guards for BTC. 2020-09-25 14:18:58 +01:00
LLVM GN Syncbot 9112567bbd [gn build] Port e336b74c99 2020-09-25 12:13:19 +00:00
Benjamin Kramer 6a1bca8798 [Analyzer] Fix unused variable warning in Release builds
clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp:377:19: warning: unused variable 'Init'
2020-09-25 14:09:43 +02:00
Manuel Klimek e336b74c99 [clang-format] Add a MacroExpander.
Summary:
The MacroExpander allows to expand simple (non-resursive) macro
definitions from a macro identifier token and macro arguments. It
annotates the tokens with a newly introduced MacroContext that keeps
track of the role a token played in expanding the macro in order to
be able to reconstruct the macro expansion from an expanded (formatted)
token stream.

Made Token explicitly copy-able to enable copying tokens from the parsed
macro definition.

Reviewers: sammccall

Subscribers: mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D83296
2020-09-25 14:08:13 +02:00
Aart Bik b8880f5f97 [mlir] [VectorOps] generalize printing support for integers
This generalizes printing beyond just i1,i32,i64 and also accounts
for signed and unsigned interpretation in the output.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D88290
2020-09-25 04:52:21 -07:00
Chris Bowler f330d9f163 [PPC] [AIX] Implement calling convention IR for C99 complex types on AIX
Add AIX calling convention logic to Clang for C99 complex types on AIX

Differential Revision: https://reviews.llvm.org/D88130
2020-09-25 07:43:31 -04:00
Simon Pilgrim 852447650c [InstCombine] Add bswap tests from funnel shift intrinsics
Based on (WIP) patch in D87452 - I'm intending to add the intrinsics handling to collectBitParts as a separate patch to make the changes clearer.
2020-09-25 12:40:23 +01:00
Stefan Pintilie d224175230 [PowerPC][LLD] Extend R2 save stub to support offsets of more than 26 bits
The R2 save stub will now support offsets up to 64 bits.

There are three cases that will be used.
1) The offset fits in 26 bits.
```
b <26 bit offset>
```
2) The offset does not fit in 26 bits but fits in 34 bits.
```
paddi r12, 0, <34 bit offset>, 1
mtctr r12
bctr
```
3) The offset does not fit in 34 bits. Since this is an R2 save stub we can use
the TOC in R2. We are not loading the offset but the actual address we want to
branch to.
```
addis r12, r2, <address in TOC lo>
ld r12 <address in TOC hi>(r12)
mtctr r12
bctr
```

In case 1) the stub is only 8 bytes while in cases 2) and 3) the stub will be
20 bytes.

Reviewed By: MaskRay, sfertile, NeHuang

Differential Revision: https://reviews.llvm.org/D87916
2020-09-25 06:39:14 -05:00
Whisperity 9d2ef5e74e [CMake][CTE] Add "check-clang-extra-..." targets to test only a particular Clang extra tool
Create targets `check-clang-extra-clang-tidy`, `check-clang-extra-clang-query`
similar to how `check-clang-sema`, `check-clang-parser`, etc. are
auto-generated from the directory structure.

This allows running only a particular sub-tool's tests, not having to wait
through the entire `check-clang-tools` execution.

Differential Revision: http://reviews.llvm.org/D84176
2020-09-25 13:32:56 +02:00
Adam Balogh facad21b29 [Analyzer] Fix for `ExprEngine::computeObjectUnderConstruction()` for base and delegating consturctor initializers
For /C++/ constructor initializers `ExprEngine:computeUnderConstruction()`
asserts that they are all member initializers. This is not neccessarily
true when this function is used to get the return value for the
construction context thus attempts to fetch return values of base and
delegating constructor initializers result in assertions. This small
patch fixes this issue.

Differential Revision: https://reviews.llvm.org/D85351
2020-09-25 13:28:22 +02:00
Momchil Velikov a88c722e68 [AArch64] PAC/BTI code generation for LLVM generated functions
PAC/BTI-related codegen in the AArch64 backend is controlled by a set
of LLVM IR function attributes, added to the function by Clang, based
on command-line options and GCC-style function attributes. However,
functions, generated in the LLVM middle end (for example,
asan.module.ctor or __llvm_gcov_write_out) do not get any attributes
and the backend incorrectly does not do any PAC/BTI code generation.

This patch record the default state of PAC/BTI codegen in a set of
LLVM IR module-level attributes, based on command-line options:

* "sign-return-address", with non-zero value means generate code to
  sign return addresses (PAC-RET), zero value means disable PAC-RET.

* "sign-return-address-all", with non-zero value means enable PAC-RET
  for all functions, zero value means enable PAC-RET only for
  functions, which spill LR.

* "sign-return-address-with-bkey", with non-zero value means use B-key
  for signing, zero value mean use A-key.

This set of attributes are always added for AArch64 targets (as
opposed, for example, to interpreting a missing attribute as having a
value 0) in order to be able to check for conflicts when combining
module attributed during LTO.

Module-level attributes are overridden by function level attributes.
All the decision making about whether to not to generate PAC and/or
BTI code is factored out into AArch64FunctionInfo, there shouldn't be
any places left, other than AArch64FunctionInfo, which directly
examine PAC/BTI attributes, except AArch64AsmPrinter.cpp, which
is/will-be handled by a separate patch.

Differential Revision: https://reviews.llvm.org/D85649
2020-09-25 11:47:14 +01:00
Jay Foad f11f382523 [AMDGPU] Fix declaration parameter names to match definition
This fixes the declaration of AMDGPULegalizerInfo::legalizeBufferLoad to
match the definition. It is still confusing that that parameter order is
different from legalizeBufferStore.

https://bugs.llvm.org/show_bug.cgi?id=47535
2020-09-25 11:38:17 +01:00
Jay Foad b34ddfcc76 [SplitKit] In addDeadDef tolerate parent range that defines more lanes
Following on from D87757 "[SplitKit] Only copy live lanes", in
SplitEditor::addDeadDef, when we're checking whether the parent live
interval has a subrange defining the same lanes, tolerate the case
where the parent subrange defines a superset of the lanes. This can
happen when the child subrange comes from SplitEditor::buildCopy
decomposing a partial copy into a sequence of subreg copies that cover
the required lanes.

Differential Revision: https://reviews.llvm.org/D88020
2020-09-25 11:31:56 +01:00
Simon Pilgrim 42bfa7c63b Revert rGe55410f8b260 : "AArch64/GlobalISel: Add testcase for bug 47619"
This reverts commit e55410f8b2.

This is failing on EXPENSIVE_CHECKS buildbots
2020-09-25 11:31:14 +01:00