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134 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen 374ed322f2 Add a new kind of MachineOperand: MO_RegisterMask. 
Register masks will be used as a compact representation of large clobber
lists.  Currently, an x86 call instruction has some 40 operands
representing call-clobbered registers.  That's more than 1kB of useless
operands per call site.

A register mask operand references a bit mask of call-preserved
registers, everything else is clobbered.  The bit mask will typically
come from TargetRegisterInfo::getCallPreservedMask().

By abandoning ImplicitDefs for call-clobbered registers, it also becomes
possible to share call instruction descriptions between calling
conventions, and we can get rid of the WINCALL* instructions.

This patch introduces the new operand kind.  Future patches will add
RegMask support to target-independent passes before finally the fixed
clobber lists can be removed from call instruction descriptions.

llvm-svn: 148250
 2012-01-16 19:22:00 +00:00
Joe Abbey 36cd89e7bd Adding a Hexagon cell for segmented stacks, as they have been implemented for X86 and not Sparc... 
Committed as obvious

llvm-svn: 148237
 2012-01-16 13:16:05 +00:00
Evan Cheng c984bf8fb0 Add high level description of MachineInstr bundles. 
llvm-svn: 146589
 2011-12-14 21:32:14 +00:00
Tony Linthicum 1213a7a57f Hexagon backend support 
llvm-svn: 146412
 2011-12-12 21:14:40 +00:00
Anshuman Dasgupta bcfa2f83fb Add documentation for machine-independent DFA packetizer 
llvm-svn: 145988
 2011-12-06 23:12:42 +00:00
Rafael Espindola b61cc44265 grammar. 
llvm-svn: 145423
 2011-11-29 19:38:09 +00:00
Rafael Espindola c87cebf2bf Fix spelling/grammar errors found by Duncan. 
llvm-svn: 145250
 2011-11-28 17:06:58 +00:00
Rafael Espindola 799ca897e7 Add a description of the status of segmented stacks. 
llvm-svn: 145201
 2011-11-27 22:05:46 +00:00
NAKAMURA Takumi a35cdd68cf docs/*.html: Fix markups. 
llvm-svn: 143349
 2011-10-31 13:04:26 +00:00
Dan Gohman 4c9fca99c9 Remove the Alpha backend. 
llvm-svn: 143164
 2011-10-27 22:56:32 +00:00
Bruno Cardoso Lopes 4f6d7d489f According to Mips folks, the backend is now generally reliable (they can 
compile and use a bunch of stuff using o32 abi). Also the rt-rk.com team
claims that the JIT support they contributed, is complete for the mips
"static" relocation model.

llvm-svn: 142950
 2011-10-25 20:09:31 +00:00
Dan Gohman b43c36f391 Remove the Blackfin backend. 
llvm-svn: 142880
 2011-10-25 00:05:42 +00:00
Dan Gohman dfc96aea90 Remove the SystemZ backend. 
llvm-svn: 142878
 2011-10-24 23:48:32 +00:00
Jakob Stoklund Olesen 1c4831764c X86 has asterisk-free inline asm support now. 
Floating point stack inline asm works.

llvm-svn: 140033
 2011-09-19 18:15:46 +00:00
Justin Holewinski 6c6a7fd692 PTX: Add basic documentation to CodeGenerator.html 
llvm-svn: 137315
 2011-08-11 17:34:16 +00:00
Roman Divacky 2fbb48ae20 Fix a typo. 
llvm-svn: 136646
 2011-08-01 20:38:27 +00:00
Andrew Trick e69a19569b Updating stale documentation on regalloc modes. 
llvm-svn: 136112
 2011-07-26 18:31:49 +00:00
Bill Wendling dd7805a24d Describe the reasoning for compact unwind in better terms. Thanks to Nick Kledzik for the description. 
llvm-svn: 136064
 2011-07-26 07:58:09 +00:00
Bill Wendling e2225058ac Fix some typos. 
llvm-svn: 135956
 2011-07-25 20:25:03 +00:00
Bill Wendling c708441e3f An initial description of the compact unwind encoding. 
llvm-svn: 135955
 2011-07-25 20:19:48 +00:00
Chris Lattner f98eadee17 document thiscall, PR9101 
llvm-svn: 131873
 2011-05-22 22:28:47 +00:00
Bill Wendling 260c4a9466 Document the automatic alias printing of InstAliases. 
llvm-svn: 130889
 2011-05-04 23:40:14 +00:00
NAKAMURA Takumi aa3d6242cf docs: Introduce cascading style <div> and <p> continued on <h[2-5]>. 
<h2>Section Example</h2>
<div> <!-- h2+div is applied -->
<p>Section preamble.</p>

<h3>Subsection Example</h3>
<p> <!-- h3+p is applied -->
Subsection body
</p>

<!-- End of section body -->
</div>

FIXME: Care H5 better.
llvm-svn: 130040
 2011-04-23 00:30:22 +00:00
NAKAMURA Takumi fc8d930f6e docs: Use <Hn> as Heading elements instead of <DIV class="doc_foo">. 
H1 ... doc_title
H2 ... doc_section
H3 ... doc_subsection
H4 ... doc_subsubsection

llvm-svn: 129736
 2011-04-18 23:59:50 +00:00
Jay Foad fdb9f6a3ca Fix typo. 
llvm-svn: 129437
 2011-04-13 13:03:56 +00:00
NAKAMURA Takumi ca46f5a3b5 docs: Canonicalize URLs. 
llvm-svn: 129181
 2011-04-09 02:13:37 +00:00
Jay Foad 1a7cc44157 Trivial typo fixes. 
llvm-svn: 128996
 2011-04-06 07:55:30 +00:00
Chris Lattner 17c170a8e0 Finish up the first draft of the release notes. 
improvements are welcome, please commit any changes directly to SVN.

llvm-svn: 128992
 2011-04-06 06:29:50 +00:00
Jakob Stoklund Olesen d3438eb27d Don't document exactly how virtual registers are represented as integers. Code 
shouldn't depend directly on that.

Give an example of how to iterate over all virtual registers in a function
without depending on the representation.

llvm-svn: 123099
 2011-01-08 23:10:59 +00:00
Wesley Peck 671d54d5a2 Update the target feature matrix to reflect some new features in the MBlaze backend. 
llvm-svn: 122276
 2010-12-20 21:54:50 +00:00
Bruno Cardoso Lopes 8e303e896e Update the Target Feature Matrix for Mips 
llvm-svn: 122203
 2010-12-19 22:41:43 +00:00
Chris Lattner bd61444cb9 further fixes. 
llvm-svn: 121657
 2010-12-13 00:17:12 +00:00
Chris Lattner 053a025bfe fix typo 
llvm-svn: 121620
 2010-12-12 02:42:57 +00:00
Chris Lattner 7b783e7cb2 no alpha jit support. 
llvm-svn: 119052
 2010-11-14 18:25:50 +00:00
Chris Lattner 4869d346e3 add (and document) the ability for alias results to have 
fixed physical registers.  Start moving fp comparison
aliases to the .td file (which default to using %st1 if
nothing is specified).

llvm-svn: 118352
 2010-11-06 19:57:21 +00:00
Chris Lattner b6f8e8248d generalize alias support to allow the result of an alias to 
add fixed immediate values.  Move the aad and aam aliases to
use this, and document it.

llvm-svn: 118350
 2010-11-06 19:25:43 +00:00
Chris Lattner 8b0a71fc31 document instalias. 
llvm-svn: 118335
 2010-11-06 08:30:26 +00:00
Benjamin Kramer c940bcf564 Validate HTML. 
llvm-svn: 117847
 2010-10-30 21:07:28 +00:00
Chris Lattner 4dd6ca9a69 add missing tag 
llvm-svn: 117846
 2010-10-30 20:21:00 +00:00
Chris Lattner f9ec2fb34a fix typos and some serious bugs in feature handling (but not for 
cases that are currently exercised).  Thanks to Frits van Bommel for
the great review!

llvm-svn: 117840
 2010-10-30 19:47:49 +00:00
Chris Lattner 2cb092dc55 Implement (and document!) support for MnemonicAlias's to have Requires 
directives, allowing things like this:

def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;

Move the rest of the X86 MnemonicAliases over to the .td file.

llvm-svn: 117830
 2010-10-30 19:23:13 +00:00
Chris Lattner ba7b4fea97 implement (and document!) the first kind of MC assembler alias, which 
just remaps one mnemonic to another.  Convert a few of the X86 aliases
from .cpp to .td code.

llvm-svn: 117815
 2010-10-30 17:36:36 +00:00
Chris Lattner 15597538ae clarify that not having the ".o file writing" feature 
doesn't mean that you can't get a .o file.  Apparently
this is confusing :)

llvm-svn: 117523
 2010-10-28 02:22:02 +00:00
Kalle Raiskila 829b21fb02 Update target feature matrix for CellSPU 
llvm-svn: 117255
 2010-10-25 08:57:30 +00:00
Jakob Stoklund Olesen c7932d3ac6 Update target feature matrix for Blackfin. 
llvm-svn: 117245
 2010-10-24 20:04:05 +00:00
Wesley Peck 188deadf88 Updating target feature matrix to indicate current MBlaze status. 
llvm-svn: 117244
 2010-10-24 18:50:12 +00:00
Chris Lattner 60616b1e54 broken link 
llvm-svn: 117232
 2010-10-24 16:24:22 +00:00
Chris Lattner 5427f745b5 add a big table with target features. 
llvm-svn: 117230
 2010-10-24 16:18:00 +00:00
Chris Lattner 191efcfc63 random cruft in my tree. 
llvm-svn: 114387
 2010-09-21 04:03:39 +00:00
Chris Lattner cb67a14b3e add some documentation for the most important MC-level classes along with 
an overview of mc and the idea of the code emission phase.

llvm-svn: 113707
 2010-09-11 23:02:10 +00:00