Commit Graph

414905 Commits

Author SHA1 Message Date
Nikita Popov f208644ed3 [CGBuilder] Remove CreateBitCast() method
Use CreateElementBitCast() instead, or don't work on Address
where not necessary.
2022-02-14 15:06:04 +01:00
Aaron Ballman 76032b0e3f Check for the overloadable attribute in all the appropriate syntactic locations
When forming the function type from a declarator, we look for an
overloadable attribute before issuing a diagnostic in C about a
function signature containing only .... When the attribute is present,
we allow such a declaration for compatibility with the overloading
rules in C++. However, we were not looking for the attribute in all of
the places it is legal to write it on a declarator and so we only
accepted the signature in some forms and incorrectly rejected the
signature in others.

We now check for the attribute preceding the declarator instead of only
being applied to the declarator directly.
2022-02-14 08:54:21 -05:00
David Spickett 62c37fa2ac [compiler-rt][xray] Disable fdr-reinit test on Arm
This test is still seemingly randomly segfaulting on Arm:
https://lab.llvm.org/buildbot/#/builders/178/builds/1547

Though it seems to fail earlier in the test than on AArch64.
Investigation continues.
2022-02-14 13:36:51 +00:00
gysit 348bfc8e50 [mlir][linalg] Add attributes to region builder (NFC).
Adapt the region builder signature to hand in the attributes of the created ops. The revision is a preparation step the support named ops that need access to the operation attributes during op creation.

Depends On D119692

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D119693
2022-02-14 13:14:14 +00:00
Nikita Popov 41c5a762e5 [DeadArgElim] Check that function type is the same
If the function types differ, the call arguments don't necessarily
correspon to the function arguments. It's likely not worthwhile to
handle this more precisely, but at least we shouldn't crash.
2022-02-14 14:08:42 +01:00
Marek Kurdej c72fdad71b [clang-format] Reformat. NFC. 2022-02-14 14:05:05 +01:00
gysit 4121090893 [mlir][OpDSL] Restructure comprehension.py (NFC).
Group and reorder the classed defined by comprehension.py and add type annotations.

Depends On D119126

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D119692
2022-02-14 12:56:01 +00:00
gysit d50571ab07 [mlir][OpDSL] Add default value to index attributes.
Index attributes had no default value, which means the attribute values had to be set on the operation. This revision adds a default parameter to `IndexAttrDef`. After the change, every index attribute has to define a default value. For example, we may define the following strides attribute:
```

```
When using the operation the default stride is used if the strides attribute is not set. The mechanism is implemented using `DefaultValuedAttr`.

Additionally, the revision uses the naming index attribute instead of attribute more consistently, which is a preparation for follow up revisions that will introduce function attributes.

Depends On D119125

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D119126
2022-02-14 12:14:12 +00:00
Nathan Sidwell 880e87580a [demangler][NFC] Tweak legacy uuidof handling
We have to special-case 'u 8__uuidof [tz]' demangling for legacy
support.  That handling is a little duplicative.

* It seems better to just push the single expected node.

* We can also use 'consumeIf' rather than open-coding the peeking and increment.

* We don't need the numLeft < 2 check, as if there are few than that
  other paths will end up with detecting the error.

FWIW This simplifies a future change adding operator precedence.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D119543
2022-02-14 04:00:49 -08:00
Nathan Sidwell 995c4f3068 [demangler] Fix buffer growth
The output buffer growth algorithm had a few issues:

a) An off-by-one error in the initial size check, which uses
'>='. This error was safe, but could cause us to reallocate when there
was no need.

b) An inconsistency between the initial size check (>=) and the
post-doubling check (>).  The latter was somewhat obscured by the
swapped operands.

c) There would be many reallocs with an initially-small buffer.  Add a
little initialization hysteresis.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D119177
2022-02-14 03:59:31 -08:00
Nikita Popov 5a43a278f7 [Docs] Update OpaquePointers transition state (NFC)
We're at a point where working optimized binaries can be produced
in opaque pointer mode.
2022-02-14 12:55:58 +01:00
David Green ea6ebbcfb3 [ARM] MVE hadd and rhadd
This uses the nodes from D106237 to add MVE HADD and RHADD lowering.

Differential Revision: https://reviews.llvm.org/D106238
2022-02-14 11:55:40 +00:00
Anton Afanasyev 954ea0f044 [SLP] Simplify indices processing for insertelements
Get rid of non-constant and undef indices of insertelements
at `buildTree()` stage. Fix bugs.

Differential Revision: https://reviews.llvm.org/D119623
2022-02-14 14:50:44 +03:00
LLVM GN Syncbot 31d992299c [gn build] Port 55bd22f853 2022-02-14 11:30:41 +00:00
Konstantin Varlamov 55bd22f853 [libc++][ranges] Implement rbegin, rend, crbegin and crend.
Differential Revision: https://reviews.llvm.org/D119057
2022-02-14 03:29:59 -08:00
gysit 01e04867e8 [mlir][OpDSL] Consistently use the term op_def (NFC).
... and remove unused type aliases.

Depends On D119003

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D119125
2022-02-14 11:19:53 +00:00
David Green 03380c70ed [DAGCombine] Basic combines for AVG nodes.
This adds very basic combines for AVG nodes, mostly for constant folding
and handling degenerate (zero) cases. The code performs mostly the same
transforms as visitMULHS, adjusted for AVG nodes.

Constant folding extends to a higher bitwidth and drops the lowest bit.
For undef nodes, `avg undef, x` is transformed to x.  There is also a
transform for `avgfloor x, 0` transforming to `shr x, 1`.

Differential Revision: https://reviews.llvm.org/D119559
2022-02-14 11:18:35 +00:00
Tim Northover a87d3ba61c Reapply: StackProtector: ignore debug insts when splitting blocks.
When deciding where to split a block to insert stack guard checks, we should
move past any debug instructions we see that might (e.g.) be separating a tail
call from its frame wrangling.

This time, also don't run off the front of a basic block.
2022-02-14 10:58:22 +00:00
Peter Waller 7f41643ef0 [gn build] Add host_cpu=arm64 & current_os=linux => aarch64-unknown-linux-gnu
I've been using this triple in development for a while without issues,
it's passing check-llvm and check-clang.

(The above is the commit message, but the build is currently broken since
D114639, I intend to submit this once it's passing again and it's accepted in
review)

Differential Revision: https://reviews.llvm.org/D119331
2022-02-14 10:49:37 +00:00
Nikita Popov 7c83f8c45d [InstCombine] Check GEP source type in select of gep fold
This is no longer implicitly checked through the pointer type
with opaque pointers.
2022-02-14 11:46:45 +01:00
Evgeny Shulgin fc84ebfff3 [clang-tidy] Ignore variable template partial specializations in `misc-definitions-in-headers`
Variable template partial specializations are inline and can't lead
to ODR-violations. The checker now ignores them.

Fixes https://github.com/llvm/llvm-project/issues/53519

Reviewed By: hokein

Differential Revision: https://reviews.llvm.org/D119098
2022-02-14 11:38:27 +01:00
Jean Perier 7dd7ccd224 [flang] Fail at link time if derived type descriptors were not generated
Currently, code generation was creating weak symbols for derived type
descriptor global it could not find in the current compilation unit.
The rational is that:
 - the derived type descriptors of external module derived types are
   generated in the compilation unit that compiled the module so that
   the type descriptor address is uniquely associated with the type.
 - some types do not have derived type descriptors: the builtin derived
   types used to create derived type descriptors. The runtime knows
   about them and does not need them to accomplish the feat of
   describing themselves. Hence, all unresolved derived type descriptors
   in codegen cannot be assumed to be resolved at link time.

However, this caused immense debugging pain when, for some reasons, derived
type descriptor that should be generated were not. This caused random
runtime failures instead of a much cleaner link time failure.

Improve this situation by allowing codegen to detect the builtin derived
types that have no derived type descriptors and requiring the other
unresolved derived type descriptor to be resolved at link time.

Also make derived type descriptor constant data since this was a TODO
and makes the situation even cleaner. This requiring telling lowering
which compiler created symbols can be placed in read only memory. I
considered using PARAMETER, but I have mixed feeling using it since that
would cause the initializer expressions of derived type descriptor to
be invalid from a Fortran point of view since pointer targets cannot be
parameters. I do not want to start misusing Fortran attributes, even if
I think it is quite unlikely semantics would currently complain. I also
do not want to rely on the fact that all object symbols with the
CompilerCreated flags are currently constant data. This could easily
change in the future and cause runtime bugs if lowering rely on this
while the assumption is not loud and clear in semantics.
Instead, add a ReadOnly symbol flag to tell lowering that a compiler
generated symbol can be placed in read only memory.

Differential Revision: https://reviews.llvm.org/D119555
2022-02-14 11:37:13 +01:00
David Green 80af78cd59 [AArch64] Additional tests for AVG node combines. NFC 2022-02-14 10:19:34 +00:00
Nikita Popov 4d477ba50f [BitcodeReader] Rename method for element type by ID (NFC)
Make it clearer that this method is specifically for pointer
element types, and not other element types. This distinction will
be relevant in the future.

The somewhat unusual spelling is to make sure this does not show
up when grepping for getPointerElementType.
2022-02-14 11:15:43 +01:00
Nikita Popov efece08ae2 [InstCombine] Remove manual debug loc transfer
While this might be marginally more precise, we generally don't
bother with this in InstCombine, and let the IRBuilder assign the
debug location. I don't see why this one fold, out of the thousands
done in InstCombine, should be treated specially.
2022-02-14 11:07:05 +01:00
Jay Foad 9dc43dfae6 [AMDGPU] Fix line endings. NFC. 2022-02-14 09:57:55 +00:00
Nikita Popov 18bf42c0a6 [CVP] Extract helper from phi processing (NFC)
So we can use early returns and avoid those awkward !V checks.
2022-02-14 10:51:34 +01:00
Nikita Popov ee423d93ea [polly] Remove uses of PointerType::getElementType()
This method has been removed. I missed these uses in conditionally-
compiled code previously.
2022-02-14 10:23:36 +01:00
Marek Kurdej 07153f7e07 [llvm] Don't use LLVM_ATTRIBUTE_UNUSED for variables. NFC.
At least on MSVC, it does nothing and still causes a warning.
2022-02-14 10:11:53 +01:00
Marek Kurdej e967d97a35 [clang-format] Fix SpacesInLineCommentPrefix deleting tokens.
Fixes https://github.com/llvm/llvm-project/issues/53799.

Reviewed By: HazardyKnusperkeks, owenpan

Differential Revision: https://reviews.llvm.org/D119680
2022-02-14 09:53:16 +01:00
Ivan Butygin 5217801dae [mlir][arith] Do not limit arith-expand pass to FuncOp
This pass doesn't have any limitations specific to FuncOp and it will be useful to be able to run it on other ops (e.g. gpu.func).

Differential Revision: https://reviews.llvm.org/D119662
2022-02-14 11:49:19 +03:00
Nikita Popov ad1feef7b2 [lldb] Remove some uses of getPointerElementType()
While in the area, remove some uses of getPointerElementType()
that have obvious replacements.
2022-02-14 09:44:37 +01:00
Marek Kurdej e01f624adb [clang-format] Fix PointerAlignment within lambdas in a multi-variable declaration statement.
Fixes https://github.com/llvm/llvm-project/issues/43115.

Also, handle while loops with initializers (C++20) the same way as for loops.

Reviewed By: HazardyKnusperkeks, owenpan

Differential Revision: https://reviews.llvm.org/D119648
2022-02-14 09:41:24 +01:00
Nikita Popov 2df9430fbf [lldb] Remove uses of PointerType::getElementType()
This method has been deprecated and removed. I missed these usages
in lldb previously.
2022-02-14 09:34:24 +01:00
Dávid Bolvanský 1be1fd735d [AlwaysInliner] Check for callsite noinline attribute simplified 2022-02-14 09:33:30 +01:00
Nikita Popov ff040eca93 [FastISel] Reuse register for bitcast that does not change MVT
The current FastISel code reuses the register for a bitcast that
doesn't change the IR type, but uses a reg-to-reg copy if it
changes the IR type without changing the MVT. However, we can
simply reuse the register in that case as well.

In particular, this avoids unnecessary reg-to-reg copies for pointer
bitcasts. This was found while inspecting O0 codegen differences
between typed and opaque pointers.

Differential Revision: https://reviews.llvm.org/D119432
2022-02-14 09:13:17 +01:00
Nikita Popov d593cf7945 [IR] Remove deprecated PointerType::getElementType()
This was deprecated before the LLVM 14 branch cut, remove the
method now.

As a temporary workaround, Type::getPointerElementType() can be
used instead.

See https://llvm.org/docs/OpaquePointers.html for information on
the opaque pointers migration.
2022-02-14 09:07:50 +01:00
jacquesguan bfb4c0c370 [RISCV] Recover the implication between Zve* extensions and the V extension.
This revision recover the implication between Zve* extensions and the V extension.

Differential Revision: https://reviews.llvm.org/D119210
2022-02-14 15:52:07 +08:00
Simon Moll ce48fe47af [VE] v256i1 and|or|xor isel and tests
Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D119239
2022-02-14 08:47:06 +01:00
Balázs Kéri 83028ad934 [clang][AST][ASTImporter] Set record to complete during import of its members.
At import of a member it may require that the record is already set to complete.
(For example 'computeDependence' at create of some Expr nodes.)
The record at this time may not be completely imported, the result of layout
calculations can be incorrect, but at least no crash occurs this way.

A good solution would be if fields of every encountered record are imported
before other members of all records. This is much more difficult to implement.

Differential Revision: https://reviews.llvm.org/D116155
2022-02-14 08:27:44 +01:00
Chuanqi Xu e59d6dc063 [NFC] Precommit for PR53357
Due to there are other required changes in
https://reviews.llvm.org/D118094, precommit these changes to ease
reviewing. Including:
- Remove *_thwart tests.
- Remove test for (x & y) + (~x & ~y)
- Fix incorrect uniitest committeed before
2022-02-14 14:37:12 +08:00
Chuanqi Xu 4ee240b860 [NFC] [ValueTracking] Add unittest for haveNoCommonBitsSet 2022-02-14 14:10:30 +08:00
Phoebe Wang 3e19ba36fc [X86][MS] Add 80bit long double support for Windows
MSVC currently doesn't support 80 bits long double. But ICC does support
it on Windows. Besides, there're also some users asked for this feature.
We can find the discussions from stackoverflow, msdn etc.

Given Clang has already support `-mlong-double-80`, extending it to
support for Windows seems worthwhile.

Reviewed By: rnk, erichkeane

Differential Revision: https://reviews.llvm.org/D115441
2022-02-14 13:32:29 +08:00
Haowei Wu 15dfe03022 [ifs] Allow llvm-ifs to generate text stub from elf stub
ELF stubs generated from llvm-ifs lacks program headers, which prevents
llvm-ifs from parsing them properly as program headers are required by
llvm's own ELF libraries. This patch adds a few workaround bypass this
limitation.

Differential Revision: https://reviews.llvm.org/D116769
2022-02-13 21:05:52 -08:00
Haowei Wu a59bb21bf8 [ifs] Added missing DT_STRSZ to the .dynamic section
This patch adds DT_STRSZ into the dynamic section, which was absent
previously. This was a bug and caused failures in other tools.

Differential Revision: https://reviews.llvm.org/D117058
2022-02-13 21:05:52 -08:00
eopXD 7f51a9e273 [RISCV] Fix RISCVTargetInfo::initFeatureMap, add non-ISA features back after implication
Previously D113336 makes RISCVTargetInfo::initFeatureMap return the results
processed by RISCVISAInfo, which only consists of ISA features and misses
non-ISA features like `relax` and `save-restore`.

This patch fixes the problem.

Reviewed By: junparser

Differential Revision: https://reviews.llvm.org/D119541
2022-02-13 21:05:06 -08:00
Teresa Johnson f4214e1469 [sanitizer] Skip test on Android where chmod is not working
Third attempt to fix a bot failure from
634da7a1c6 on an Android bot:
https://lab.llvm.org/buildbot#builders/77/builds/14339

My last attempt used an approach from another test where chmod was not
working of using a bad character in the path name. But it looks like
this trick only works on Windows.

Instead, restore the original version of this test before my change at
634da7a1c6 and move the bad path test to
a new test file, marking it unsupported on Android.
2022-02-13 19:50:25 -08:00
Shao-Ce SUN 352e19c023 [NFC][RISCV] Remove redundant `Returned` 2022-02-14 11:37:50 +08:00
Lang Hames 887f1e49d0 [llvm-jitlink] Fix a bug in llvm-jitlink's Slab allocator.
The slab delta (used to link as if allocated at a specified address) should
remain constant.The update to the delta was accidentally introduced in
962a2479b5, but hasn't caused any failures as it only breaks in an obvious
way for multi-file exec uses (our regression tests are all -noexec, and tend to
be single-file).

No testcase here: this is an obscure utility for testing support, and an
uncommon use-case. If the slab allocator is ever moved into LLVM we could add
a unit test to catch this.
2022-02-13 19:28:38 -08:00
Craig Topper e72fe654b7 [DAGCombiner] Use getShiftAmountConstant in DAGCombiner::foldSelectOfConstants.
This enables fshl to be matched earlier on X86

  %6 = lshr i32 %3, 1
  %7 = select i1 %4, i32 -2147483648, i32 0
  %8 = or i32 %6, %7

X86 uses i8 for shift amounts. SelectionDAGBuilder creates the
ISD::SRL with an i8 shift type. DAGCombiner turns the select into
an ISD::SHL. Prior to this patch it would use i32 for the shift
amount. fshl matching failed because the shift amounts have different
types. LegalizeDAG fixes the ISD::SHL shift amount to i8. This
allowed fshl matching to succeed.

With this patch, the ISD::SHL will be created with an i8 shift
amount. This allows the fshl to match immediately.

No test case beause we still end up with a fshl either way.
2022-02-13 19:09:26 -08:00