Commit Graph

76 Commits

Author SHA1 Message Date
Torok Edwin fbcc663cbf llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").

llvm-svn: 75640
2009-07-14 16:55:14 +00:00
Torok Edwin 56d0659726 assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.

llvm-svn: 75379
2009-07-11 20:10:48 +00:00
David Goodwin 22c2fba978 Use common code for both ARM and Thumb-2 instruction and register info.
llvm-svn: 75067
2009-07-08 23:10:31 +00:00
Evan Cheng 7c9434399d 80 col violation.
llvm-svn: 74888
2009-07-07 01:16:41 +00:00
Bob Wilson deb35afd23 Add a new addressing mode for NEON load/store instructions.
llvm-svn: 74658
2009-07-01 23:16:05 +00:00
David Goodwin 28d6d87244 Improve Thumb-2 jump table support.
llvm-svn: 74549
2009-06-30 19:50:22 +00:00
David Goodwin 27303cde82 Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table.
llvm-svn: 74543
2009-06-30 18:04:13 +00:00
Evan Cheng b23b50d54d Implement Thumb2 ldr.
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.

llvm-svn: 74420
2009-06-29 07:51:04 +00:00
Bob Wilson ce8cfb41e8 Fix up a few minor typos in comments.
llvm-svn: 71563
2009-05-12 17:35:29 +00:00
Bob Wilson 2f4e56fd2e Fix 80-col violations and remove trailing whitespace. No functional changes.
llvm-svn: 71562
2009-05-12 17:09:30 +00:00
Duncan Sands af9eaa830a Rename PaddedSize to AllocSize, in the hope that this
will make it more obvious what it represents, and stop
it being confused with the StoreSize.

llvm-svn: 71349
2009-05-09 07:06:46 +00:00
Dale Johannesen 7647da67ea Remove refs to non-DebugLoc versions of BuildMI from ARM.
llvm-svn: 64429
2009-02-13 02:25:56 +00:00
Evan Cheng e4510972a6 Suppress a compile time warning.
llvm-svn: 63161
2009-01-28 00:53:34 +00:00
Duncan Sands dc020f9c3c Rename getABITypeSize to getTypePaddedSize, as
suggested by Chris.

llvm-svn: 62099
2009-01-12 20:38:59 +00:00
Evan Cheng 454ff53d58 Use ARMFunctionInfo to track number of constpool entries and jumptables.
llvm-svn: 58877
2008-11-08 00:51:41 +00:00
Dan Gohman 0d1e9a8e04 Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Dan Gohman 38453eebdc Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
2008-09-13 17:58:21 +00:00
Dan Gohman a79db30d28 Tidy up several unbeseeming casts from pointer to intptr_t.
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Dan Gohman 3b46030375 Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212
2008-07-07 23:14:23 +00:00
Nicolas Geoffray ae84bbdbed Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
llvm-svn: 49809
2008-04-16 20:10:13 +00:00
Chris Lattner 596875118c rename MachineInstr::setInstrDescriptor -> setDesc
llvm-svn: 45871
2008-01-11 18:10:50 +00:00
Chris Lattner 03ad885039 rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
2008-01-07 07:27:27 +00:00
Chris Lattner a98c679de0 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
2008-01-07 01:56:04 +00:00
Chris Lattner a5bb370aa4 Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner 5c4637816e Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Duncan Sands 283207a71c Eliminate the remaining uses of getTypeSize. This
should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.

llvm-svn: 43688
2007-11-05 00:04:43 +00:00
Dale Johannesen 85ee72f7ba ARM: make branch folder remove unconditional branches
following jump tables that it earlier inserted.  This
would be OK on other targets but is needed for correctness
only on ARM (constant islands needs to find jump tables).

llvm-svn: 39782
2007-07-12 16:45:35 +00:00
Dale Johannesen e59411d056 Fix hang compiling TimberWolf (allow for islands
of size other than 4).

llvm-svn: 39743
2007-07-11 18:32:38 +00:00
Evan Cheng 94579dbd2e Didn't mean the last commit. Revert.
llvm-svn: 38515
2007-07-10 22:00:16 +00:00
Evan Cheng effa7467b6 Update.
llvm-svn: 38513
2007-07-10 21:49:47 +00:00
Evan Cheng 94f04c6fc9 Reflects the chanegs made to PredicateOperand.
llvm-svn: 37898
2007-07-05 07:18:20 +00:00
Evan Cheng c95f95b6da Fix comment.
llvm-svn: 37098
2007-05-16 05:14:06 +00:00
Evan Cheng 0f7cbe8370 Add PredicateOperand to all ARM instructions that have the condition field.
llvm-svn: 37066
2007-05-15 01:29:07 +00:00
Devang Patel 8c78a0bff0 Drop 'const'
llvm-svn: 36662
2007-05-03 01:11:54 +00:00
Devang Patel e95c6ad802 Use 'static const char' instead of 'static const int'.
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652
2007-05-02 21:39:20 +00:00
Devang Patel 09f162ca6a Do not use typeinfo to identify pass in pass manager.
llvm-svn: 36632
2007-05-01 21:15:47 +00:00
Dale Johannesen 4a00cf3fc4 Rewrite of Thumb constant islands handling (exact allowance for padding
around islands and jump tables).

llvm-svn: 36573
2007-04-29 19:19:30 +00:00
Evan Cheng 559c546453 Doh. ARM::LEApcrel is a single instruction MI.
llvm-svn: 36513
2007-04-27 18:27:13 +00:00
Evan Cheng d9990f061f Special handling of LEApcrel and tLEApcrel.
llvm-svn: 36504
2007-04-27 08:14:15 +00:00
Dale Johannesen fdfb757682 Make Thumb funcs containing islands 4-byte aligned. Fix bugs maintaining
BBOffsets and BBSizes when adjusting conditional branches.

llvm-svn: 36372
2007-04-23 20:09:04 +00:00
Evan Cheng 3c68d4e8ba Remove unused constant pool entries.
llvm-svn: 35635
2007-04-03 23:39:48 +00:00
Dale Johannesen d13786dd82 fix off by 1 error in displacement computation
llvm-svn: 35602
2007-04-02 20:31:06 +00:00
Evan Cheng 6f059e3e0a - Track which callee-saved registers are spilled.
- Some code clean up.

llvm-svn: 34783
2007-03-01 08:26:31 +00:00
Dale Johannesen 962fa8eb9a Changes requested in review of last pass. Also pulled isThumb into a
member, instead of resetting in every function that uses it.

llvm-svn: 34764
2007-02-28 23:20:38 +00:00
Dale Johannesen 440995bd9a Add intelligence about where to break large blocks.
llvm-svn: 34755
2007-02-28 18:41:23 +00:00
Dale Johannesen c2f3d015e0 cosmetic changes from review of last patch. obvious
llvm-svn: 34598
2007-02-25 18:31:31 +00:00
Dale Johannesen e80e31eada remove crediting of Evan Cheng and me.
llvm-svn: 34568
2007-02-25 01:42:36 +00:00
Dale Johannesen 01ee5750f4 Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this
from README.
When no water available, use end of block if in range.  (More to do here.)

llvm-svn: 34563
2007-02-25 00:47:03 +00:00
Dale Johannesen e18b13b213 rewrite of constant islands
llvm-svn: 34523
2007-02-23 05:02:36 +00:00