Commit Graph

280977 Commits

Author SHA1 Message Date
Saleem Abdulrasool f1d814d40c test: adjust the target for some Windows tests
The tests are targeting Windows but do not specify an environment.  When
executed on Linux, they would use an ELF output rather than the COFF
output.  Explicitly provide an environment.

llvm-svn: 323225
2018-01-23 17:05:57 +00:00
Dan Gohman 4f637e0ccc [WebAssembly] Add mem.* builtin functions.
This corresponds to r323222 in LLVM. The new names are not yet
finalized, so use them at your own risk.

llvm-svn: 323224
2018-01-23 17:04:04 +00:00
Simon Pilgrim 6ff241fc99 [X86][SSE] LowerBUILD_VECTORAsVariablePermute - extract subvector from oversized index vectors
llvm-svn: 323223
2018-01-23 17:02:15 +00:00
Dan Gohman 5464941a6a [WebAssembly] Add mem.* intrinsics.
The grow_memory and current_memory instructions are expected to be
officially renamed to mem.grow and mem.size. Introduce new intrinsics
with the new names. These new names aren't yet official, so for now,
use them at your own risk.

Also, take this opportunity to add arguments for the currently unused
immediate field in those instructions.

llvm-svn: 323222
2018-01-23 17:02:02 +00:00
Rafael Espindola 8e2fc4f3f8 Don't mark a shared library as needed because of a lazy symbol.
Fixes PR36029.

llvm-svn: 323221
2018-01-23 16:59:20 +00:00
Dan Gohman f2c1cae5cb [WebAssembly] Switch to *-wasm as the default target triple.
This makes wasm32-unknown-unknown-wasm the default, which supports
the .o file writer and the new linking ABI. To enable s2wasm-compatible
output, use the wasm32-unknown-unknown-elf triple.

llvm-svn: 323220
2018-01-23 16:55:44 +00:00
Adrian Prantl eac1c02d2a Move getBuildArtifact() from TestBase to Base and derive MiTestCaseBase from it
Thanks to Pavel Labath for pointing this out!

llvm-svn: 323219
2018-01-23 16:43:01 +00:00
Nico Weber c29f83b79e clang-format: Support formatting Java 8 interface default methods.
llvm-svn: 323218
2018-01-23 16:30:56 +00:00
Bill Seurer e76f2171f9 [PowerPC][asan] Fix asan tests to handle changed memory layouts
In more recent Linux kernels with 47 bit VMAs the layout of virtual memory
for powerpc64 changed causing the address sanitizer to not work properly. This
patch fixes up a test case that was found to fail on some newer Fedora
releases that use different address ranges.

ref: https://reviews.llvm.org/D40907
llvm-svn: 323217
2018-01-23 16:28:17 +00:00
Yaxun Liu d0820433b1 Verifier: fix bug treating debug info issue as non-debug info issue
Normally when llvm-as sees only debug info errors in LLVM assembly, it simply
drops the debug info and outputs a valid LLVM bitcode and returns 0.

There is a bug in LLVM verifier which incorrectly treats a debug info error
as non-debug info error, which causes llvm-as returns 1 even though llvm-as
can drop the invalid debug info and outputs a valid LLVM bitcode.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D42391

llvm-svn: 323216
2018-01-23 16:11:15 +00:00
Alexander Ivchenko e642231bfc [x86] Reautogenerate a bunch of tests for D42287. NFC
llvm-svn: 323215
2018-01-23 16:08:15 +00:00
Yaxun Liu 8b7454a8dd CodeGen: Fix assertion in ScheduleDAGMILive::scheduleMI due to llvm.dbg.value
Fix a bug in ScheduleDAGMILive::scheduleMI which causes BotRPTracker not tracking CurrentBottom in some rare cases involving llvm.dbg.value.

This issues causes amdgcn target to assert when compiling some user codes with -g.

Differential Revision: https://reviews.llvm.org/D42394

llvm-svn: 323214
2018-01-23 16:04:53 +00:00
Craig Topper c58c2b5c9b [X86] Rewrite vXi1 element insertion by using a vXi1 scalar_to_vector and inserting into a vXi1 vector.
The existing code was already doing something very similar to subvector insertion so this allows us to remove the nearly duplicate code.

This patch is a little larger than it should be due to differences between the DQI handling between the two today.

llvm-svn: 323212
2018-01-23 15:56:36 +00:00
Simon Pilgrim 0c9f77a9f9 [X86][SSE] LowerBUILD_VECTORAsVariablePermute - ensure that the source vector is not larger than the destination
We might be able to support this in the future with VPERMV3, OR(PSHUFB, PSHUFB) etc.

llvm-svn: 323210
2018-01-23 15:51:03 +00:00
Alexander Ivchenko 347921a281 [x86] Mostly reautogenerate a bunch of tests that affect D37775. NFC
Tests required minor manual tweaks:
CodeGen/MIR/X86/generic-instr-type.mir
CodeGen/X86/GlobalISel/select-copy.mir
CodeGen/X86/GlobalISel/select-ext.mir
CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir
CodeGen/X86/GlobalISel/select-phi.mir
CodeGen/X86/GlobalISel/select-trunc.mir
CodeGen/X86/GlobalISel/select-frameIndex.mir

And following tests are split into 32/64 versions:
CodeGen/X86/GlobalISel/legalize-GV.mir
CodeGen/X86/GlobalISel/select-frameIndex.mir

llvm-svn: 323209
2018-01-23 15:48:50 +00:00
Malcolm Parsons e034e5eefe [clang-tidy] Handle bitfields in modernize-use-default-member-init if using C++2a
Summary:
C++2a allows bitfields to have default member initializers.
Add support for this to clang-tidy's modernize-use-default-member-init check.

Reviewers: aaron.ballman, alexfh

Reviewed By: aaron.ballman

Subscribers: klimek, xazax.hun, cfe-commits

Differential Revision: https://reviews.llvm.org/D42413

llvm-svn: 323208
2018-01-23 15:32:42 +00:00
Simon Pilgrim 9b4a097f94 Use EVT::changeVectorElementTypeToInteger() to convert index type to integer
llvm-svn: 323207
2018-01-23 15:30:07 +00:00
Simon Pilgrim e2905c8a0c [X86][SSE] LowerBUILD_VECTORAsVariablePermute - ensure that the index vector has the correct number of elements
llvm-svn: 323206
2018-01-23 15:13:37 +00:00
Tim Northover f9b560aa8e AArch64: get type from correct result when forming BFX
Some nodes produce multiple values so when obtaining the type of an ISD::OR we
need to make sure we ask for the correct one. Hopefully that's all of them.

llvm-svn: 323205
2018-01-23 15:11:27 +00:00
Ilya Biryukov 82b59ae428 [clangd] Simplify code handling compile commands
Summary:
CppFile can now change compilation arguments during rebuild. This allows
simplifying code that manages CppFiles.

Reviewers: sammccall, bkramer, jkorous-apple

Reviewed By: sammccall

Subscribers: ioeric, jkorous-apple, klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D42173

llvm-svn: 323204
2018-01-23 15:07:52 +00:00
Hans Wennborg b1d949fa0c Accept iso date format in COFF/unchanged-importlib.test
llvm-svn: 323203
2018-01-23 14:41:39 +00:00
Tim Northover 9f3003d08f AArch64: get type from correct result when forming BFI/BFM
Some nodes produce multiple values so when obtaining the type of an ISD::OR we
need to make sure we ask for the correct one.

llvm-svn: 323202
2018-01-23 14:37:03 +00:00
Craig Topper 76adcc86cd [X86] Legalize v32i1 without BWI via splitting to v16i1 rather than the default of promoting to v32i8.
Summary:
For the most part its better to keep v32i1 as a mask type of a narrower width than trying to promote it to a ymm register.

I had to add some overrides to the methods that get the types for the calling convention so that we still use v32i8 for argument/return purposes.

There are still some regressions in here. I definitely saw some around shuffles. I think we probably should move vXi1 shuffle from lowering to a DAG combine where I think the extend and truncate we have to emit would be better combined.

I think we also need a DAG combine to remove trunc from (extract_vector_elt (trunc))

Overall this removes something like 13000 CHECK lines from lit tests.

Reviewers: zvi, RKSimon, delena, spatel

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D42031

llvm-svn: 323201
2018-01-23 14:25:39 +00:00
Craig Topper c2df6409c7 [X86] Add missing MOVSX/MOVZX instructions to load folding tables.
I'm not sure there's any way to generate these folding cases especially the movzx ones since even the register form is never emitted by codegen.

I'm just adding them to remove the difference with the autogenerated version of the folding table.

llvm-svn: 323200
2018-01-23 14:09:22 +00:00
Fedor Sergeev 69ea82968a Fix Driver/solaris-ld.c test on Windows
Fixing failure introduced with r323193.

llvm-svn: 323199
2018-01-23 13:59:11 +00:00
Tim Northover 3a4e1c76c2 llvm-objdump: prevent out of bounds accesses during unwind dumping.
We were a bit too trusting about the offsets encoded in MachO compact unwind
sections, so this passes every access through a bounds check just in case. It
prevents a few segfaults on malformed object files, if one should ever come
along.

Mostly to silence fuzzers in the vague hope they might be able to produce
something useful without the noise.

llvm-svn: 323198
2018-01-23 13:51:57 +00:00
Raphael Isemann b90f81ed82 Fix memory leaks in GoParser
Summary: The GoParser is leaking memory in the tests due to not freeing allocated nodes when encountering some parsing errors. With this patch all GoParser tests are passing with enabled memory sanitizers/ubsan.

Reviewers: labath, davide

Reviewed By: labath

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D42409

llvm-svn: 323197
2018-01-23 13:50:46 +00:00
Ilya Biryukov a67b3663de [clang-tidy] Add -vfsoverlay flag
Summary:
It allows to remap and override files and directories on disk when
running clang-tidy. The intended use case for the flag is running
standalone clang-tidy binary for IDE and editor integration.

Patch by Vladimir Plyashkun.

Reviewers: alexfh, benlangmuir, ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: ilya-biryukov, cfe-commits

Tags: #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D41535

llvm-svn: 323196
2018-01-23 12:31:06 +00:00
Ilya Biryukov 5da21edb35 [Tooling] Added a VFS parameter to ClangTool
Summary:
The parameter overrides the underlying vfs used by ClangTool for
filesystem operations.

Patch by Vladimir Plyashkun.

Reviewers: alexfh, ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D41947

llvm-svn: 323195
2018-01-23 12:30:02 +00:00
Fedor Sergeev 78fdc9007d [Solaris] Make RHEL devtoolsets handling Linux-specific
Summary:
This patch is meant to address the last outstanding review comment on the already approved
(but not yet commited) https://reviews.llvm.org/D35755, namely making the handling of the RHEL
devtoolsets Linux-specific.

Don't know if it's best integrated into the former or applied subsequently.

Tested on i386-pc-solaris2.11 and x86_64-pc-linux-gnu.

Reviewers: fedor.sergeev, tstellar, jyknight

Reviewed By: fedor.sergeev

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42029

llvm-svn: 323194
2018-01-23 12:24:01 +00:00
Fedor Sergeev faa0a82416 [Solaris] gcc toolchain handling revamp
Summary:
General idea is to utilize generic (mostly Generic_GCC) code
and get rid of Solaris-specific handling as much as possible.

In particular:
- scanLibDirForGCCTripleSolaris was removed, relying on generic
  CollectLibDirsAndTriples

- findBiarchMultilibs is now properly utilized to switch between
   m32 and m64 include & lib paths on Solaris

- C system include handling copied from Linux (bar multilib hacks)

Fixes PR24606.

Reviewers: dlj, rafael, jyknight, theraven, tstellar

Reviewed By: jyknight

Subscribers: aaron.ballman, mgorny, krytarowski, ro, joerg, cfe-commits

Differential Revision: https://reviews.llvm.org/D35755

llvm-svn: 323193
2018-01-23 12:23:52 +00:00
Serguei Katkov 17e5794f11 [CGP] Fix the GV handling in complex addressing mode
If in complex addressing mode the difference is in GV then
base reg should not be installed because we plan to use
base reg as a merge point of different GVs.

This is a fix for PR35980.

Reviewers: reames, john.brawn, santosh
Reviewed By: john.brawn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42230

llvm-svn: 323192
2018-01-23 12:07:49 +00:00
Haojian Wu c159aa6aeb [clang-tidy] Don't generate fixes for invalid new expr location in modernize-make-unique.
Reviewers: ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: klimek, xazax.hun, cfe-commits

Differential Revision: https://reviews.llvm.org/D42363

llvm-svn: 323191
2018-01-23 11:43:18 +00:00
Simon Pilgrim 8ea1a0c690 [X86][SSE] LowerBUILD_VECTORAsVariablePermute - fix PSHUFB source/index operand ordering
As detailed in rL317463, PSHUFB (like most variable shuffle instructions) uses Op[0] for the source vector and Op[1] for the shuffle index vector, VPERMV works in reverse which is probably where the confusion comes from.

Differential Revision: https://reviews.llvm.org/D42380

llvm-svn: 323190
2018-01-23 11:39:06 +00:00
Haojian Wu 061c73eb28 [clangd] Use accessible scopes to query indexes for global code completion.
Summary:
 * For qualified completion (foo::a^)
       * unresolved qualifier - use global namespace ("::")
       * resolved qualifier - use all accessible namespaces inside the resolved qualifier.
 * For unqualified completion (vec^), use scopes that are accessible from the
      scope from which code completion occurs.

Reviewers: sammccall, ilya-biryukov

Reviewed By: sammccall

Subscribers: jkorous-apple, ioeric, klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D42073

llvm-svn: 323189
2018-01-23 11:37:26 +00:00
Krasimir Georgiev 55c23a10c2 [clang-format] Ignore UnbreakableTailLength sometimes during breaking
Summary:
This patch fixes an issue where the UnbreakableTailLength would be counted towards
the length of a token during breaking, even though we can break after the token.

For example, this proto text with column limit 20
```
# ColumnLimit: 20  V
foo: {
  bar: {
    bazoo: "aaaaaaa"
  }
}
```
was broken:
```
# ColumnLimit: 20  V
foo: {
  bar: {
    bazoo:
        "aaaaaaa"
  }
}
```
because the 2 closing `}` were counted towards the string literal's `UnbreakableTailLength`.

Reviewers: djasper

Reviewed By: djasper

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D42376

llvm-svn: 323188
2018-01-23 11:26:19 +00:00
MinSeong Kim 27f77b4300 [Analysis] Disable exp/exp2/pow finite lib calls on Android with -ffast-math.
Summary:
Since r322087, glibc's finite lib calls are generated when possible.
However, glibc is not supported on Android. Therefore this change
enables llvm to finely distinguish between linux and Android for
unsupported library calls. The change also include some regression
tests.

Reviewers: srhines, pirama

Reviewed By: srhines

Subscribers: kongyi, chh, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D42288

llvm-svn: 323187
2018-01-23 11:11:36 +00:00
Sjoerd Meijer ca8f4e7451 [ARM] Pass _Float16 as int or float
Pass and return _Float16 as if it were an int or float for ARM, but with the
top 16 bits unspecified, similarly like we already do for __fp16.

We will implement proper half-precision function argument lowering in the ARM
backend soon, but want to use this workaround in the mean time.

Differential Revision: https://reviews.llvm.org/D42318

llvm-svn: 323185
2018-01-23 10:13:49 +00:00
Stefan Maksimovic 98749e0249 [mips] Properly select abs and sqrt instructions
- Alter abs for micromips to have both AFGR64 and FGR64
  variants, same as sqrt
- Remove sqrt and abs from MicroMips32r6InstrInfo.td,
  use micromips FGR64 variants
- Restrict non-micromips abs/sqrt with NotInMicroMips
  predicate

Differential revision: https://reviews.llvm.org/D41439

llvm-svn: 323184
2018-01-23 10:09:39 +00:00
Ashutosh Nema 007b425b77 This change add's optimization remark in LoopVersioning LICM pass.
Summary:
This patch is adding remark messages to the LoopVersioning LICM pass, 
which will be useful for optimization remark emitter (ORE) infrastructure.

Patch by: Deepak Porwal

Reviewers: anemet, ashutosh.nema, eastig

Subscribers: eastig, vivekvpandya, fhahn, llvm-commits
llvm-svn: 323183
2018-01-23 09:47:28 +00:00
Anton Bikineev 82f61151b3 [InstSimplify] (X << Y) % X -> 0
llvm-svn: 323182
2018-01-23 09:27:47 +00:00
Raphael Isemann acc48f3e1d Prevent unaligned memory read in parseMinidumpString
Summary:
It's possible to hit an unaligned memory read when reading `source_length` as the `data` array is only aligned with 2 bytes (it's actually a UTF16 array). This patch memcpy's `source_length` into a local variable to prevent this:

```
MinidumpTypes.cpp:49:23: runtime error: load of misaligned address 0x7f0f4792692a for type 'const uint32_t' (aka 'const unsigned int'), which requires 4 byte alignment
```

Reviewers: dvlahovski, zturner, davide

Reviewed By: davide

Subscribers: davide, lldb-commits

Differential Revision: https://reviews.llvm.org/D42348

llvm-svn: 323181
2018-01-23 08:04:27 +00:00
Jonas Hahnfeld e57620308e Fix name of 'macOS' and add asteriks to brands, NFC.
llvm-svn: 323180
2018-01-23 07:54:10 +00:00
Justin Bogner eaae305a09 update_mir_test_checks: Improve the check for LLVM IR in MIR files
The LLVM IR section of a MIR document can start with "--- |" rather
than just "---", because "|" is a sigil for a freeform document in
YAML. We need to handle this so that we don't try to add check lines
to the LLVM IR functions in a MIR file.

llvm-svn: 323178
2018-01-23 06:39:04 +00:00
Hiroshi Inoue cde18b4b19 [NFC] fix trivial typos in comments
"the the" -> "the"

llvm-svn: 323177
2018-01-23 05:50:06 +00:00
Hiroshi Inoue 4cf7b885e6 [NFC] fix trivial typos in comments
"the the" -> "the"

llvm-svn: 323176
2018-01-23 05:49:30 +00:00
Craig Topper c92edd994e [X86] Don't reorder (srl (and X, C1), C2) if (and X, C1) can be matched as a movzx
Summary:
If we can match as a zero extend there's no need to flip the order to get an encoding benefit. As movzx is 3 bytes with independent source/dest registers. The shortest 'and' we could make is also 3 bytes unless we get lucky in the register allocator and its on AL/AX/EAX which have a 2 byte encoding.

This patch was more impressive before r322957 went in. It removed some of the same Ands that got deleted by that patch.

Reviewers: spatel, RKSimon

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D42313

llvm-svn: 323175
2018-01-23 05:45:52 +00:00
Craig Topper e5aea25980 [X86] Remove 'NOREX' comment from the printing of _NOREX instructions.
Some of the NOREX instructions are used in 32-bit mode making this printing confusing. It also doesn't provide a lot of value since you can see the h-register being used by the instruction.

llvm-svn: 323174
2018-01-23 05:37:00 +00:00
Craig Topper 26a701f24f [X86] Various vXi1 insertion improvements.
Add missing patterns for inserting v1i1 into a zero vector. Use insert_subvector to zero upper bits before inserting an element into a vXi1 vector. Replace kshift based isel pattern with insert_subvector based pattern now that code that caused the pattern has been fixed to emit insert_subvector.

llvm-svn: 323173
2018-01-23 05:36:53 +00:00
Rafael Espindola 6b2b45020c Use 4 as the alignment of .eh_frame_hdr.
It includes 32 bit values and this matches both gold and bfd.

llvm-svn: 323172
2018-01-23 05:23:23 +00:00