Tested by comparing make check VERBOSE=1 before and after to make sure
no tests are missed. (VERBOSE=1 prints the list of tests.)
Only one test :( remains where .cpp is required:
tools/llvm-cov/range_based_for.cpp:// RUN: llvm-cov range_based_for.cpp | FileCheck %s --check-prefix=STDOUT
The topic was discussed in this thread:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140428/214905.html
llvm-svn: 208621
The current patterns for REV16 misses mostn __builtin_bswap16() due to
legalization promoting the operands to from load/stores toi32s and then
truncing/extending them. This patch adds new patterns that catch the resultant
DAGs and codegens them to rev16 instructions. Tests included.
rdar://15353652
llvm-svn: 208620
determine whether we get a mangling for a return type, rather than trying to
figure it out based on whether the mangled name ended with a '>'.
llvm-svn: 208611
asan_cxx containts replacements for new/delete operators, and should
only be linked in C++ mode. We plan to start building this part
with exception support to make new more standard-compliant.
See https://code.google.com/p/address-sanitizer/issues/detail?id=295
for more details.
llvm-svn: 208610
asan_cxx containts replacements for new/delete operators, and should
only be linked in C++ mode. We plan to start building this part
with exception support to make new more standard-compliant.
See https://code.google.com/p/address-sanitizer/issues/detail?id=295
for more details.
llvm-svn: 208609
One test case had to be updated as it still had the extra indirection
for the variable list - removing the extra indirection got it back to
passing.
llvm-svn: 208608
This is a slightly different approach to AArch64 (the base instruction
definitions aren't quite right for that to work), but achieves the
same thing and reduces C++ hackery in AsmParser.
llvm-svn: 208605
Add (missing) definition of COMPILER_RT_EXPORT which is meant to be used for
decorating functions that are meant to be exported. This is useful for
platforms where exports and imports must be decorated explicitly (i.e. Windows).
llvm-svn: 208593
Use COMPILER_RT_EXPORT rather than COMPILER_RT_ABI for this function. Adding an
explicit PCS standard to the function causes a mismatch between the
declarations. Furthermore, the function is implemented in C, and should take
the CC based on the target triple.
llvm-svn: 208591
Summary:
Also use named constants for common opcode fields.
Depends on D3669
Reviewers: jkolek, vmedic, zoran.jovanovic
Differential Revision: http://reviews.llvm.org/D3670
llvm-svn: 208582
The .align statements in ARM assembly routines is actually meant to be a power
of 2 alignment (e.g. .align 2 == 4 byte alignment, not 2). Switch to using
.p2align. .p2align is guaranteed to be a power-of-two alignment always and much
more explicit.
The .align in the case of x86_64 is byte alignment, use .balign instead of
.align.
llvm-svn: 208578
There are some interesting decisions based on non-obvious rationale in
the ARM64-BE NEON implementation - decent documentation is definitely required.
llvm-svn: 208577
Summary: The 'mul' line of the test is temporarily commented out because it currently matches the MIPS32 mul instead of the MIPS32r6 mul. This line will be uncommented when we disable the MIPS32 mul on MIPS32r6.
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3668
llvm-svn: 208576
Alexey Samsonov