Commit Graph

425385 Commits

Author SHA1 Message Date
Stephen Long a5b056fe49 [MSVC] Fix pragma alloc_text failing for C files
`isExternCContext()` is returning false for functions in C files

Reviewed By: rnk, aaron.ballman

Differential Revision: https://reviews.llvm.org/D126559
2022-06-01 09:39:46 -07:00
Simon Pilgrim 4565f7e747 [Hexagon] Regenerate store-imm-amode.ll 2022-06-01 17:39:07 +01:00
Simon Pilgrim 0f7bd78483 [AMDGPU] Regenerate fabs.f16.ll tests 2022-06-01 17:36:13 +01:00
Scott Linder 2d43955cec [AMDGPU][NFC] Refactor AMDGPUCallingConv.td
Rename CalleeSavedRegs defs to avoid being overly specific:

* CSR_AMDGPU_AGPRs_32_255 => CSR_AMDGPU_AGPRs
* CSR_AMDGPU_SGPRs_30_31 + CSR_AMDGPU_SGPRs_32_105 => CSR_AMDGPU_SGPRs
* CSR_AMDGPU_SI_Gfx_SGPRs_4_29 + CSR_AMDGPU_SI_Gfx_SGPRs_64_105 =>
  CSR_AMDGPU_SI_Gfx_SGPRs
* CSR_AMDGPU_HighRegs => CSR_AMDGPU
* CSR_AMDGPU_HighRegs_With_AGPRs => CSR_AMDGPU_GFX90AInsts
* CSR_AMDGPU_SI_Gfx_With_AGPRs => CSR_AMDGPU_SI_Gfx_GFX90AInsts

Introduce a class RegMask to mark the cases where we use the
CalleeSavedRegs class purely as an expedient way to produce a mask.
Update the names of these masks to not mention "CSR". Other targets also
seem to do this, so a reasonable alternative is to actually update
table-gen to include a new class to do this explicitly, but the current
approach seems harmless so I opted to just make it more explicit.

Reviewed By: arsenm, sebastian-ne

Differential Revision: https://reviews.llvm.org/D109008
2022-06-01 16:24:09 +00:00
Mats Petersson dc4bf2c33c [flang][OpenMP]Make omp.wsloop arguments appear in memory (#1277)
As per issue #1196, the loop induction variable, which is an argument
in the omp.wsloop operation, does not have a memory location, so when
passed to a function or subroutine, the reference to the value is not
a memory location, but the value of the induction variable. The callee
function/subroutine is then trying to dereference memory at address 1
or some other "not a good memory location".

This is fixed by creating a temporary memory location and storing the
value of the induction variable in that.

Test fixes as a consequence of the changed code generated.

Add checking for some of the omp-unstructured.f90 to check for alloca,
store and load operations, to ensure the correct flow. Add a test
for CYCLE inside a omp-do loop.

Also convert to use -emit-fir in the omp-unstructrued, and make
the symbol matching consistent in the omp-wsloop-variable test.

Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D126711
2022-06-01 17:20:06 +01:00
Matthias Braun 53753531bc TensorFlowCompile: Add object file to list of sources rather than LINK_LIBS
Differential Revision: https://reviews.llvm.org/D126736
2022-06-01 09:04:48 -07:00
Arjun P 8f99cdd27c [MLIR][Presburger] Simplex: remove redundant zeroing out of row
This fillRow(..., 0) is redundant because when the size of the tableau is
consistent, the resize always creates a new row, which is zero-initialized.

Also added asserts throughout to ensure the dimensions of the tableau remain
consistent.

Reviewed By: Groverkss

Differential Revision: https://reviews.llvm.org/D126709
2022-06-01 16:59:37 +01:00
Arjun P ec145ba2a3 [MLIR][Presburger] Matrix: inline trivial accessors
This resolves a comment from https://reviews.llvm.org/D126708
that was previously missed.
2022-06-01 16:56:46 +01:00
Arjun P d5e31cf38a [MLIR][Presburger] Move Matrix accessors inline
This gives a 1.5x speedup on the Presburger unittests.

Reviewed By: Groverkss

Differential Revision: https://reviews.llvm.org/D126708
2022-06-01 16:51:42 +01:00
Mark de Wever 04a3146caa [libc++][format] Fixes string-literal formatting.
Formatting a string-literal had an off-by-one issue where the NUL
terminator became part of the formatted output.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D126665
2022-06-01 17:49:09 +02:00
PeixinQiao fe2cc16035 [NFC][MLIR] Fix -Wtype-limits warning
Fix the warning: comparison of unsigned expression in ‘>= 0’ is always
true.

Reviewed By: kiranchandramohan, shraiysh

Differential Revision: https://reviews.llvm.org/D126784
2022-06-01 23:42:07 +08:00
Mital Ashok 872f74440f Fix std::has_unique_object_representations for _BitInt types with padding bits
"std::has_unique_object_representations<_BitInt(N)>" was always true,
even if the type has padding bits (since the trait assumes all integer
types have no padding bits). The standard has an explicit note that
this should not hold for types with padding bits.

Differential Revision: https://reviews.llvm.org/D125802
2022-06-01 11:34:40 -04:00
Luke Nihlen 1f6ea2a37c Expand definition deprecation warning to include constexpr statements.
Clang currently warns on definitions downgraded to declarations
with a const modifier, but not for a constexpr modifier. This patch
updates the warning logic to warn on both inputs, and adds a test to
check the additional case as well.

See also: https://bugs.chromium.org/p/chromium/issues/detail?id=1284718

Differential Revision: https://reviews.llvm.org/D126664
2022-06-01 11:31:07 -04:00
Craig Topper aeb27f133a [RISCV] Fix i64<->f64 and i32<->f32 bitcasts with VLS vectors enabled.
We enable a custom handler to optimize conversions between scalars
and fixed vectors. Unfortunately, the custom handler picks up scalar
to scalar conversions as well. If the scalar types are both legal,
we wouldn't match any of the fixed vector cases and would return SDValue()
causing the LegalizeDAG to expand the bitcast through memory.

This patch fixes this by checking if it's a scalar to scalar conversion
and returns `Op` if both types are legal.

Differential Revision: https://reviews.llvm.org/D126739
2022-06-01 08:13:49 -07:00
PeixinQiao 0a90b72c43 [flang] Add semantic checks for threadprivate and declare target directives
This patch supports the following checks:
```
[5.1] 2.21.2 THREADPRIVATE Directive
The threadprivate directive must appear in the declaration section of
a scoping unit in which the common block or variable is declared.
[5.1] 2.14.7 Declare Target Directive
The directive must appear in the declaration section of a scoping unit
in which the common block or variable is declared.
```
Reviewed By: kiranchandramohan, shraiysh, NimishMishra

Differential Revision: https://reviews.llvm.org/D125767
2022-06-01 22:40:51 +08:00
Denis Antrushin 7047d79fde [TwoAddressInstructionPass] Relax assert in statepoint processing.
D124631 added special processing for STATEPOINT instructions.
It appears that assertion added there is too strong. We can get two
tied operands with the same register tied to different defs. If we
hit such case, do not process it in statepoint-specific code and
delegate it to common case.
2022-06-01 21:34:52 +07:00
Simon Pilgrim 0a96885940 [ARM] uxtb.ll - adjust armv6 triple so the update_llc_test_checks.py script can be used to regenerate the tests
No need to specify armv6-apple-darwin in these UXTB codegen tests
2022-06-01 15:28:19 +01:00
Simon Pilgrim e1d02f6c37 [ARM][Thumb2] Refresh UXTB16 tests to match optimized IR from instcombine
As discussed on D77804, instcombine will have already performed a similar SimplifyMultipleUseDemandedBits call which will break the UXTB16 pattern that was being match in these DAG tests

I've updated the existing tests so that it match the instcombine IR (with a suitable FIXME) and added an equivalent test pattern suggested by @dmgreen
2022-06-01 15:28:19 +01:00
Balazs Benics 3a07280290 [analyzer] Fix wrong annotation of PointerToMemberData
Unfortunately I don't have a reproducer for this.
Reported by @mikaelholmen!

Differential Revision: https://reviews.llvm.org/D126198
2022-06-01 16:12:54 +02:00
Simon Pilgrim de2b543505 [X86] LowerVSETCC - merge getConstant() calls with flipped/unflipped sign masks. NFCI. 2022-06-01 15:09:48 +01:00
Sanjay Patel 3a503a4a9c [x86] fix miscompile from wrongly identified fneg
We may need to peek through a bitcast when identifying an fneg idiom
via its pool constant, but we can't allow a different-sized constant
in that match.

This is noted in issue #55758 with an example that needs fast-math,
but as the test here shows, this has potential to miscompile more
generally (no fast-math required).

Differential Revision: https://reviews.llvm.org/D126775
2022-06-01 09:56:33 -04:00
Guillaume Chatelet ffa479a452 [libc] fix typo in BUILD.bazel feature 2022-06-01 13:53:36 +00:00
Matt Arsenault 0e1c71e4a4 CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
Avoid the dependency on TargetInstrInfo, which depends on the subtarget
and therefore the individual function.

Currently AMDGPU is constructing PseudoSourceValue instances in MachineFunctionInfo.
In order to facilitate copying MachineFunctionInfo, we need to stop allocating these
there. Alternatively we could allow targets to subclass PseudoSourceValueManager,
and allocate them similarly to MachineFunctionInfo.
2022-06-01 09:45:40 -04:00
Sanjay Patel 3c3f2f99c4 [x86] add test for mismatched fneg; NFC
issue #55758
2022-06-01 09:45:33 -04:00
Guillaume Chatelet b2a9ea4420 [libc] Apply no-builtin everywhere, remove unnecessary flags
Note, this is a re-submission of D125894 with `features = ["-header_modules"]`
added to the main BUILD.bazel file.

Some functions like `stpncpy` are implemented in terms of `memset` but are not
currently using `-fno-builtin-memset`. This is somewhat hidden by the fact that
we use `-ffreestanding` globally and that `-ffreestanding` implies
`-fno-builtin` for Clang.

This patch also removes `-mllvm -combiner-global-alias-analysis` that is Clang
specific and that does not bring substantial gains on modern processors.

Also we keep `-mllvm --tail-merge-threshold=0` for aarch64 in CMakeLists.txt
but we omit it in the Bazel config. This is because Bazel consumes the source
files directly and so it can use PGO to take optimal decisions locally.

Differential Revision: https://reviews.llvm.org/D126773
2022-06-01 13:34:36 +00:00
Mikhail Goncharov f951a6b2f3 Fix potentially uninitialized memory
For 7d76d60958
2022-06-01 15:31:37 +02:00
Alexander Kornienko 7aa8a67882 Revert "[LAA] Initial support for runtime checks with pointer selects."
This reverts commit 5890b30105 as per discussion
on the review thread: https://reviews.llvm.org/D114487#3547560.
2022-06-01 15:24:27 +02:00
LLVM GN Syncbot b0f868f007 [gn build] Port a0dcbe45bd 2022-06-01 13:19:42 +00:00
LLVM GN Syncbot b9b13a5645 [gn build] Port 2011052150 2022-06-01 13:19:41 +00:00
Matt Arsenault a0dcbe45bd llvm-reduce: Add reduction pass to remove regalloc hints
I'm a bit confused by what's actually stored for the allocation
hints. The MIR parser only handles the "simple" case where there's a
single hint. I don't really understand the assertion in
clearSimpleHint, or under what circumstances there are multiple hint
registers.
2022-06-01 09:15:41 -04:00
Matt Arsenault 2011052150 llvm-reduce: Add pass to reduce MIR instruction flags 2022-06-01 08:58:34 -04:00
Florian Hahn f68c547158
[LAA] Remove unused RuntimeCheckingPtrGroup constructor (NFC).
The constructor is not used. Remove it.
2022-06-01 13:30:33 +01:00
Alexander Kornienko aa98e7e1eb Revert "[InstCombine] Combine instructions of type or/and where AND masks can be combined."
This reverts commit ec4adf1f6c. The commit causes
clang to hang on a certain input:
```
$ cat q.cc
int f(int a, int b) {
  int c = ((unsigned char)(a >> 23) & 925);
  if (a)
    c = (a >> 23 & b) | ((unsigned char)(a >> 23) & 925) | (b >> 23 & 157);
  return c;
}

$ time ./clang-15-10515 --target=x86_64--linux-gnu -O1  -c q.cc
^C

real    0m45.072s
user    0m0.025s
sys     0m0.099s
```
2022-06-01 14:20:00 +02:00
Kiran Chandramohan 8c349d707e [Flang] Lower the infinite do loop
The basic infinite loop is lowered to a branch to the body of the
loop, and the body containing a back edge as its terminator.

Note: This is part of upstreaming from the fir-dev branch of
https://github.com/flang-compiler/f18-llvm-project.

Reviewed By: rovka

Differential Revision: https://reviews.llvm.org/D126697

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
2022-06-01 12:06:40 +00:00
Haojian Wu 94552f0216 [pseudo] Build inc files when cxx.bnf changes.
Add the cxx.bnf file as a dependency of custom gen commands, so that the
inc files can be rebuilt when cxx.bnf changes.
2022-06-01 13:48:09 +02:00
Simon Pilgrim f6dbb0b6fb [X86] Fix typo in extraction type introduced in rGed0303aa2251e4484a2b4ff7f236c9f7cdfb2092
It doesn't look like we have test coverage for this at the moment :(
2022-06-01 12:31:27 +01:00
Christian Sigg f330db8b14 Fix bazel build after 59b273a166. 2022-06-01 13:13:18 +02:00
Nikita Popov 8bfd69ca33 [llvm-c-test] Always set opaque pointers mode
Avoid a behavior change when opaque pointers are enabled by default.
2022-06-01 12:55:43 +02:00
Sheng 3fd75ce9c4 [NFC] fix typo 2022-06-01 18:48:03 +08:00
Sander de Smalen 3ec78d9ff1 [Clang] NFCI: Add a new bit HasExtraBitfields to FunctionType.
The FunctionTypeExtraBitfields is currently only available when the
ExceptionSpecificationType == Dynamic, which means that there is no other
way to use or extend the FunctionTypeExtraBitfields independently of the
exception specification type.

This patch adds a new field HasExtraBitfields to specify
whether the prototype has trailing ExtraBitfields.

This patch intends to be NFC and is required for future extension
and use of the ExtraBitfields struct.

Reviewed By: aaron.ballman, erichkeane

Differential Revision: https://reviews.llvm.org/D126642
2022-06-01 12:40:33 +02:00
Christian Sigg 7cb8b973fa Fix bazel build after 59b273a166.
Reviewed By: tpopp

Differential Revision: https://reviews.llvm.org/D126765
2022-06-01 12:12:04 +02:00
Simon Pilgrim ea8fb3b601 [X86] combineConcatVectorOps - add support for concatenation VSELECT/BLENDV nodes
If the LHS/RHS selection operands can be cheaply concatenated back together then replace 2 x 128-bit selection nodes with 1 x 256-bit node

Addresses the regression introduced in the bug fix from rGd5af6a38082b39ae520a328e44dc29ebcb036bb2
2022-06-01 10:46:06 +01:00
Florian Hahn 05776122b6
[VPlan] Use region for each loop in native path.
This patch updates the VPlan native path to use VPRegionBlocks for all
loops in a loop nest. Up to now, only the outermost loop used a region.

This is a step towards unifying both paths and keep things consistent
between them. It also prepares various code-gen parts for modeling the
pre-header in the inner loop vectorizer (D121624).

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D123005
2022-06-01 10:41:05 +01:00
Andrew Ng e06a81d810 [LSAN] Fix up LSAN weak symbols for Windows
Differential Revision: https://reviews.llvm.org/D126703
2022-06-01 10:18:51 +01:00
Nicolas Vasilache 59b273a166 [mlir][SCF] Add parallel abstraction on tensors.
This revision adds `scf.foreach_thread` and other supporting abstractions
that allow connecting parallel abstractions and tensors.

Discussion is available [here](https://discourse.llvm.org/t/rfc-parallel-abstraction-for-tensors-and-buffers/62607).

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D126555
2022-06-01 09:16:01 +00:00
lewuathe ffb8eecdd6 [mlir][complex] Lowering complex.tanh to standard
Lowering complex.tanh to standard dialects including math, arith.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D126521
2022-06-01 11:13:54 +02:00
Guillaume Chatelet 4cbfd2e7eb [libc][mem*] Address facility + test enum support
This patch is a subpart of D125768 intented to make the review easier.

The `Address` struct represents a pointer but also adds compile time knowledge
like alignment or temporal/non-temporal that helps with downstream instruction
selection.

Differential Revision: https://reviews.llvm.org/D125966
2022-06-01 09:09:43 +00:00
Nicolas Vasilache beab8e871e Revert "[mlir][SCF] Add parallel abstraction on tensors."
This reverts commit 9b7193f852.

This is an older branch that was committed by mistake and does not include addressed review comments, an updated version will come next.
2022-06-01 09:04:20 +00:00
Nicolas Vasilache 9b7193f852 [mlir][SCF] Add parallel abstraction on tensors.
This revision adds `scf.foreach_thread` and other supporting abstractions
that allow connecting parallel abstractions and tensors.

Discussion is available [here](https://discourse.llvm.org/t/rfc-parallel-abstraction-for-tensors-and-buffers/62607).
2022-06-01 09:02:16 +00:00
serge-sans-paille b1b86b6394 [Clang][Driver] More explicit message when failing to find sanitizer resource file
Compiler-rt doesn't provide support file for cfi on s390x ad ppc64le (at least).
When trying to use the flag, we get a file error.

This is an attempt at making the error more explicit.

Differential Revision: https://reviews.llvm.org/D120484
2022-06-01 10:54:20 +02:00