2 Commits

Author	SHA1	Message	Date
Krzysztof Parzyszek	a72fad980c	[Hexagon] Replace instruction definitions with auto-generated ones ... llvm-svn: 294753	2017-02-10 15:33:13 +00:00
Brendon Cahoon	7c8a3b0ef6	[Hexagon] Generate hardware loop for a vectorized loop ... The induction variable in the vectorized loop wasn't recognized properly, so a hardware loop wasn't generated. Differential Revision: http://reviews.llvm.org/D9722 llvm-svn: 237388	2015-05-14 20:36:19 +00:00