Commit Graph

264953 Commits

Author SHA1 Message Date
Reid Kleckner 44cdb10964 [PDB] Start emitting source file and line information
Summary:
This is a first step towards getting line info to show up in VS and
windbg. So far, only llvm-pdbutil can parse the PDBs that we produce.
cvdump doesn't like something about our file checksum tables. I'll have
to dig into that next.

This patch adds a new DebugSubsectionRecordBuilder which takes bytes
directly from some other producer, such as a linker, and sticks it into
the PDB. Line tables only need to be relocated. No data needs to be
rewritten.

File checksums and string tables, on the other hand, need to be re-done.

Reviewers: zturner, ruiu

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D34257

llvm-svn: 305713
2017-06-19 17:21:45 +00:00
Francis Ricci 214b354f2e Revert "Add lsan interceptors for libdispatch functions on darwin"
This reverts r305695

llvm-svn: 305712
2017-06-19 17:08:55 +00:00
Yaxun Liu 84744c152a CodeGen: Cast temporary variable to proper address space
In C++ all variables are in default address space. Previously change has been
made to cast automatic variables to default address space. However that is
not sufficient since all temporary variables need to be casted to default
address space.

This patch casts all temporary variables to default address space except those
for passing indirect arguments since they are only used for load/store.

This patch only affects target having non-zero alloca address space.

Differential Revision: https://reviews.llvm.org/D33706

llvm-svn: 305711
2017-06-19 17:03:41 +00:00
Jakub Kuderski f6dbefe1b1 [Dominators] Clean up GenericDomTree.h. NFC.
Summary:
This patch cleans up GenericDomTree.h by:

- removing unnecessary <NodeT> in DomTreeNodeBase
- removing unnecessary std::move on bools
- changing type of DFSNumIn/DFSNumOut from int to unsigned (since the members were used as unsigned anyway)

The changes don't affect behavior -- everything works as before.

Reviewers: sanjoy, dberlin, chandlerc

Reviewed By: dberlin

Subscribers: davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D34229

llvm-svn: 305710
2017-06-19 16:59:20 +00:00
Tobias Grosser dcd94e3e93 [ScheduleOptimizer] Fix minor typo [NFC]
llvm-svn: 305709
2017-06-19 16:55:48 +00:00
Reid Kleckner 18d90e17ad [CodeView] Fix dumping of public symbol record flags
I noticed nonsensical type information while dumping PDBs produced by
MSVC.

llvm-svn: 305708
2017-06-19 16:54:51 +00:00
Davide Italiano daa9c0e403 [NewGVN] Simplify findConditionEquivalence(). NFCI.
llvm-svn: 305707
2017-06-19 16:46:15 +00:00
Dinar Temirbulatov e2c6991c07 Remove brackets, NFC.
llvm-svn: 305706
2017-06-19 16:44:07 +00:00
Craig Topper a7529b68cc [InstCombine] Cleanup some duplicated one use checks
Summary:
These 4 patterns have the same one use check repeated twice for each. Once without a cast and one with. But the cast has no effect on what method is called.

For the OR case I believe it is always profitable regardless of the number of uses since we'll never increase the instruction count.

For the AND case I believe it is profitable if the pair of xors has one use such that we'll get rid of it completely. Or if the C value is something freely invertible, in which case the not doesn't cost anything.

Reviewers: spatel, majnemer

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34308

llvm-svn: 305705
2017-06-19 16:23:49 +00:00
Craig Topper ef85498e05 [Reassociate] Support some reassociation of vector xors
Summary:
Currently we don't try to do anything with vector xors.

This patch adds support for removing duplicate pairs from a chain of vector xors as its pretty easy to support. We still dont' try to combine the xors with and/ors, but I might try that in a future patch.

Reviewers: mcrosier, davide, resistor

Reviewed By: mcrosier

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34338

llvm-svn: 305704
2017-06-19 16:23:46 +00:00
Craig Topper 4350734d36 [Reassociate] Make one of the helper methods static because it doesn't use any class variables. NFC
llvm-svn: 305703
2017-06-19 16:23:43 +00:00
Artem Tamazov 314eafb73d [AMDGPU][mc][tests][NFC] Bulk ISA tests: Massive update. Add Gfx9 dasm tests.
A new Gfx9 dasm test added with approx 29000 cases.
Existing tests extended by (approx.):
* Gfx7 asm: 5000 test cases
* Gfx8 asm: 5000 test cases
* Gfx9 asm: 14400 test cases
* Gfx8 dasm: 5200 test cases

llvm-svn: 305702
2017-06-19 15:55:02 +00:00
Nirav Dave 8dcd008d18 Allow truncated and extend memory operations in Store Merge. NFCI.
As all store merges checks are based on the memory operation
performed, allow use of truncated stores and extended loads as valid
input candidates for merging.

Relanding after fixing selection between truncated and normal store.

llvm-svn: 305701
2017-06-19 15:32:28 +00:00
Andrew Ng 6e9f98c198 [LLD][LinkerScript] Add support for segment NONE.
This patch adds support for segment NONE in linker scripts which enables the
specification that a section should not be assigned to any segment.

Note that GNU ld does not disallow the definition of a segment named NONE, which
if defined, effectively overrides the behaviour described above. This feature
has been copied.

Differential Revision: https://reviews.llvm.org/D34203

llvm-svn: 305700
2017-06-19 15:28:58 +00:00
Anna Thomas 7949f4529a [JumpThreading][LVI] Invalidate LVI information after blocks are merged
Summary:
After a single predecessor is merged into a basic block, we need to invalidate
the LVI information for the new merged block, when LVI is not provably true for
all of instructions in the new block.
The test cases added show the correct LVI information using the LVI printer
pass.

Reviewers: reames, dberlin, davide, sanjoy

Reviewed by: dberlin, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34108

llvm-svn: 305699
2017-06-19 15:23:33 +00:00
Xin Tong b412831d11 [TRE] Improve code motion in TRE, use AA to tell whether a load can be moved before a call that writes to memory.
Summary: use AA to tell whether a load can be moved before a call that writes to memory.

Reviewers: dberlin, davide, sanjoy, hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, llvm-commits

Differential Revision: https://reviews.llvm.org/D34115

llvm-svn: 305698
2017-06-19 15:21:18 +00:00
Nirav Dave 4e363e36fb Add test for store merge with noimplicitfloat
llvm-svn: 305697
2017-06-19 15:18:20 +00:00
Francois Ferrand 5f07f443be clang-format: Fix C99 designated initializers corner cases
Summary:
This fixes the missing space before the designated initializer when `Cpp11BracedListStyle=false` :

  const struct A a = { .a = 1, .b = 2 };
                      ^

Also, wrapping between opening brace and designated array initializers used to have an excessive penalty (like breaking between an expression and the subscript operator), leading to unexpected wrapping:

  const struct Aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaa =
      {[1] = aaaaaaaaaaaaaaaaaaaaaaaaaaa,
       [2] = bbbbbbbbbbbbbbbbbbbbbbbbbbb};

instead of:

  const struct Aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaaaa = {
      [1] = aaaaaaaaaaaaaaaaaaaaaaaaaaa,
      [2] = bbbbbbbbbbbbbbbbbbbbbbbbbbb};

Finally, designated array initializers are not binpacked, just like designated member initializers.

Reviewers: djasper

Reviewed By: djasper

Subscribers: cfe-commits, krasimir, klimek

Differential Revision: https://reviews.llvm.org/D33491

llvm-svn: 305696
2017-06-19 14:41:21 +00:00
Francis Ricci 4f1e047a6d Add lsan interceptors for libdispatch functions on darwin
Summary:
This is required for standalone LSan to work with libdispatch worker threads,
and is a slimmed down version of the functionality provided for ASan
in asan_mac.cc.

Reviewers: alekseyshl, kubamracek, glider, kcc

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D34247

llvm-svn: 305695
2017-06-19 14:09:10 +00:00
Florian Hahn fd44ca6c76 [AArch64] Fix order of checks in shouldScheduleAdjacent.
We need to check the opcode of FirstMI before accessing the operands. This
caused a buildbot failure during bootstrapping on AArch64.

llvm-svn: 305694
2017-06-19 13:45:41 +00:00
Simon Pilgrim 48bed53918 Use range for loops. NFCI.
llvm-svn: 305693
2017-06-19 13:24:12 +00:00
Tom Stellard ff63ee0db5 AMDGPU/GlobalISel: Mark G_BITCAST s32 <--> <2 x s16> legal
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D34129

llvm-svn: 305692
2017-06-19 13:15:45 +00:00
Igor Breger bd2dedaa38 [GlobalISel][X86] Fold FI/G_GEP into LDR/STR instruction addressing mode.
Summary: Implement some of the simplest addressing modes.It should help to test ABI.

Reviewers: zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33888

llvm-svn: 305691
2017-06-19 13:12:57 +00:00
Florian Hahn 5f746c8e27 Recommit rL305677: [CodeGen] Add generic MacroFusion pass
Use llvm::make_unique to avoid ambiguity with MSVC.

This patch adds a generic MacroFusion pass, that is used on X86 and
AArch64, which both define target-specific shouldScheduleAdjacent
functions. This generic pass should make it easier for other targets to
implement macro fusion and I intend to add macro fusion for ARM shortly.

Differential Revision: https://reviews.llvm.org/D34144

llvm-svn: 305690
2017-06-19 12:53:31 +00:00
Pavel Labath 3508fc8cc5 Add pretty-printer for wait(2) statuses and modernize the code handling them
Summary:
A number of places were trying to decode the result of wait(). Add a simple
utility function that does that and a struct that encapsulates the
decoded result. Then also provide a pretty-printer for that class.

Reviewers: zturner, krytarowski, eugene

Subscribers: lldb-commits, mgorny

Differential Revision: https://reviews.llvm.org/D33998

llvm-svn: 305689
2017-06-19 12:47:50 +00:00
Christof Douma cc1c112806 Revert "[NFC] Refactor DiagnosticRenderer to use FullSourceLoc"
This reverts commit 305684.
This patch breaks extra/tools/clang-tidy

llvm-svn: 305688
2017-06-19 12:41:22 +00:00
Pavel Labath 9376007af7 Tweak SysV_arm64 function entry unwind plan
Summary:
The motivation for this is to make sure the first row of the plan
compares equal to the first row of a generic debug_frame unwind plan.
Right now, the code in FuncUnwinders::GetUnwindPlanAtNonCallSite
considers them unequal because they specify the return address in a
different way (SetReturnAddressRegister(LR) vs. an explicit PC=LR rule).
This means that FuncUnwinders would always choose the debug_frame unwind
plan, which is not correct, as that one is usually not correct at all
locations.

Right now this is basically a noop because we don't have parse any
debug_frame plans, but it fixes some test failures when merging D33504
in.

I have to say I don't understand the full implications of the switch to
SetReturnAddressRegister() way of doing things, but given that all of
our other unwind plans (eh_frame, instruction profiling) do it this way,
it sounds like the right thing to do.

Reviewers: tberghammer, jasonmolenda, omjavaid

Subscribers: aemerson, javed.absar, kristof.beyls, lldb-commits

Differential Revision: https://reviews.llvm.org/D34199

llvm-svn: 305687
2017-06-19 12:39:34 +00:00
Pavel Labath 319b38398e Delete ProcessLauncherPosix
Summary:
ProcessLauncherPosix was using posix_spawn for launching the process,
but this function is not available on all platforms we support, and even
where it was avaialable, it did not support the full range of options we
require for launching (most importantly, launching in stop-on-entry
mode). For these reasons, the set of ifdefs around these functions has
grown untractably large, and we were forced to implement our own
launcher from more basic primitives anyway (ProcessLauncherPosixFork --
used on Linux, Android, and NetBSD).

Therefore, I remove this class, and move the relevant parts of the code
to the darwin-specific Host.mm file. This is the platform that code was
originally written for anyway, and it's the only platform where this
implementation makes sense (e.g. the lack of the "thread-specific
working directory" concept makes these functions racy on all other
platforms). This allows us to remove a lot of ifdefs and simplify the
code.

Effectively, the only change this introduces is that FreeBSD will now
use the fork-based launcher instead of posix_spawnp. That sholdn't be a
problem as this approach works at least on one other BSD-based system
already.

Reviewers: krytarowski, emaste, jingham

Subscribers: srhines, mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D34236

llvm-svn: 305686
2017-06-19 12:26:22 +00:00
Alex Lorenz 89cfff03ee Move the test from r305678 to a separte file with 'REQUIRES: system-darwin'
Otherwise it will fail on non-macOS systems.

llvm-svn: 305685
2017-06-19 12:13:59 +00:00
Christof Douma f9d86db755 [NFC] Refactor DiagnosticRenderer to use FullSourceLoc
Move the DiagnosticRenderer and its dependents to using FullSourceLocs
instead of a SourceLocation and SourceManager pointer. The changeset is
rather large but entirely mechanical.

This is step one to allow DiagnosticRenderer to take either
llvm::SMLocs or clang::SourceLocations.

Patch by Sanne Wouda

Review: https://reviews.llvm.org/D31709

Change-Id: If351a112cdf6718e2d3ef6721b8da9c6376b32dd
llvm-svn: 305684
2017-06-19 12:05:58 +00:00
Diana Picus 78aaf7db04 [ARM] GlobalISel: Support G_ICMP for s8 and s16
Widen to s32 (like all other binary ops).

llvm-svn: 305683
2017-06-19 11:47:28 +00:00
Sagar Thakur 6478d14a0d [scudo] Enabling MIPS support for Scudo
Adding MIPS 32-bit and 64-bit support for Scudo.

Reviewed by cryptoad, sdardis.
Differential: D31803

llvm-svn: 305682
2017-06-19 11:28:59 +00:00
Florian Hahn e16d3106f3 Revert r305677 [CodeGen] Add generic MacroFusion pass.
This causes Windows buildbot failures do an ambiguous call.

llvm-svn: 305681
2017-06-19 11:26:15 +00:00
Alex Lorenz ae9afeb5fa Add missing OS check to r305678
That commit failed on non-macOS buildbots as I've forgotten to make sure that
the system on which Clang is running on is actually macOS.

llvm-svn: 305680
2017-06-19 11:25:37 +00:00
James Henderson 38e67e8212 [ELF] Emit only one error if -z max-page-size without value
In r305364, Rui changed the mechanism that parses -z option values slightly.
This caused a bug, as demonstrated by this test, which now fails:

---
# REQUIRES: x86
# RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t.o
# RUN: ld.lld %t.o -o %t -z max-page-size

.global _start
_start:
  nop
---

Before, the link succeeded and set the max-page-size to the target default.

After we get the following two error messages:
"invalid max-page-size: "
"max-page-size: value isn't a power of 2"

The latter error is because an uninitialised variable ends up being passed back
to getMaxPageSize).

This change ensures we only get the first error.

Reviewers: ruiu

Differential Revision: https://reviews.llvm.org/D34234

llvm-svn: 305679
2017-06-19 11:05:15 +00:00
Alex Lorenz dad1e1a3b5 [driver][macOS] Pick the system version for the deployment target
if the SDK is newer than the system

This commit improves the driver by making sure that it picks the system version
for the deployment target when the version of the macOS SDK is newer than the
system version.

rdar://29449467

Differential Revision: https://reviews.llvm.org/D34175

llvm-svn: 305678
2017-06-19 10:57:27 +00:00
Florian Hahn ee1b096f8a [CodeGen] Add generic MacroFusion pass.
Summary:
This patch adds a generic MacroFusion pass, that is used on X86 and
AArch64, which both define target-specific shouldScheduleAdjacent
functions. This generic pass should make it easier for other targets to
implement macro fusion and I intend to add macro fusion for ARM shortly.

Reviewers: craig.topper, evandro, t.p.northover, atrick, MatzeB

Reviewed By: MatzeB

Subscribers: atrick, aemerson, mgorny, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34144

llvm-svn: 305677
2017-06-19 10:51:38 +00:00
Tobias Grosser 2fb3ed200a [ScheduleOptimizer] Move isolateFullPartialTiles and isolateAndUnrollMatMulInnerLoops to C++
llvm-svn: 305676
2017-06-19 10:40:12 +00:00
Michael Kruse 214deb7960 [CodeGen] Emit aliasing metadata for new arrays.
Ensure that all array base pointers are assigned before generating
aliasing metadata by allocating new arrays beforehand.

Before this patch, getBasePtr() returned nullptr for new arrays because
the arrays were created at a later point. Nullptr did not match to any
array after the created array base pointers have been assigned and when
the loads/stores are generated.

llvm-svn: 305675
2017-06-19 10:19:29 +00:00
Michael Kruse 4aac459ca6 [CodeGen] Deterministic aliasing metadata order. NFC.
Replace DenseMap by a MapVector to enure that aliasing metadata is
always emitted in the same order.

llvm-svn: 305674
2017-06-19 10:19:23 +00:00
Peter Smith 9873c4b509 [ELF] make default for get{ARM,AArch64}UndefinedRelativeWeakVA unreachable
The get{ARM,AArch64}UndefinedRelativeWeakVA() functions should only be
called for PC-relative relocations. Complete the supported pc-relative
relocations in the switch statement and make the default case unreachable.

The R_ARM_TARGET relocation can be evaluated as R_ARM_REL32 but it is only
used in the context of exception tables, and is never output with respect
to a weak reference so it does not appear in the switch statement.
    
Differential Revision: https://reviews.llvm.org/D34138

llvm-svn: 305673
2017-06-19 09:43:43 +00:00
Diana Picus 621894ac76 [ARM] GlobalISel: Support G_ICMP for i32 and pointers
Add support throughout the pipeline:
- mark as legal for s32 and pointers
- map to GPRs
- lower to a sequence of instructions, which moves 0 or 1 into the
  result register based on the flags set by a CMPrr

We have copied from FastISel a helper function which maps CmpInst
predicates into ARMCC codes. Ideally, we should be able to move it
somewhere that both FastISel and GlobalISel can use.

llvm-svn: 305672
2017-06-19 09:40:51 +00:00
Guy Blank f4a09e55a6 [X86] Simplify vector-shuffle-v48 test. NFC.
llvm-svn: 305670
2017-06-19 08:58:13 +00:00
Daniel Marjamaki 9c6e848989 [analyzer] Fix logical not for pointers with different bit width
Differential Revision: https://reviews.llvm.org/D31029

llvm-svn: 305669
2017-06-19 08:55:51 +00:00
Michael Park 3f1e89380b Add a missing SFINAE condition to the `variant`'s converting constructor.
Remarks: This function shall not participate in overload resolution unless
         `is_same_v<decay_t<T>, variant>` is false, unless `decay_t<T>` is
         neither a specialization of `in_place_type_t` nor a specialization of
         `in_place_index_t`, unless `is_constructible_v<Tj, T>` is true, and
         unless the expression `FUN(std::forward<T>(t))` (with `FUN` being the
         above-mentioned set of imaginary functions) is well formed.

Depends on D34111.

Reviewers: EricWF, K-ballo

Reviewed By: EricWF

Subscribers: fhahn

Differential Revision: https://reviews.llvm.org/D34112

llvm-svn: 305668
2017-06-19 08:25:57 +00:00
Daniel Jasper f92659e4ea clang-format: Improve understanding of combined typedef+record declarations
Fixes an issue where struct A { int X; }; would be broken onto multiple
lines, but typedef struct A { int X; } A2; was collapsed onto a single
line.

Patch by Jacob Bandes-Storch. Thank you.

llvm-svn: 305667
2017-06-19 07:45:41 +00:00
Daniel Jasper 6a7d5a7a22 clang-format: Handle "if constexpr".
c++1z adds the following constructions to the language:

  if constexpr (cond)
    statement1;
  else if constexpr (cond)
    statement2;
  else if constexpr (cond)
    statement3;
  else
    statement4;

A first version of this was proposed in reviews.llvm.org/D26953 by
Francis Visoiu Mistrih, but never commited. This patch additionally
fixes the behavior when allowing short if statements on a single line
and was authored by Jacob Bandes-Storch. Thank you to both authors.

llvm-svn: 305666
2017-06-19 07:40:49 +00:00
Daniel Jasper 271dd0603e clang-format: Add capability to format the diff on save in vim.
With this patch, one can configure a BufWrite hook that will make the
clang-format integration compute a diff of the current buffer with the file
that's on disk and format all changed lines. This should create a
zero-overhead auto-format solution that doesn't require the file to
already be clang-format clean to avoid spurious diffs.

Review: https://reviews.llvm.org/D32429
llvm-svn: 305665
2017-06-19 07:30:04 +00:00
Sylvestre Ledru f955efc01b Fix a -Wmisleading-indentation warning
llvm-svn: 305664
2017-06-19 06:57:54 +00:00
Max Kazantsev 35b2a18eb9 [SCEV] Teach SCEVExpander to expand BinPow
Current implementation of SCEVExpander demonstrates a very naive behavior when
it deals with power calculation. For example, a SCEV for x^8 looks like

  (x * x * x * x * x * x * x * x)

If we try to expand it, it generates a very straightforward sequence of muls, like:

  x2 = mul x, x
  x3 = mul x2, x
  x4 = mul x3, x
      ...
  x8 = mul x7, x

This is a non-efficient way of doing that. A better way is to generate a sequence of
binary power calculation. In this case the expanded calculation will look like:

  x2 = mul x, x
  x4 = mul x2, x2
  x8 = mul x4, x4

In some cases the code size reduction for such SCEVs is dramatic. If we had a loop:

  x = a;
  for (int i = 0; i < 3; i++)
    x = x * x;

And this loop have been fully unrolled, we have something like:

  x = a;
  x2 = x * x;
  x4 = x2 * x2;
  x8 = x4 * x4;

The SCEV for x8 is the same as in example above, and if we for some reason
want to expand it, we will generate naively 7 multiplications instead of 3.
The BinPow expansion algorithm here allows to keep code size reasonable.

This patch teaches SCEV Expander to generate a sequence of BinPow multiplications
if we have repeating arguments in SCEVMulExpressions.

Differential Revision: https://reviews.llvm.org/D34025

llvm-svn: 305663
2017-06-19 06:24:53 +00:00