3e037d98e6
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
...
This matches the internal behavior of NVIDIA tools like libnvvm.
llvm-svn: 213168
2014-07-16 16:26:58 +00:00
f8f7091722
[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.
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llvm-svn: 185174
2013-06-28 17:57:59 +00:00
59fd8ba5f5
[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.
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llvm-svn: 178417
2013-03-30 14:29:30 +00:00
ae556d3ef7
This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it.
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The new target machines are:
nvptx (old ptx32) => 32-bit PTX
nvptx64 (old ptx64) => 64-bit PTX
The sources are based on the internal NVIDIA NVPTX back-end, and
contain more functionality than the current PTX back-end currently
provides.
NV_CONTRIB
llvm-svn: 156196
2012-05-04 20:18:50 +00:00
Justin Holewinski