Commit Graph

103497 Commits

Author SHA1 Message Date
Nick Lewycky f0cf8fa941 Optimize integral reciprocal (udiv 1, x and sdiv 1, x) to not use division. This fires exactly once in a clang bootstrap, but covers a few different results from http://www.cs.utah.edu/~regehr/souper/
llvm-svn: 208750
2014-05-14 03:03:05 +00:00
David Blaikie 9b8c8cda0d Recommit r208506: DebugInfo: Include lexical scopes in inlined subroutines.
This was reverted in r208642 due to regressions surrounding file changes
within lexical scopes causing inlining information to be lost.

The issue was in LexicalScopes::getOrCreateInlinedScope, where I was
previously testing "isLexicalBlock" which is false for
"DILexicalBlockFile" (a scope used to represent changes in the current
file name) and assuming it was then a function (breaking out of the
inlined scope path and reaching for the parent non-inlined scopes). By
inverting the condition and testing for "isSubprogram" the correct
behavior is attained.

(also found some weirdness in Clang, see r208742 when reducing this test
case - the resulting test case doesn't apply with the Clang fix, but
I've added a more realistic test case to inline-scopes.ll which does
reproduce the issue and demonstrate the fix)

llvm-svn: 208748
2014-05-14 01:08:28 +00:00
Eric Christopher 02e1804d8d Fix typo in function name.
llvm-svn: 208743
2014-05-14 00:31:15 +00:00
Matt Arsenault 4b0402e317 R600/SI: Try to fix BFE operands when moving to VALU
This was broken by r208479

llvm-svn: 208740
2014-05-13 23:45:50 +00:00
Lang Hames d311c0ea46 [tools][llvm-rtdyld] Add a '-dylib <file>' option to llvm-rtdyld to load shared
libraries before linking and executing the target objects.

This allows programs that use external calls (e.g. to libc) to be run under
llvm-rtdyld.

llvm-svn: 208739
2014-05-13 22:37:41 +00:00
Lang Hames 890758d5b3 [RuntimeDyld] Fix handling of i386 PC-rel external relocations. This fixes
several more i386 MCJIT regression test failures.

<rdar://problem/16889891>

llvm-svn: 208735
2014-05-13 22:09:07 +00:00
Louis Gerbarg 1b91aa2cf5 Add missing line breaks to debug output in CodeGenPrepare
llvm-svn: 208731
2014-05-13 21:54:22 +00:00
Benjamin Kramer 3f085ba6d6 GVN: Fix non-determinism in map iteration.
Iterating over a DenseMaop is non-deterministic and results to unpredictable IR
output.

Based on a patch by Daniel Reynaud!

llvm-svn: 208728
2014-05-13 21:06:40 +00:00
Benjamin Kramer d97f95e2f2 GVN: rangify a couple of loops.
No functionality change.

llvm-svn: 208727
2014-05-13 21:06:36 +00:00
Eric Christopher d1309ee27d Save the optimization level the subtarget was created with in a
member variable and sink the initialization of crbits into the
subtarget feature reset code.

No functional change, but this refactor will be used in a future
commit.

llvm-svn: 208726
2014-05-13 20:49:08 +00:00
Eric Christopher addf51ddde Make the split function use StringRef::split.
llvm-svn: 208723
2014-05-13 19:55:17 +00:00
Tom Stellard 9541307c27 autoconf: Fix soname for libLLVM-Major.Minor.so (2nd try)
We were using libLLVM-Major.Minor.Patch.so for the soname, but we
need the soname to stay consistent for all Major.Minor.* releases
otherwise operating system distributors  will need to rebuild all
packages that link with LLVM every time there is a new point release.

This patch also reverses the compatibility symlink, so
libLLVM-Major.Minor.Patch.so is now a symlink that points
to libLLVM-Major-Minor.so.

llvm-svn: 208721
2014-05-13 19:37:03 +00:00
Rafael Espindola 99e05cf163 Split GlobalValue into GlobalValue and GlobalObject.
This allows code to statically accept a Function or a GlobalVariable, but
not an alias. This is already a cleanup by itself IMHO, but the main
reason for it is that it gives a lot more confidence that the refactoring to fix
the design of GlobalAlias is correct. That will be a followup patch.

llvm-svn: 208716
2014-05-13 18:45:48 +00:00
Joerg Sonnenberger 94cbb666b2 Check explicitly for EHABI and just use the default settings.
Code depends on the assembler and linker to fix things up...

llvm-svn: 208715
2014-05-13 17:58:13 +00:00
Christian Pirker 5b0e7a2be2 ARM: Additional test files for thumb fixups (checked with llvm-mv -show-encoding)
llvm-svn: 208712
2014-05-13 17:06:51 +00:00
Christian Pirker 39db7ec81f ARMEB: Fix byte order of EH frame unwinding instructions, with modified test file
This commit was already commited as revision rL208689 and discussd in
phabricator revision D3704.
But the test file was crashing on OS X and windows.

I fixed the test file in the same way as in rL208340.

llvm-svn: 208711
2014-05-13 16:44:30 +00:00
Rafael Espindola 35ae374040 Style fix: The name of variables starts with an upper case letter.
llvm-svn: 208710
2014-05-13 16:41:02 +00:00
Tom Stellard daeafc5e7f Revert "autoconf: Fix soname for libLLVM-Major.Minor.so"
This reverts commit r208708.

I forgot to run make clean before testing this and it broke tools
linking.

llvm-svn: 208709
2014-05-13 16:35:56 +00:00
Tom Stellard e10c886248 autoconf: Fix soname for libLLVM-Major.Minor.so
We were using libLLVM-Major.Minor.Patch.so for the soname, but we
need the soname to stay consistent for all Major.Minor.* releases
otherwise operating system distributors  will need to rebuild all
packages that link with LLVM every time there is a new point release.

This patch also reverses the compatibility symlink, so
libLLVM-Major.Minor.Patch.so is now a symlink that points
to libLLVM-Major-Minor.so.

llvm-svn: 208708
2014-05-13 16:18:55 +00:00
Joey Gouly 12a8bf09d0 [CGP] r205941 changed the logic, so that a cast happens *before* 'Result' is
compared to 'AddrMode.BaseReg'. In the case that 'AddrMode.BaseReg' is
nullptr, 'Result' will also be nullptr, so the cast causes an assertion. We
should use dyn_cast_or_null here to check 'Result' is not null and it is an
instruction.

Bug found by Mats Petersson, and I reduced his IR to get a test case.

llvm-svn: 208705
2014-05-13 15:42:45 +00:00
Rafael Espindola 2e7eceb317 Revert "ARMEB: Fix byte order of EH frame unwinding instructions"
This reverts commit r208689.

The test was crashing on OS X and windows.

llvm-svn: 208704
2014-05-13 15:19:56 +00:00
Aaron Ballman e58a570989 Teach the table generator to not generate switch statements containing only a default label with no cases. This solves some warnings with MSVC.
No functional changes intended.

llvm-svn: 208694
2014-05-13 12:52:35 +00:00
Christian Pirker f2526a56fe ARM: Additional test files for thumb fixups
llvm-svn: 208691
2014-05-13 11:50:39 +00:00
Daniel Sanders 387fc15d2c [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them
Summary:
This required a new instruction group representing the 32-bit subset of
MIPS-3 that was available in MIPS32R2.

To limit the number of tests required, only one 32-bit and one 64-bit ISA
prior to MIPS32/MIPS64 are tested.

rdhwr has been deliberately left without an ISA annotation for now. This is
because the assembler and CodeGen disagree on when the instruction is
available. Strictly speaking, it is only available in MIPS32r2 and
MIPS64r2. However, it is emulated by a kernel trap on earlier ISA's and is
necessary for TLS so CodeGen should emit it on older ISA's too.

Depends on D3696

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3697

llvm-svn: 208690
2014-05-13 11:45:36 +00:00
Christian Pirker ea3514ecdb ARMEB: Fix byte order of EH frame unwinding instructions
llvm-svn: 208689
2014-05-13 11:41:49 +00:00
Daniel Sanders 579168629e [mips] Free up two values in SubtargetFeatureFlag by folding the redundant IsGP32/IsGP64 into IsGP32bit/IsGP64bit
Summary:
We are currently very close to the 32-bit limit of the current assembler
implementation. This is because there is no way to represent an instruction
that is available in, for example, Mips3 or Mips32. We have to define a
feature bit that represents this.

This patch cleans up a pair of redundant feature bits and slightly postpones the
point we will reach the limit.

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3703

llvm-svn: 208685
2014-05-13 11:17:46 +00:00
Artyom Skrobov 1219355d38 Fix build failure with MSVC, following r208680
llvm-svn: 208684
2014-05-13 11:16:22 +00:00
Artyom Skrobov 3f50b48875 include/llvm/Support/Unicode.h didn't have re-include guards
llvm-svn: 208681
2014-05-13 10:11:29 +00:00
Artyom Skrobov 6298b347b6 [un]wrap extracted from lib/Target/Target[MachineC].cpp, lib/ExecutionEngine/ExecutionEngineBindings.cpp into include/llvm/IR/DataLayout.h
llvm-svn: 208680
2014-05-13 09:45:26 +00:00
Tim Northover 0ee9e7ed7a TableGen: strengthen assert
llvm-svn: 208679
2014-05-13 09:37:41 +00:00
Jay Foad b359051d9e Fix gcc -Wparentheses warning.
llvm-svn: 208675
2014-05-13 08:26:53 +00:00
Kevin Qin 97e5d98779 [ARM64] Fix the misleading diagnostic on bad extend amount of reg+reg addressing mode.
A vague diagnostic replaced the misleading one.
This can fix bug 19502.

llvm-svn: 208669
2014-05-13 07:35:12 +00:00
Serge Pavlov b575ee8294 Fix type of shuffle resulted from shuffle merge.
This fix resolves PR19730.

llvm-svn: 208666
2014-05-13 06:07:21 +00:00
Rafael Espindola 7e2b7567a8 Assert that we don't RAUW a Constant with a ConstantExpr that contains it.
We already had an assert for foo->RAUW(foo), but not for something like
foo->RAUW(GEP(foo)) and would go in an infinite loop trying to apply
the replacement.

llvm-svn: 208663
2014-05-13 01:23:21 +00:00
Weiming Zhao dd83691cc3 Folding into CSEL when there is ZEXT between SETCC and ADD
Normally, patterns like (add x, (setcc cc ...)) will be folded into
(csel x, x+1, not cc). However, if there is a ZEXT after SETCC, they
won't be folded. This patch recognizes the ZEXT and allows the
generation of CSINC.

This patch fixes bug 19680.

llvm-svn: 208660
2014-05-13 00:40:58 +00:00
Rafael Espindola cae6590f30 Convert test to FileCheck.
llvm-svn: 208658
2014-05-13 00:31:31 +00:00
Rafael Espindola fbfcb533ba Convert test to FileCheck.
llvm-svn: 208644
2014-05-13 00:07:46 +00:00
David Blaikie 290e22872d Revert "DebugInfo: Include lexical scopes in inlined subroutines."
This reverts commit r208506.

Some inlined subroutine scopes appear to be missing with this change.
Reverting while I investigate.

llvm-svn: 208642
2014-05-12 23:53:03 +00:00
Pete Cooper 7fd1d725b9 Use a logical not when inverting SetCC. This unfortunately doesn't fire on any targets so I couldn't find a test case to trigger it.
The problem occurs when a non-i1 setcc is inverted.  For example 'i8 = setcc' will get 'xor 0xff' to invert this.   This is clearly wrong when the boolean contents are ZeroOrOne.

This patch introduces getLogicalNOT and updates SetCC legalisation to use it.

Reviewed by Hal Finkel.

llvm-svn: 208641
2014-05-12 23:26:58 +00:00
Adam Nemet 5d78558c2b [DAGCombiner] Split up an indexed load if only the base pointer value is live
Right now the load may not get DCE'd because of the side-effect of updating
the base pointer.

This can happen if we lower a read-modify-write of an illegal larger type
(e.g. i48) such that the modification only affects one of the subparts (the
lower i32 part but not the higher i16 part).  See the testcase.

In order to spot the dead load we need to revisit it when SimplifyDemandedBits
decided that the value of the load is masked off.  This is the
CommitTargetLoweringOpt piece.

I checked compile time with ARM64 by sending SPEC bitcode files through llc.
No measurable change.

Fixes <rdar://problem/16031651>

llvm-svn: 208640
2014-05-12 23:00:03 +00:00
Louis Gerbarg b4013235e3 Fix ARM bswap16.ll test on Windows
Windows on ARM only supports thumb mode execution, so we have to
explicitly pick some non-Windows OS to test ARM mode codegen.

llvm-svn: 208638
2014-05-12 22:13:07 +00:00
Reid Kleckner 7a59e0845f Try to fix an SDAG dependence issue with sret
r208453 added support for having sret on the second parameter.  In that
change, the code for copying sret into a virtual register was hoisted
into the loop that lowers formal parameters.  This caused a "Wrong
topological sorting" assertion failure during scheduling when a
parameter is passed in memory.  This change undoes that by creating a
second loop that deals with sret.

I'm worried that this fix is incomplete.  I don't fully understand the
dependence issues.  However, with this change we produce the same DAGs
we used to produce, so if they are broken, they are just as broken as
they have always been.

llvm-svn: 208637
2014-05-12 22:01:27 +00:00
David Blaikie 525358db2c DebugInfo: Attach DW_AT_inline to inlined subprograms at DIE-construction time rather than as a post-processing step.
llvm-svn: 208636
2014-05-12 21:50:44 +00:00
Lang Hames 36072da3d9 [RuntimeDyld] Add support for MachO __jump_table and __pointers sections, and
SECTDIFF relocations on 32-bit x86.

This fixes several of the MCJIT regression test failures that show up on 32-bit
builds.

<rdar://problem/16886294>

llvm-svn: 208635
2014-05-12 21:39:59 +00:00
David Blaikie e323670892 DebugInfo: Make gmlt debug info more gmlt-like by removing variables.
For some impending improvements to debug info, LLVM will start assuming
that when the CU specifies llvm::DIBuilder::LineTablesOnly, the IR for
functions described by that CU will not include variables, types, etc.

(might be worth having some test coverage for GMLT + non-GMLT CUs,
especially with non-GMLT functions inlined into GMLT CU functions)

llvm-svn: 208634
2014-05-12 21:33:03 +00:00
Kevin Enderby 15e247100a Suggested improvement by Rafael Espindola to use isa<> in a few places
instead of dyn_cast<>.

llvm-svn: 208628
2014-05-12 20:45:00 +00:00
Matt Arsenault 37c12d7343 Use cast<> for unchecked use
llvm-svn: 208627
2014-05-12 20:42:57 +00:00
Sebastian Pop 05719e486f use nullptr instead of NULL
llvm-svn: 208622
2014-05-12 20:11:01 +00:00
Adam Nemet 63e4b30f79 [Test] Trim unnecessary .c and .cpp from config.suffix in lit.local.cfg
Tested by comparing make check VERBOSE=1 before and after to make sure
no tests are missed.  (VERBOSE=1 prints the list of tests.)

Only one test :( remains where .cpp is required:

tools/llvm-cov/range_based_for.cpp:// RUN: llvm-cov range_based_for.cpp | FileCheck %s --check-prefix=STDOUT

The topic was discussed in this thread:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140428/214905.html

llvm-svn: 208621
2014-05-12 19:57:31 +00:00
Louis Gerbarg efdcf23736 Add support bswap16 to/from memory compiling to rev16 on ARM/Thumb
The current patterns for REV16 misses mostn __builtin_bswap16() due to
legalization promoting the operands to from load/stores toi32s and then
truncing/extending them. This patch adds new patterns that catch the resultant
DAGs and codegens them to rev16 instructions. Tests included.

rdar://15353652

llvm-svn: 208620
2014-05-12 19:53:52 +00:00