llvm-project

Commit Graph

Author	SHA1	Message	Date
Peter Collingbourne	628ec9f193	ELF: Place relro sections after non-relro sections in r/w segment. This is in preparation for my next change, which will introduce a relro nobits section. That requires that relro sections appear at the end of the progbits part of the r/w segment so that the relro nobits section can appear contiguously. Because of the amount of churn required in the test suite, I'm making this change separately. llvm-svn: 291523	2017-01-10 01:21:30 +00:00
Eugene Leviant	ee8dcfbdf7	[ELF] Set max page size to 64K for AArch64 Differential revision: https://reviews.llvm.org/D25079 llvm-svn: 283200	2016-10-04 08:58:55 +00:00
George Rimar	1395dbdbc6	[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334	2016-01-11 14:27:05 +00:00

Author

SHA1

Message

Date

Peter Collingbourne

628ec9f193

ELF: Place relro sections after non-relro sections in r/w segment.

This is in preparation for my next change, which will introduce a relro
nobits section. That requires that relro sections appear at the end of the
progbits part of the r/w segment so that the relro nobits section can appear
contiguously.

Because of the amount of churn required in the test suite, I'm making this
change separately.

llvm-svn: 291523

2017-01-10 01:21:30 +00:00

Eugene Leviant

ee8dcfbdf7

[ELF] Set max page size to 64K for AArch64

Differential revision: https://reviews.llvm.org/D25079

llvm-svn: 283200

2016-10-04 08:58:55 +00:00

George Rimar

1395dbdbc6

[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation.

R_AARCH64_TSTBR14 is calculated as S+A-P,
Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15

Differential revision: http://reviews.llvm.org/D15824

llvm-svn: 257334

2016-01-11 14:27:05 +00:00

3 Commits