Commit Graph

54 Commits

Author SHA1 Message Date
Daniel Sanders 52de11e475 [mips][mips64r6] Add sel.s and sel.d
Summary:
Also use named constants for common opcode fields.

Depends on D3669

Reviewers: jkolek, vmedic, zoran.jovanovic

Differential Revision: http://reviews.llvm.org/D3670

llvm-svn: 208582
2014-05-12 15:39:10 +00:00
Daniel Sanders 08e1e0a873 [mips][mips64r6] Add d?div, d?mod, d?divu, d?modu
Summary: Depends on D3668

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3669

llvm-svn: 208579
2014-05-12 15:24:16 +00:00
Daniel Sanders 0ac5ec58b8 [mips][mips64r6] Added mul/mulu/muh/muhu
Summary: The 'mul' line of the test is temporarily commented out because it currently matches the MIPS32 mul instead of the MIPS32r6 mul. This line will be uncommented when we disable the MIPS32 mul on MIPS32r6.

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3668

llvm-svn: 208576
2014-05-12 15:12:45 +00:00
Daniel Sanders b7f1c6ff3e [mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6
Summary:
Adds MIPS32r6/MIPS64r6 and checks the compatibility requirements for these
processors.

I've also included comments to describe removed and re-encoded instructions,
along with placeholder def's for the new instructions but there are no
functional changes to codegen at this point.

Reviewers: jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3622

llvm-svn: 208399
2014-05-09 09:46:21 +00:00