11d70b6b32
PTX: add PTX 2.3 language target
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Patch by Wei-Ren Chen
llvm-svn: 130980
2011-05-06 11:40:36 +00:00
a071c82900
Fix PR9820: a read-only call differs from a load in that a load doesn't
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return the pointer being dereferenced, it returns the pointee, but a call
might return the pointer itself.
llvm-svn: 130979
2011-05-06 10:30:37 +00:00
5401962643
Re-revert r130877; it's apparently causing a regression on 197.parser,
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possibly related to cbnz formation.
llvm-svn: 130977
2011-05-06 05:23:07 +00:00
a7028848a1
The computation of string length is not that complicated. Fix it, again. :)
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llvm-svn: 130967
2011-05-05 23:52:18 +00:00
bb237c72a6
Remove DwarfTableException.
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llvm-svn: 130964
2011-05-05 23:19:54 +00:00
ec0a3a0bbf
Remove the DwarfTable enum.
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llvm-svn: 130959
2011-05-05 22:14:31 +00:00
1ff74141bf
In debug output, clearly list new instructions without DebugLoc.
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llvm-svn: 130957
2011-05-05 22:05:57 +00:00
d6141e1db2
Remove little used statistical counter.
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llvm-svn: 130955
2011-05-05 22:00:08 +00:00
8a20e66926
PR9838: Fix transform introduced in r127064 to not trigger when only one side of the icmp is an exact shift.
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llvm-svn: 130954
2011-05-05 21:59:18 +00:00
bc8e3f8c45
Move PPC Linux to CFI.
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llvm-svn: 130951
2011-05-05 21:34:33 +00:00
d58fe3c55e
Fix typo. No functional change.
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llvm-svn: 130949
2011-05-05 21:27:14 +00:00
59b6bfdbc6
Implement a really simple DwarfSjLjException.
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llvm-svn: 130947
2011-05-05 20:48:31 +00:00
240c96e2ca
List all exception types in a switch.
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llvm-svn: 130944
2011-05-05 19:48:34 +00:00
3dc73aae5e
ARM post RA scheduler compile time fix.
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BuildSchedGraph was quadratic in the number of calls in the basic
block. After this fix, it keeps only a single call at the top of the
DefList so compile time doesn't blow up on large blocks. This reduces
postRA sched time on an external test case from 81s to 0.3s. Although
r130800 (reduced ARM register alias defs) also partially fixes the
issue by reducing the constant overhead of checking call interference
by an order of magnitude.
Fixes <rdar://problem/7662664> very poor compile time with post RA scheduling.
llvm-svn: 130943
2011-05-05 19:32:21 +00:00
24b1c48514
whitespace
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llvm-svn: 130942
2011-05-05 19:24:06 +00:00
a4982bddf3
Don't produce a __debug_frame.
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I tested both gdb on a bootstrapped clang and and the gdb testsuite on OS X (snow leopard)
and both are happy using __eh_frame.
llvm-svn: 130937
2011-05-05 18:43:39 +00:00
b93a130120
Many LLVM tests relies on standard output stream be in the binary mode. Which is not always the case (on Windows in particular). The patch adds a test to verify that the standard output stream is actually in the binary mode.
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llvm-svn: 130936
2011-05-05 18:40:27 +00:00
68b6b0efb0
Allow FastISel of three-register-operand instructions.
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llvm-svn: 130934
2011-05-05 17:59:04 +00:00
73bc172493
If debug info for inlined function is missing then handle it gracefully.
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llvm-svn: 130933
2011-05-05 17:54:26 +00:00
f1e2b50a30
PR9848: pandn is not commutative.
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No test because I can't think of any way to write one that won't break quickly.
llvm-svn: 130932
2011-05-05 17:45:31 +00:00
c5a8c08dba
Add some statistics to the splitting and spilling frameworks.
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llvm-svn: 130931
2011-05-05 17:22:53 +00:00
441a01a2b8
Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
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llvm-svn: 130928
2011-05-05 16:53:34 +00:00
f118fae233
Fix test to be less sensitive to coalescing.
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This should unbreak llvm-gcc-i386-linux-selfhost.
llvm-svn: 130927
2011-05-05 16:48:00 +00:00
fd8c6adffb
Small syntax cleanup; we don't need to #define constants in C++. No functionality change intended.
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llvm-svn: 130926
2011-05-05 16:25:23 +00:00
2311bdfa7b
Minor correction to r130877; fixes PR9846 and hopefully the buildbot failures.
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llvm-svn: 130925
2011-05-05 16:18:11 +00:00
cd5afc5feb
Minor change: Fix the typo in RegionPass.h and RegionPass.cpp.
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llvm-svn: 130920
2011-05-05 13:59:38 +00:00
a48b1375df
Remove a flag that would set the ".eh" symbol as .globl. MachO was the only one
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who used this flag, and it now emits CFI and doesn't emit this anymore. All
other targets left this flag "false".
<rdar://problem/8486371>
llvm-svn: 130918
2011-05-05 06:49:15 +00:00
fdc5d84ba3
llvmc: Make 'true' and 'false' instances of a 'Bool' class.
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llvm-svn: 130915
2011-05-05 04:25:03 +00:00
67ebd94a5d
llvmc: Make it possible to provide an argument to (join).
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llvm-svn: 130914
2011-05-05 04:24:58 +00:00
4f9c367f0b
Update the gcov version used slightly, to make it stop causing modern gcov's to
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crash.
llvm-svn: 130911
2011-05-05 02:46:38 +00:00
baa878ce4a
Remove dead function.
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llvm-svn: 130903
2011-05-05 00:17:34 +00:00
a3d5d167a8
When the path wasn't emitted by the frontend, discard any path on the source
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filename.
llvm-svn: 130897
2011-05-05 00:03:30 +00:00
1d3854d583
Disable physical register coalescing by default.
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Joining physregs is inherently dangerous because it uses a heuristic to avoid
creating invalid code. Linear scan had an emergency spilling mechanism to deal
with those rare cases. The new greedy allocator does not.
The greedy register allocator is much better at taking hints, so this has almost
no impact on code size and quality. The few cases where it matters show up as
unit tests that now have -join-physregs enabled explicitly.
llvm-svn: 130896
2011-05-04 23:59:00 +00:00
ffb798c1c6
Set debug loc for new instructions.
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llvm-svn: 130895
2011-05-04 23:58:50 +00:00
ac794d46bf
Set debug location for new PHI nodes created in exit block.
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llvm-svn: 130894
2011-05-04 23:58:22 +00:00
17d4f9bbcc
Prepare remaining tests for -join-physreg going away.
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llvm-svn: 130893
2011-05-04 23:54:59 +00:00
808dca12f8
Fix X86RegisterInfo::getMatchingSuperRegClass for sub_8bit_hi.
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It is OK for B to be any GR8_ABCD_H superclass, the returned register class
doesn't have to map surjectively onto B.
llvm-svn: 130892
2011-05-04 23:54:54 +00:00
369bddf5ad
Fix a batch of x86 tests to be coalescer independent.
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Most of these tests require a single mov instruction that can come either before
or after a 2-addr instruction. -join-physregs changes the behavior, but the
results are equivalent.
llvm-svn: 130891
2011-05-04 23:54:51 +00:00
260c4a9466
Document the automatic alias printing of InstAliases.
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llvm-svn: 130889
2011-05-04 23:40:14 +00:00
37d44bdd92
Add explicit 'unregister' method to CrashRecoveryConextCleanupRegistrar.
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llvm-svn: 130885
2011-05-04 23:26:59 +00:00
dd550305e6
Give this test an explicit register allocator, so that it can work even if
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the default register allocator is changed.
llvm-svn: 130883
2011-05-04 23:14:02 +00:00
2a40131f6b
SjLj EH could produce a machine basic block that legitimately has more than one
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landing pad as its successor.
SjLj exception handling jumps to the correct landing pad via a switch statement
that's generated right before code-gen. Loosen the constraint in the machine
instruction verifier to allow for this. Note, this isn't the most rigorous check
since we cannot determine where that switch statement came from. But it's
marginally better than turning this check off when SjLj exceptions are used.
<rdar://problem/9187612>
llvm-svn: 130881
2011-05-04 22:54:05 +00:00
306f8db721
Preserve line number information while threading jumps.
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llvm-svn: 130880
2011-05-04 22:48:19 +00:00
892e9934ba
Create the parent directories to place the .gcda files in if they don't exist.
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That's kinda weird because the .gcno files are supposed to already be there,
but libgcov does this and somehow Google has managed to depend on it.
llvm-svn: 130879
2011-05-04 22:34:29 +00:00
0fe4608af2
Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases.
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Original message:
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
llvm-svn: 130877
2011-05-04 22:10:36 +00:00
c7e4fa7c19
Preserve line number info.
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llvm-svn: 130876
2011-05-04 21:58:58 +00:00
e53ae508ec
This test fails on ARM. The test shouldn't explicitly specify alignment (and alignment 4 is wrong) and requires hard-float.
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llvm-svn: 130875
2011-05-04 21:57:44 +00:00
1fb95c996b
If builder is initialized using an instruction as insertion point, then use the instruction's debug location as current debug location.
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llvm-svn: 130874
2011-05-04 21:57:22 +00:00
0daa07eb90
preserve line number info.
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llvm-svn: 130869
2011-05-04 21:37:05 +00:00
3bd79ba856
Back out r130862; it appears to be breaking bootstrap.
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llvm-svn: 130867
2011-05-04 20:48:42 +00:00
Justin Holewinski