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3 Commits

Author SHA1 Message Date
Matt Arsenault 6f35f0c212 AMDGPU: Actually commit re-run of update_llc_test_checks 
llvm-svn: 341218
 2018-08-31 15:05:06 +00:00
Matt Arsenault 28c16bd534 AMDGPU: Fix broken generated check lines 
This was incorrectly using the same check prefix for multiple lines

llvm-svn: 341214
 2018-08-31 14:34:22 +00:00
Farhana Aleen 3528c80378 [AMDGPU] Support idot2 pattern. 
Summary: Transform add (mul ((i32)S0.x, (i32)S1.x),

         add( mul ((i32)S0.y, (i32)S1.y), (i32)S3) => i/udot2((v2i16)S0, (v2i16)S1, (i32)S3)

Author: FarhanaAleen

Reviewed By: arsenm

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D50024

llvm-svn: 340295
 2018-08-21 16:21:15 +00:00