Commit Graph

1955 Commits

Author SHA1 Message Date
Jim Ingham 85e8b81492 - Changed all the places where CommandObjectReturn was exporting a StreamString to just exporting
a Stream, and then added GetOutputData & GetErrorData to get the accumulated data.
- Added a StreamTee that will tee output to two provided lldb::StreamSP's.
- Made the CommandObjectReturn use this so you can Tee the results immediately to
the debuggers output file, as well as saving up the results to return when the command
is done executing.
- HandleCommands now uses this so that if you have a set of commands that continue the target
you will see the commands come out as they are processed.
- The Driver now uses this to output the command results as you go, which makes the interface
more reactive seeming.

llvm-svn: 126015
2011-02-19 02:53:09 +00:00
Johnny Chen ce0dec7597 Make the helper method ReadCoreReg(uint32_t reg, bool *success) more generic
which now handles R0-R12, SP, LR, as well as PC.  And refactored a lot of
calls to ReadRegisterUnsigned() to now funnel through ReadCoreReg(), instead.

llvm-svn: 126010
2011-02-19 01:36:13 +00:00
Caroline Tice 55532be31f Add code to emulate LDRB (register) Arm instruction.
llvm-svn: 125994
2011-02-18 23:52:21 +00:00
Johnny Chen ce4e629fdf Add emulation methods for "ORR (immediate)" and "ORR (register)".
Add Encoding T3 of "MOV (register)" to EmulateMOVRdRm() method and fixed
some bugs in EmulateMOVRdImm() and EmulateMOVRdRm() methods.

llvm-svn: 125992
2011-02-18 23:41:11 +00:00
Caroline Tice 27d1032b60 Add code to emulate LDRB (literal) Arm instruction.
llvm-svn: 125975
2011-02-18 22:24:22 +00:00
Johnny Chen d1fd6963f5 Add emulation methods for "ADC (immediate)" and "ADC (register)".
Plus add a helper method ReadCoreReg(uint32_t regnum, bool *success) to simplify
coding a bit.

llvm-svn: 125961
2011-02-18 21:13:05 +00:00
Caroline Tice 489517c4a4 Add code to emulate LDRB (immediate, Thumb) instruction.
llvm-svn: 125959
2011-02-18 21:06:04 +00:00
Johnny Chen faba5dd4ae Add emulation methods for "AND (immediate)" and "AND (register)".
Plus add macro definitions for APSR_C and APSR_V to simplify code.

llvm-svn: 125947
2011-02-18 19:32:20 +00:00
Caroline Tice a1bf8db478 Add code to emulate LDR (register) Arm instruction.
llvm-svn: 125945
2011-02-18 18:52:37 +00:00
Greg Clayton bfe5f3bf06 Added new target instance settings for execution settings:
Targets can now specify some additional parameters for when we debug 
executables that can help with plug-in selection:

target.execution-level = auto | user | kernel
target.execution-mode  = auto | dynamic | static
target.execution-os-type = auto | none | halted | live

On some systems, the binaries that are created are the same wether you use
them to debug a kernel, or a user space program. Many times inspecting an 
object file can reveal what an executable should be. For these cases we can
now be a little more complete by specifying wether to detect all of these
things automatically (inspect the main executable file and select a plug-in
accordingly), or manually to force the selection of certain plug-ins.

To do this we now allow the specficifation of wether one is debugging a user
space program (target.execution-level = user) or a kernel program 
(target.execution-level = kernel).

We can also specify if we want to debug a program where shared libraries
are dynamically loaded using a DynamicLoader plug-in 
(target.execution-mode = dynamic), or wether we will treat all symbol files
as already linked at the correct address (target.execution-mode = static).

We can also specify if the inferior we are debugging is being debugged on 
a bare board (target.execution-os-type = none), or debugging an OS where
we have a JTAG or other direct connection to the inferior stops the entire
OS (target.execution-os-type = halted), or if we are debugging a program on
something that has live debug services (target.execution-os-type = live).

For the "target.execution-os-type = halted" mode, we will need to create 
ProcessHelper plug-ins that allow us to extract the process/thread and other
OS information by reading/writing memory.

This should allow LLDB to be used for a wide variety of debugging tasks and
handle them all correctly.

llvm-svn: 125815
2011-02-18 01:44:25 +00:00
Johnny Chen f401d69c85 Fix typo.
llvm-svn: 125812
2011-02-18 01:26:39 +00:00
Johnny Chen fc9d00beb7 Add emulation of Encoding A1 "A8.6.6 ADD (register)" and "A8.6.5 ADD (immediate, ARM)".
llvm-svn: 125809
2011-02-18 01:22:22 +00:00
Caroline Tice 29c9b64096 Add code to emulate LDR (immediate,ARM) instruction.
llvm-svn: 125808
2011-02-18 00:55:53 +00:00
Jim Ingham e16c50a11a Factor all the code that does "Execute a list of lldb command interpreter commands" into a single function in the Interpreter, and then use that in all the places that used to do this by hand.
llvm-svn: 125807
2011-02-18 00:54:25 +00:00
Johnny Chen ae147cafa9 Finished renamings to make the emulation method names consistent case-wise.
llvm-svn: 125801
2011-02-18 00:07:39 +00:00
Johnny Chen a18ae1ffde Some renamings to make the emulation method names consistent case-wise.
llvm-svn: 125800
2011-02-18 00:02:28 +00:00
Johnny Chen d4926266f3 Removed redundant entry EmulateTBB() (there's an existing one EmulateTB()) and fixed some typos
in section headings.

llvm-svn: 125796
2011-02-17 23:44:53 +00:00
Johnny Chen 2a7e05a3d7 Fix a bug in EmulateTB() (TBB, TBH) where the branch length should be "twice"
the value of the byte/halfword returned from the table.

llvm-svn: 125793
2011-02-17 23:27:44 +00:00
Caroline Tice 16443905f3 Add header declarations for the remaining instructions we need to
emulate, to cover those that can change the PC.

llvm-svn: 125791
2011-02-17 23:09:13 +00:00
Johnny Chen 34dd9ba9c7 Refactoring. Abstracted the set flags operation into its own helper method
WriteFlags() and renamed WriteCoreRegisterWithFlags() to WriteCoreRegOptionalFlags().
Modified the call sites to use the helper methods.

llvm-svn: 125788
2011-02-17 22:37:12 +00:00
Johnny Chen fc5c19dec5 A8.6.6 ADD (register)
Renamed EmulateAddRdnRm() to EmulateAddReg(), and added Encoding T1 to it.
Where Encoding T2 can potentially modify the PC, causing a brnach.

llvm-svn: 125782
2011-02-17 22:03:29 +00:00
Johnny Chen 2789706059 Add EmulateTB() method to emulate "Table Branch Byte" and "Table Branch Halfword"
operations for Thumb2.

llvm-svn: 125767
2011-02-17 19:34:27 +00:00
Caroline Tice 032d2dd576 Add stubs for pseudocode functions "MemA[]" amd "MemU[]", corresponding to aligned
and unaligned memory accesses.  The new stub functions are MemARead, MemAWrite,
MemURead, and MemUWrite.  At the moment these stubs just call ReadMemoryUnsigned or
WriteMemoryUnsigned, but we can fill them out further later if we decide we need
more accurate emulation of the memory system.

Replaced all the direct calls to ReadMemoryUnsigned and WriteMemoryUnsigned in
EmulateInstructionARM.cpp with calls to the appropriate new stub function.

llvm-svn: 125766
2011-02-17 19:20:40 +00:00
Johnny Chen 0f60574fd7 Move Align(val, alignment) utility function to ARMUtils.h.
llvm-svn: 125753
2011-02-17 17:31:08 +00:00
Greg Clayton 4796c4feb1 Modified version of Marco Minutoli's host arch patch.
llvm-svn: 125706
2011-02-17 02:05:38 +00:00
Johnny Chen e19e4fc8dc Add comment for the helper method WriteCoreRegisterWithFlags().
llvm-svn: 125703
2011-02-17 01:49:00 +00:00
Johnny Chen 0c64b5bbb6 Refactoring. Wrap the following pseudocode from the ARM Architecture Reference Manul:
// if d == 15 then         // Can only occur for encoding A1
//     ALUWritePC(result); // setflags is always FALSE here
// else
//     R[d] = result;
//     if setflags then
//         APSR.N = result<31>;
//         APSR.Z = IsZeroBit(result);
//         APSR.C = carry;
//         // APSR.V unchanged

into a helper method WriteCoreRegisterWithFlags, and modified the existing methods
to take advantage of it.

Plus add two emulation methods (declaration only for now) for ORR (immediate) and ORR (register).

llvm-svn: 125701
2011-02-17 01:35:27 +00:00
Stephen Wilson bc15eb1736 Do not use constants from stdint.h that we cannot portably provide on all platforms.
llvm-svn: 125695
2011-02-17 00:01:47 +00:00
Greg Clayton f4ecaa576c Clean up a bit of the type getting code where lldb_private:Type now has
clang_type_t
    GetClangFullType(); // Get a completely defined clang type

    clang_type_t
    GetClangLayoutType(); // Get a clang type that can be used for type layout
    
    clang_type_t
    GetClangForwardType(); // A type that can be completed if needed, but is more efficient.
    

llvm-svn: 125691
2011-02-16 23:00:21 +00:00
Johnny Chen 4890c85e0a Add emulation methods for ROR (immediate), ROR (register), and RRX.
Turns out that they can be funneled through the helper methods
EmulateShiftImm()/ EmulateShiftReg() as well.

Modify EmulateShiftImm() to handle SRType_ROR and SRType_RRX.
And fix a typo in the impl of utility Shift_C() in ARMUtils.h.

llvm-svn: 125689
2011-02-16 22:14:44 +00:00
Caroline Tice eaf2e4fdf1 Add code to emulate STRB (Thumb) instruction.
llvm-svn: 125686
2011-02-16 20:22:22 +00:00
Johnny Chen 14571f4b67 Add encoding entries for LSL (immediate and register) and LSR (immediate and register) to
ARM and Thumb opcode tables.

llvm-svn: 125683
2011-02-16 19:27:43 +00:00
Johnny Chen f8cd4889ec Fix clang++ warning building the executable for testing.
llvm-svn: 125682
2011-02-16 19:22:52 +00:00
Johnny Chen 4b22e7e67a Add tagging for EmulateLDRRtRnImm().
llvm-svn: 125671
2011-02-16 18:35:47 +00:00
Jim Ingham d0a3e12b05 Destroy the dynamic loader plugin in Process::Finalize. If you wait till the auto_ptr gets deleted in the normal course of things the real process class will have been destroyed already, and it's hard to shut down the dynamic loader without accessing some process pure virtual method.
llvm-svn: 125668
2011-02-16 17:54:55 +00:00
Stephen Wilson 7a86fcdd8f Make declaration of DynamicLoaderLinuxDYLD::CreateInstance match its definition.
llvm-svn: 125656
2011-02-16 05:38:31 +00:00
Stephen Wilson dd9ec590c6 Expose includes for the socket layer on all platforms.
This patch reverts a portion of r125199 to allow the tree to build again on
linux.  The specific mingw issues that revision intended to address can be
sorted out at a later time.

llvm-svn: 125655
2011-02-16 05:36:26 +00:00
Stephen Wilson de049291fd linux: Set ArchSpec m_type correctly from object file.
An ArchSpec's type defaults to MachO.  Ensure the type is properly set
on ELF systems.

llvm-svn: 125654
2011-02-16 05:25:13 +00:00
Stephen Wilson d879a4d12a Use SIZE_MAX instead of SIZE_T_MAX for portability.
llvm-svn: 125653
2011-02-16 05:24:31 +00:00
Greg Clayton 93d3c8339c The DynamicLoader plug-in instance now lives up in lldb_private::Process where
it should live and the lldb_private::Process takes care of managing the 
auto pointer to the dynamic loader instance.

Also, now that the ArchSpec contains the target triple, we are able to 
correctly set the Target architecture in DidLaunch/DidAttach in the subclasses,
and then the lldb_private::Process will find the dynamic loader plug-in 
by letting the dynamic loader plug-ins inspect the arch/triple in the target.

So now the ProcessGDBRemote plug-in is another step closer to be purely 
process/platform agnostic.

I updated the ProcessMacOSX and the ProcessLinux plug-ins accordingly.

llvm-svn: 125650
2011-02-16 04:46:07 +00:00
Johnny Chen 0f03baa539 Minor comment change.
llvm-svn: 125634
2011-02-16 01:31:20 +00:00
Johnny Chen 22deaa5a1a Add emulation methods for LSL (immediate), LSL (register), LSR (immediate), and LSR (register).
Create two helper methods EmulateShiftImm() and EmulateShiftReg() and have ASR, LSL, and LSR
delegate to the helper methods which take an extra ARM_ShifterType parameter.

The opcodes tables have not been updated yet to reflect these new entries.

llvm-svn: 125633
2011-02-16 01:27:54 +00:00
Caroline Tice 5b5396ba77 Add documentation tags for LDM/STM instruction families.
Add code to emulate STR (register) Arm instruction.

llvm-svn: 125623
2011-02-16 00:33:43 +00:00
Johnny Chen a79703db79 Section heading for EmulateB().
llvm-svn: 125620
2011-02-16 00:17:18 +00:00
Johnny Chen 7484e4e337 Add section headings corresponding to some of the ARM/Thumb emulation methods for better documentation.
llvm-svn: 125618
2011-02-16 00:06:18 +00:00
Greg Clayton bdda58377f Fixed an issue where detection of vCont support wasn't being done correctly.
Fixed how the LLDBDisassembler computes and uses a target triple.

llvm-svn: 125617
2011-02-16 00:00:43 +00:00
Johnny Chen 531dbfa5d8 A8.6.14 ASR (register)
Add EmulateASRReg() Encodings T1, T2, and A1 to the opcodes tables.

llvm-svn: 125614
2011-02-15 23:22:46 +00:00
Caroline Tice f199eea579 Add eContextRegisterLoad instruction emulation context.
Add code to emulate STR (Immediate, Thumb) instruction.

llvm-svn: 125610
2011-02-15 22:53:54 +00:00
Johnny Chen f35024b087 Modify the various shift routines to handle cases where the shift amount comes
from the bottom byte of a register.

llvm-svn: 125606
2011-02-15 22:21:33 +00:00
Greg Clayton b841ff5da5 Removed my specific binaires from the xcscheme.
llvm-svn: 125603
2011-02-15 22:00:20 +00:00