Commit Graph

89311 Commits

Author SHA1 Message Date
Bill Wendling 7cde51d843 Support string attributes in the AttrBuilder.
llvm-svn: 174948
2013-02-12 07:56:49 +00:00
Cameron Zwarich 7c85c9433c Don't consider definitions by other PHIs live-in when trimming a PHI source's
live range after inserting a copy at the end of a block.

llvm-svn: 174945
2013-02-12 05:48:58 +00:00
Cameron Zwarich 4ee9aef208 Fix indentation.
llvm-svn: 174944
2013-02-12 05:48:56 +00:00
Cameron Zwarich 15eb925ed4 Add a hidden option to PHIElimination to split all critical edges. This is
particularly useful for catching issues with architectures that have exotic
terminators like MIPS.

llvm-svn: 174938
2013-02-12 03:49:25 +00:00
Cameron Zwarich 6d7a4e0c9c Renumber SlotIndexes locally when a new block is inserted.
llvm-svn: 174937
2013-02-12 03:49:22 +00:00
Cameron Zwarich cdcab38ff5 Add blocks to the LiveIntervalAnalysis RegMaskBlocks array when splitting
a critical edge.

llvm-svn: 174936
2013-02-12 03:49:20 +00:00
Cameron Zwarich af34931c63 Fix the updating of LiveIntervals after splitting a critical edge. PHI operand
live ranges should always be extended, and the only successor that should be
considered for extension of other ranges is the target of the split edge.

llvm-svn: 174935
2013-02-12 03:49:17 +00:00
Pete Cooper 10a3ae7039 Check type for legality before forming a select from loads.
Sorry for the lack of a test case.  I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later.

I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness.

llvm-svn: 174934
2013-02-12 03:14:50 +00:00
Arnold Schwaighofer 89aef93841 ARM cost model: Add vector reverse shuffle costs
A reverse shuffle is lowered to a vrev and possibly a vext instruction (quad
word).

radar://13171406

llvm-svn: 174933
2013-02-12 02:40:39 +00:00
Arnold Schwaighofer 7e2ca6e74e Cost model: Add check for reverse shuffles to CostModel analysis
Check for reverse shuffles in the CostModel analysis pass and query
TargetTransform info accordingly. This allows us we can write test cases for
reverse shuffles.

radar://13171406

llvm-svn: 174932
2013-02-12 02:40:37 +00:00
Arnold Schwaighofer 1f3d3ca769 ARM NEON: Handle v16i8 and v8i16 reverse shuffles
Lower reverse shuffles to a vrev64 and a vext instruction instead of the default
legalization of storing and loading to the stack. This is important because we
generate reverse shuffles in the loop vectorizer when we reverse store to an
array.

  uint8_t Arr[N];
  for (i = 0; i < N; ++i)
    Arr[N - i - 1] = ...

radar://13171760

llvm-svn: 174929
2013-02-12 01:58:32 +00:00
Chad Rosier 559cea4e10 Update error message due to previous commit, r174926.
llvm-svn: 174927
2013-02-12 01:12:24 +00:00
Chad Rosier 8bc655605b [ms-inline asm] Add support for lexing hexidecimal integers with a [hH] suffix.
Part of rdar://12470373

llvm-svn: 174926
2013-02-12 01:00:01 +00:00
David Blaikie 209d63af48 DIBuilder: make the return type of createBasicType more specific
llvm-svn: 174924
2013-02-12 00:40:41 +00:00
Kay Tiong Khoo ab588efe42 Added 0x0D to 2-byte opcode extension table for prefetch* variants
Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs

llvm-svn: 174920
2013-02-12 00:19:12 +00:00
Hal Finkel 6ae564b4a0 BBVectorize: Don't over-search when building the dependency map
When building the pairable-instruction dependency map, don't search
past the last pairable instruction. For large blocks that have been
divided into multiple instruction groups, searching past the last
instruction in each group is very wasteful. This gives a 32% speedup
on the csa.ll test case from PR15222 (when using 50 instructions
in each group).

No functionality change intended.

llvm-svn: 174915
2013-02-11 23:02:17 +00:00
Hal Finkel 39a95032d2 BBVectorize: Omit unnecessary entries in PairableInstUsers
This map is queried only for instructions in pairs of pairable
instructions; so make sure that only pairs of pairable
instructions are added to the map. This gives a 3.5% speedup
on the csa.ll test case from PR15222.

No functionality change intended.

llvm-svn: 174914
2013-02-11 23:02:09 +00:00
Michael J. Spencer 08834518ad [Support][Compiler] Add LLVM_HAS_VARIADIC_TEMPLATES.
llvm-svn: 174913
2013-02-11 22:51:07 +00:00
Akira Hatanaka bf1af1acc7 [mips] Expand pseudo instructions before they are emitted in
MipsCodeEmitter.cpp.

JALR and NOP are expanded by function emitPseudoExpansionLowering, which is not
called when the old JIT is used.

This fixes the following tests which have been failing on
llvm-mips-linux builder:

LLVM :: ExecutionEngine__2003-01-04-LoopTest.ll
LLVM :: ExecutionEngine__2003-05-06-LivenessClobber.ll
LLVM :: ExecutionEngine__2003-06-04-bzip2-bug.ll
LLVM :: ExecutionEngine__2005-12-02-TailCallBug.ll
LLVM :: ExecutionEngine__2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll
LLVM :: ExecutionEngine__hello2.ll
LLVM :: ExecutionEngine__stubs.ll
LLVM :: ExecutionEngine__test-branch.ll
LLVM :: ExecutionEngine__test-call.ll
LLVM :: ExecutionEngine__test-common-symbols.ll
LLVM :: ExecutionEngine__test-loadstore.ll
LLVM :: ExecutionEngine__test-loop.ll

llvm-svn: 174912
2013-02-11 22:35:40 +00:00
Bill Wendling 92ed7006fe Rename AttributeSets to AttributeGroups so that it's more meaningful.
llvm-svn: 174911
2013-02-11 22:33:26 +00:00
Bill Wendling e46707e4c7 Use a std::map so that we record the group ID.
llvm-svn: 174910
2013-02-11 22:32:29 +00:00
Bill Wendling 89ade92879 Rename to something more sensible. No functionality change.
llvm-svn: 174909
2013-02-11 22:31:34 +00:00
Akira Hatanaka 3d38609fdd [mips] Fix indentation.
llvm-svn: 174907
2013-02-11 22:03:52 +00:00
Michael Ilseman 74a6da963b Optimization: bitcast (<1 x ...> insertelement ..., X, ...) to ... ==> bitcast X to ...
llvm-svn: 174905
2013-02-11 21:41:44 +00:00
Krzysztof Parzyszek 9a278f108a Extend Hexagon hardware loop generation to handle various additional cases:
- variety of compare instructions,
- loops with no preheader,
- arbitrary lower and upper bounds.

llvm-svn: 174904
2013-02-11 21:37:55 +00:00
Michael Ilseman 35f82ff833 Remove trailing whitespace
llvm-svn: 174903
2013-02-11 21:36:49 +00:00
Krzysztof Parzyszek cfe285e604 Implement HexagonInstrInfo::analyzeCompare.
llvm-svn: 174901
2013-02-11 20:04:29 +00:00
Kay Tiong Khoo d30b1a2ac7 *fixed disassembly of some i386 system insts with intel syntax
*added file for test cases for i386 intel syntax

llvm-svn: 174900
2013-02-11 19:46:36 +00:00
Justin Holewinski 4f12f53353 [NVPTX] Remove NoCapture from address space conversion intrinsics. NoCapture is not valid in this case, and was causing incorrect optimizations.
llvm-svn: 174896
2013-02-11 18:56:35 +00:00
Hal Finkel 0b8ae895b4 BBVectorize: Eliminate one more restricted linear search
This eliminates one more linear search over a range of
std::multimap entries. This gives a 22% speedup on the
csa.ll test case from PR15222.

No functionality change intended.

llvm-svn: 174893
2013-02-11 17:19:34 +00:00
Tim Northover 09995ac069 AArch64: generate dwarfdump test rather than include .o in subversion
llvm-svn: 174891
2013-02-11 16:28:12 +00:00
Michel Danzer 10ed47f927 R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers.
The modifiers don't seem to have any effect with V_MOV_B32, supposedly it's
meant to just move bits untouched.

Fixes 46 piglit tests with radeonsi, though unfortunately 11 of those had
just regressed because they started using the clamp modifier.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174890
2013-02-11 15:58:21 +00:00
Kostya Serebryany c5f44bc62d [asan] added a flag -mllvm asan-short-64bit-mapping-offset=1 (0 by default)
This flag makes asan use a small (<2G) offset for 64-bit asan shadow mapping.
On x86_64 this saves us a register, thus achieving ~2/3 of the
zero-base-offset's benefits in both performance and code size.

Thanks Jakub Jelinek for the idea.

llvm-svn: 174886
2013-02-11 14:36:01 +00:00
Tim Northover be867971cb AArch64: fix build on some MSVC versions
This does two things:

It removes a call to abs() which may have "long long" parameter on Windows,
which is not necessarily available in C++03.

It also corrects the signedness of Amount, which was relying on
implementation-defined conversions previously.

Code was already tested (albeit in an implemnetation defined way) so no extra
tests.

llvm-svn: 174885
2013-02-11 14:25:52 +00:00
Bill Schmidt 8c0a8e5f6d Restore the resurrected doc link previously deleted
llvm-svn: 174884
2013-02-11 14:14:32 +00:00
Bill Schmidt 37fea43384 Remove a dead PowerPC doc link
llvm-svn: 174881
2013-02-11 13:16:30 +00:00
Tim Northover e206778833 AArch64: Simplify logic in deciding whether bfi is valid
Previous code had a confusing comment which was mostly an implementation
detail. This condition corresponds to "lsb up to register width" and "width not
ridiculous".

llvm-svn: 174877
2013-02-11 12:32:18 +00:00
Tim Northover acaa788be6 AArch64: Add basic relocation processing for llvm-dwarfdump.
This allows llvm-dwarfdump to handle the relocations needed, at least
for LLVM-produced code.

llvm-svn: 174874
2013-02-11 11:16:02 +00:00
Tim Northover 45a0d77c48 AArch64: Undo change to how test was run
This broke on Windows, presumably due to interleaving of output streams.

llvm-svn: 174873
2013-02-11 10:51:41 +00:00
Tim Northover 60baeb984f Make use of DiagnosticType to provide better AArch64 diagnostics.
This gives a DiagnosticType to all AsmOperands in sight. This replaces all
"invalid operand" diagnostics with something more specific. The messages given
should still be sufficiently vague that they're not usually actively misleading
when LLVM guesses your instruction incorrectly.

llvm-svn: 174871
2013-02-11 09:29:37 +00:00
Cameron Zwarich b47fb384fc Add support for updating LiveIntervals to MachineBasicBlock::SplitCriticalEdge().
This is currently a bit hairier than it needs to be, since depending on where the
split block resides the end ListEntry of the split block may be the end ListEntry
of the original block or a new entry. Some changes to the SlotIndexes updating
should make it possible to eliminate the two cases here.

This also isn't as optimized as it could be. In the future Liveinterval should
probably get a flag that indicates whether the LiveInterval is within a single
basic block. We could ignore all such intervals when splitting an edge.

llvm-svn: 174870
2013-02-11 09:24:47 +00:00
Cameron Zwarich ba378cea72 Update SlotIndexes after updateTerminator() possibly removes instructions. I am
really trying to avoid piping SlotIndexes through to RemoveBranch() and friends.

llvm-svn: 174869
2013-02-11 09:24:45 +00:00
Cameron Zwarich 02e742fbe6 Fix some problems with the updating of SlotIndexes after adding a new MBB. In
particular, holes were being left between two blocks after splitting an edge.

llvm-svn: 174868
2013-02-11 09:24:42 +00:00
Bill Wendling 829b478980 Add support for printing out the attribute groups.
This emits the attribute groups that are used by the functions. (It currently
doesn't print out return type or parameter attributes within attribute groups.)

Note: The functions still retrieve their attributes from the "old" bitcode
format (using the deprecated 'Raw()' method). This means that string attributes
within an attribute group will not show up during a disassembly. This will be
addressed in a future commit.

llvm-svn: 174867
2013-02-11 08:43:33 +00:00
Bill Wendling 84ba97698e FileCheck-ize the tests.
llvm-svn: 174865
2013-02-11 08:34:57 +00:00
Kostya Serebryany d688bab563 [tsan/msan] adding thread_safety and uninitialized_checks attributes
llvm-svn: 174864
2013-02-11 08:13:54 +00:00
Bob Wilson a594fab454 Revert "Rename LLVMContext diagnostic handler types and functions."
This reverts my commit 171047. Now that I've removed my misguided attempt to
support backend warnings, these diagnostics are only about inline assembly.
It would take quite a bit more work to generalize them properly, so I'm
just reverting this.

llvm-svn: 174860
2013-02-11 05:37:07 +00:00
Hal Finkel cb268f7995 BBVectorize: Remove the linear searches from pair connection searching
This removes the last of the linear searches over ranges of std::multimap
iterators, giving a 7% speedup on the doduc.bc input from PR15222.

No functionality change intended.

llvm-svn: 174859
2013-02-11 05:29:51 +00:00
Hal Finkel fee38f9754 BBVectorize: Avoid linear searches within the load-move set
This is another cleanup aimed at eliminating linear searches
in ranges of std::multimap.

No functionality change intended.

llvm-svn: 174858
2013-02-11 05:29:49 +00:00
Hal Finkel dd4bc66593 BBVectorize: isa/cast cleanup in getInstructionTypes
Profiling suggests that getInstructionTypes is performance-sensitive,
this cleans up some double-casting in that function in favor of
using dyn_cast.

No functionality change intended.

llvm-svn: 174857
2013-02-11 05:29:48 +00:00