maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
112,012 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

449 Commits

Author SHA1 Message Date
Evan Cheng 1622d7b429 Fix ldm / stm unified syntax; add t2LDM_RET. 
llvm-svn: 75188
 2009-07-09 22:58:39 +00:00
Evan Cheng 7591d02c84 Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit. 
Note, we are not yet generating these instructions.

llvm-svn: 75181
 2009-07-09 22:21:59 +00:00
Evan Cheng ad93707e16 Correct comment. 
llvm-svn: 75172
 2009-07-09 20:40:44 +00:00
David Goodwin 22c2fba978 Use common code for both ARM and Thumb-2 instruction and register info. 
llvm-svn: 75067
 2009-07-08 23:10:31 +00:00
Evan Cheng e3a53c448b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. 
llvm-svn: 75048
 2009-07-08 21:03:57 +00:00
David Goodwin 03ab0bbb24 Generalize opcode selection in ARMBaseRegisterInfo. 
llvm-svn: 75036
 2009-07-08 20:28:28 +00:00
David Goodwin af7451b674 Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. 
llvm-svn: 75010
 2009-07-08 16:09:28 +00:00
Evan Cheng d0611f9a37 Add Thumb2 movcc instructions. 
llvm-svn: 74946
 2009-07-07 20:39:03 +00:00
Evan Cheng d0f6324cdc Add Thumb2 pkhbt / pkhtb. 
llvm-svn: 74895
 2009-07-07 05:35:52 +00:00
Evan Cheng b24e51e2d9 Add some more Thumb2 multiplication instructions. 
llvm-svn: 74889
 2009-07-07 01:17:28 +00:00
Evan Cheng 40398233b7 Add bfc to armv6t2. 
llvm-svn: 74868
 2009-07-06 22:23:46 +00:00
Evan Cheng 0e8bde5910 Add thumb2 sign / zero extend with rotate instructions. 
llvm-svn: 74755
 2009-07-03 01:43:10 +00:00
Evan Cheng 6d9041100b Add Thumb2 load / store multiple instructions. Not used yet. 
llvm-svn: 74749
 2009-07-03 00:18:36 +00:00
Evan Cheng f30ee8820a t2LDR_PRE etc are loads. 
llvm-svn: 74741
 2009-07-03 00:08:19 +00:00
Evan Cheng 53cdf022b6 Added indexed stores. 
llvm-svn: 74740
 2009-07-03 00:06:39 +00:00
Evan Cheng 8ecd7eb3f7 Sign extending pre/post indexed loads. 
llvm-svn: 74736
 2009-07-02 23:16:11 +00:00
Evan Cheng 84c6cda2ef Thumb2 pre/post indexed loads. 
llvm-svn: 74696
 2009-07-02 07:28:31 +00:00
Evan Cheng 2c450d35ae Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate. 
llvm-svn: 74692
 2009-07-02 06:38:40 +00:00
David Goodwin 86c7e20ca6 Add PIC load and store patterns for Thumb-2. 
llvm-svn: 74577
 2009-07-01 00:01:13 +00:00
David Goodwin a83100f687 Thumb-2 load and store double description. But nothing yet creates them. 
llvm-svn: 74566
 2009-06-30 22:50:01 +00:00
David Goodwin d0890a2bad Add thumb-2 store word, halfword, and byte. 
llvm-svn: 74555
 2009-06-30 22:11:34 +00:00
David Goodwin 28d6d87244 Improve Thumb-2 jump table support. 
llvm-svn: 74549
 2009-06-30 19:50:22 +00:00
David Goodwin 27303cde82 Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table. 
llvm-svn: 74543
 2009-06-30 18:04:13 +00:00
Evan Cheng 57726817aa A few more load instructions. 
llvm-svn: 74500
 2009-06-30 02:15:48 +00:00
David Goodwin 76b37950ca Add Thumb-2 support for TEQ amd TST. 
llvm-svn: 74468
 2009-06-29 22:49:42 +00:00
David Goodwin dbf11ba800 Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative. 
llvm-svn: 74423
 2009-06-29 15:33:01 +00:00
Evan Cheng b23b50d54d Implement Thumb2 ldr. 
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.

llvm-svn: 74420
 2009-06-29 07:51:04 +00:00
Evan Cheng eab9ca7ea6 Renaming for consistency. 
llvm-svn: 74368
 2009-06-27 02:26:13 +00:00
David Goodwin 5d8b6eef5a Remove outdated comment. 
llvm-svn: 74357
 2009-06-26 23:39:02 +00:00
David Goodwin 5285817490 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not. 
llvm-svn: 74355
 2009-06-26 23:13:13 +00:00
David Goodwin 35ee722d42 Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc". 
llvm-svn: 74321
 2009-06-26 20:45:56 +00:00
David Goodwin 5960e6d974 ADC used to implement adde should use "adcs" opcode instead of "adc". 
llvm-svn: 74293
 2009-06-26 18:07:25 +00:00
David Goodwin 0377f737ff Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI. 
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.

llvm-svn: 74288
 2009-06-26 16:10:07 +00:00
Evan Cheng 5bf9011c2d Mark a bunch of instructions commutable. 
llvm-svn: 74237
 2009-06-26 00:19:44 +00:00
Evan Cheng 97727a61f9 Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used. 
llvm-svn: 74228
 2009-06-25 23:34:10 +00:00
David Goodwin 16f357cccf Use MVN for ~t2_so_imm immediates. 
llvm-svn: 74223
 2009-06-25 23:11:21 +00:00
Evan Cheng c7ea8df67e ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS. 
llvm-svn: 74200
 2009-06-25 20:59:23 +00:00
Evan Cheng d76f0be844 Change thumb2 instruction definitions so if-converter so add predicate operands and / or flip the 's' bit to set the condition flag. 
llvm-svn: 74158
 2009-06-25 02:08:06 +00:00
Evan Cheng 6ea7ad0351 Add thumb2 add sp. 
llvm-svn: 74156
 2009-06-25 01:21:30 +00:00
Evan Cheng 83f979a48b Add Thumb2 pc relative add. 
llvm-svn: 74141
 2009-06-24 23:47:58 +00:00
Evan Cheng 7d80d29187 Test instructions operands were printed in the wrong order. 
llvm-svn: 73990
 2009-06-23 19:56:37 +00:00
Evan Cheng 4983e4550e Proper patterns for thumb2 shift and rotate instructions. 
llvm-svn: 73987
 2009-06-23 19:39:13 +00:00
Evan Cheng e379107cdc Rename SelectShifterOperand to SelectThumb2ShifterOperandReg. 
llvm-svn: 73975
 2009-06-23 18:14:38 +00:00
Evan Cheng b45cebabc9 Obvious typo. 
llvm-svn: 73967
 2009-06-23 17:54:26 +00:00
Evan Cheng 431cf567de Initial Thumb2 support. Majority of the work is done by David Goodwin. There are 
also some contribution from Jim Grosbach, Bob Wilson, and Evan Cheng.

I've done my best to consolidate the patches with those that were done by
Viktor Kutuzov and Anton Korzh from Access Softek, Inc. Let me know if missed
anything. I've completely reorganized the thumb2 td file, made more extensive
uses of multiclass, etc.

Test cases will be contributed later after I re-organize what's in svn first.

llvm-svn: 73965
 2009-06-23 17:48:47 +00:00
Evan Cheng 022a726a25 Replace isTwoAddress with operand constraint. 
llvm-svn: 73947
 2009-06-23 05:23:49 +00:00
Anton Korobeynikov 5658086052 Fix asm string from MOVi16 
llvm-svn: 73661
 2009-06-17 23:43:36 +00:00
Anton Korobeynikov 02bb33c58d Initial support for some Thumb2 instructions. 
Patch by Viktor Kutuzov and Anton Korzh from Access Softek, Inc.

llvm-svn: 73622
 2009-06-17 18:13:58 +00:00
Anton Korobeynikov b6f4538683 Add placeholder for thumb2 stuff 
llvm-svn: 72593
 2009-05-29 23:41:08 +00:00