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49390 Commits

Author SHA1 Message Date
Chad Rosier 17847ae757 Fixup for functions that return a bool. 
llvm-svn: 138918
 2011-08-31 23:49:05 +00:00
Jim Grosbach e1995f2566 Static relocation model Thumb jump table interworking. 
Make sure the low bit of the PC is set when loading an address directly
for jump tables in static relocation model.

llvm-svn: 138912
 2011-08-31 22:23:09 +00:00
Owen Anderson 4af0aa98d5 The asm parser currently selects the wrong encoding for non-conditional Thumb2 branches. However, this exposed a number of situations where the decoder was too permissive in allowing invalid instructions to decode successful. Specify additional fixed bits to close those gaps. 
llvm-svn: 138910
 2011-08-31 22:00:41 +00:00
David Greene 7df940d660 Fix Size Typing 
Stores sizes as uint64_t to avoid possible truncation.

llvm-svn: 138901
 2011-08-31 21:34:20 +00:00
Jim Grosbach 99bc84662f Thumb2 t2Bcc should encode as t2B when condition is 'always'. 
llvm-svn: 138898
 2011-08-31 21:17:31 +00:00
Bruno Cardoso Lopes a0d85139e5 Move more code around and duplicate AVX patterns: MOVHPS and MOVLPS 
llvm-svn: 138897
 2011-08-31 21:15:32 +00:00
Bruno Cardoso Lopes 21a180367b Move MOVAPS,MOVUPS patterns close to the instructions definition 
llvm-svn: 138896
 2011-08-31 21:15:29 +00:00
Bruno Cardoso Lopes 941001312a Remove "_Int" forms of MOVUPSmr and MOVAPSmr 
llvm-svn: 138895
 2011-08-31 21:15:22 +00:00
Bill Wendling 770d0f0700 Make sure we aren't deleting the landingpad instruction. 
The landingpad instruction is required in the landing pad block. Because we're
not deleting terminating instructions, the invoke may still jump to here (see
Transforms/SCCP/2004-11-16-DeadInvoke.ll). Remove all uses of the landingpad
instruction, but keep it around until code-gen can remove the basic block.

llvm-svn: 138890
 2011-08-31 20:55:20 +00:00
Owen Anderson a455a0b1e7 Fix encoding for tBcc with immediate offset operand. 
llvm-svn: 138889
 2011-08-31 20:26:14 +00:00
Eli Friedman ae1acddb95 Misc cleanup; addresses Duncan's comments on r138877. 
llvm-svn: 138887
 2011-08-31 20:13:26 +00:00
Owen Anderson 939cd21248 When performing instruction selection for LDR_PRE_IMM/LDRB_PRE_IMM, we still need to preserve the sign of the index. This fixes miscompilations of Quicksort in the nightly testsuite, and hopefully others as well. 
<rdar://problem/10046188>

llvm-svn: 138885
 2011-08-31 20:00:11 +00:00
Jim Grosbach cfa9421e16 Remove FIXME. Thumb2 MOV instruction will use separate custom tricks. 
When we want encoding T3 (the wide encoding), we can explicitly check for
that and twiddle the CanAcceptCarrySet accordingly. For now, just correctly
handle encodings T1 and T2 when in Thumb2 mode.

llvm-svn: 138879
 2011-08-31 18:39:39 +00:00
Eli Friedman e839ecb70b Fill in type legalization for MERGE_VALUES in all the various cases. Patch by Micah Villmow. (No testcase because the issue only showed up in an out-of-tree backend.) 
llvm-svn: 138877
 2011-08-31 18:36:04 +00:00
Owen Anderson 5c160fd243 Fix roundtripping of Thumb BL/BLX instructions with immediate offsets instead of labels. 
llvm-svn: 138874
 2011-08-31 18:30:20 +00:00
Jim Grosbach c61fc8f301 tBcc is OK to be predicated in Thumb2 outside of IT blocks (obviously). 
llvm-svn: 138873
 2011-08-31 18:29:05 +00:00
Eli Friedman 7c3bdede25 Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM. 
llvm-svn: 138872
 2011-08-31 18:26:09 +00:00
Jim Grosbach af8c3cc710 Thumb2 parsing and encoding for ADC(register). 
Also add instruction aliases for non-.w versions of SBC since they're the
same.

llvm-svn: 138871
 2011-08-31 18:23:08 +00:00
Devang Patel df060bc3c2 After r138010, subroutine type does not have context info. Update type verifier accordingly. 
This fixes ptype.exp gdb testsuite regressions.

llvm-svn: 138869
 2011-08-31 18:04:31 +00:00
Eli Friedman 1ccecbb9d3 64-bit atomic cmpxchg for ARM. 
llvm-svn: 138868
 2011-08-31 17:52:22 +00:00
Akira Hatanaka 1fcf140ae3 Fix typo. Patch by Liu. 
llvm-svn: 138866
 2011-08-31 17:49:04 +00:00
David Greene cdef71f4f3 Compress Repeated Byte Output 
Emit a repeated sequence of bytes using .zero.  This saves an enormous
amount of asm file space for certain programs.

llvm-svn: 138864
 2011-08-31 17:30:56 +00:00
Jim Grosbach 6d606fbe14 Tweak Thumb1 ADD encoding selection a bit. 
When the destination register of an add immediate instruction is
explicitly specified, encoding T1 is preferred, else encoding T2 is
preferred.

llvm-svn: 138862
 2011-08-31 17:07:33 +00:00
Jakob Stoklund Olesen cd893390f5 Put VMOVS widening under a command line option, off by default. 
It appears that our use of the imp-use and imp-def flags with
sub-registers is not yet robust enough to support this.

The failing test case is complicated, I am working on a reduction.

<rdar://problem/10044201>

llvm-svn: 138861
 2011-08-31 17:00:02 +00:00
Rafael Espindola 6e31dfea35 Spelling and grammar fixes to problems found by Duncan. 
llvm-svn: 138858
 2011-08-31 16:43:33 +00:00
Eli Friedman 635d9692b6 Make sure we don't crash when -miphoneos-version-min is specified on x86. Hopefully this will fix gcc testsuite failures. 
llvm-svn: 138856
 2011-08-31 16:19:51 +00:00
Eric Christopher 72d1d5e193 Rework this conditional a bit. 
Patch by Sanjoy Das

llvm-svn: 138853
 2011-08-31 04:17:21 +00:00
Bruno Cardoso Lopes 9fc6b8be03 - Move all MOVSS and MOVSD patterns close to their definitions 
- Duplicate some store patterns to their AVX forms!
- Catched a bug while restricting the patterns subtarget, fix it
  and update a testcase to check it properly

llvm-svn: 138851
 2011-08-31 03:04:20 +00:00
Bruno Cardoso Lopes aa1daa63da Remove unnecessary AVX checks 
llvm-svn: 138850
 2011-08-31 03:04:14 +00:00
Bruno Cardoso Lopes db520db514 Teach more places to use VMOVAPS,VMOVUPS instead of MOVAPS,MOVUPS, 
whenever AVX is enabled.

llvm-svn: 138849
 2011-08-31 03:04:09 +00:00
Evan Cheng cb1e5bae4c Fix (movhps load) lowering / pattern to match more cases. rdar://10050549 
llvm-svn: 138848
 2011-08-31 02:05:24 +00:00
Eli Friedman 2c7bb52f56 Some minor cleanups for r138845. 
llvm-svn: 138846
 2011-08-31 00:41:05 +00:00
Eli Friedman c3f9c4a852 Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next. 
llvm-svn: 138845
 2011-08-31 00:31:29 +00:00
Rafael Espindola a45c20b049 Remove the old tail duplication pass. It is not used and is unable to update 
ssa, so it has to be run really early in the pipeline. Any replacement
should probably use the SSAUpdater.

llvm-svn: 138841
 2011-08-30 23:03:45 +00:00
Owen Anderson 2fa06a7226 Fix issues with disassembly of IT instructions involving condition codes other the EQ/NE. Discovered by roundtrip testing. 
llvm-svn: 138840
 2011-08-30 22:58:27 +00:00
Owen Anderson fdf3cd7f2b Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather than labels. 
llvm-svn: 138837
 2011-08-30 22:15:17 +00:00
Benjamin Kramer 58298f028c Teach macho-dump to dump the uleb128s referred to by linkedit_data segments. 
llvm-svn: 138836
 2011-08-30 22:10:58 +00:00
Owen Anderson d16fb43b1f Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets instead of labels. 
llvm-svn: 138835
 2011-08-30 22:10:03 +00:00
Owen Anderson 543c89fb15 Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping. 
llvm-svn: 138834
 2011-08-30 22:03:20 +00:00
Owen Anderson 1732c2ebf6 Clean up whitespace. 
llvm-svn: 138833
 2011-08-30 21:58:18 +00:00
Bill Wendling 6470e07e20 Fix off-by-one error Benjamin noticed. 
llvm-svn: 138832
 2011-08-30 21:23:24 +00:00
Owen Anderson e316e5b2ad Speculatively revert r138809 in an attempt to fix DragonEgg. 
llvm-svn: 138829
 2011-08-30 21:11:06 +00:00
Bill Wendling 7a9c3033a4 Enable compact unwind info by default. This only applies to Darwin when CFI is 
disabled.

llvm-svn: 138826
 2011-08-30 20:54:11 +00:00
Jeffrey Yasskin 065c35726f Fix C++0x narrowing errors when char is unsigned. 
In the case of EDInstInfo, this would actually cause a bug when -1 became 255
and was then compared >=0 in llvm-mc/Disassembler.cpp.

llvm-svn: 138825
 2011-08-30 20:53:29 +00:00
Rafael Espindola 94d3253626 Adds support for variable sized allocas. For a variable sized alloca, 
code is inserted to first check if the current stacklet has enough
space. If so, space is allocated by simply decrementing the stack
pointer. Otherwise a runtime routine (__morestack_allocate_stack_space
in libgcc) is called which allocates the required memory from the
heap.

Patch by Sanjoy Das.

llvm-svn: 138818
 2011-08-30 19:47:04 +00:00
Rafael Espindola 3353017668 Adds a SelectionDAG node X86SegAlloca which will be custom lowered 
from DYNAMIC_STACKALLOC.

Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which
will match X86SegAlloca (based on word size) are also added.  They
will be custom emitted to inject the actual stack handling code.

Patch by Sanjoy Das.

llvm-svn: 138814
 2011-08-30 19:43:21 +00:00
Rafael Espindola c21742112b Emit segmented-stack specific code into function prologues for 
X86. Modify the pass added in the previous patch to call this new
code.

This new prologues generated will call a libgcc routine (__morestack)
to allocate more stack space from the heap when required

Patch by Sanjoy Das.

llvm-svn: 138812
 2011-08-30 19:39:58 +00:00
Rafael Espindola ddc0f8779e Command line option to enable support for segmented stacks: 
-segmented-stacks.
Patch by Sanjoy Das!

llvm-svn: 138811
 2011-08-30 19:29:02 +00:00
Evan Cheng e6fba77971 Follow up to r138791. 
Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.

llvm-svn: 138810
 2011-08-30 19:09:48 +00:00
Owen Anderson d708ec4c6a When walking backwards to eliminate final stores to allocas at the end of a function, encountering an unrelated store should not cause us to give up like encountering a load does. 
llvm-svn: 138809
 2011-08-30 18:51:55 +00:00