Jim Grosbach
ce2bd8d05f
Add support for binary encoding of ARM 'adr' instructions referencing constant
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pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291.
llvm-svn: 120635
2010-12-02 00:28:45 +00:00
Jim Grosbach
dc35e067c1
Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADR
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instruction at MC lowering. Add binary encoding information for the ADR,
including fixup data for the label operand.
llvm-svn: 120594
2010-12-01 19:47:31 +00:00
Jim Grosbach
d0d1329fc8
Move the ARMAsmPrinter class defintiion into a header file.
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llvm-svn: 120551
2010-12-01 03:45:07 +00:00
Jim Grosbach
3b4e2ab5f3
Pseudo-ize ARM MOVPCRX
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llvm-svn: 120442
2010-11-30 18:56:36 +00:00
Jim Grosbach
cd5e30f6c6
Pseudo-ize BX_CALL and friends. Remove dead instruction format classes.
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rdar://8685712
llvm-svn: 120438
2010-11-30 18:30:19 +00:00
Bill Wendling
8294a30d54
s/ARM::BRIND/ARM::BX/g to coincide with r120366.
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llvm-svn: 120371
2010-11-30 00:48:15 +00:00
Jim Grosbach
7ec3d34553
Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw
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instructions. This simplifies instruction printing and disassembly.
llvm-svn: 120333
2010-11-29 22:37:40 +00:00
Jim Grosbach
81af4f9eb1
Rename t2 TBB and TBH instructions to reference that they encode the jump table
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data. Next up, pseudo-izing them.
llvm-svn: 120320
2010-11-29 21:28:32 +00:00
Jim Grosbach
58bc36a3a9
ARM Pseudo-ize tBR_JTr.
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llvm-svn: 120310
2010-11-29 19:32:47 +00:00
Jim Grosbach
150b1ad7f8
Switch ARM BR_JTm and BR_JTr instructions to be MC-expanded pseudos.
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llvm-svn: 120303
2010-11-29 18:37:44 +00:00
Jim Grosbach
08c562bba6
Make the ARM BR_JTadd instruction an explicit pseudo and lower it properly
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in the MC lowering process.
llvm-svn: 119559
2010-11-17 21:05:55 +00:00
Jim Grosbach
5cf10ea1d1
Add FIXMEs.
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llvm-svn: 119167
2010-11-15 18:36:48 +00:00
Chris Lattner
63274cbc5d
add fields to the .td files unconditionally, simplifying tblgen a bit.
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Switch the ARM backend to use 'let' instead of 'set' with this change.
llvm-svn: 119120
2010-11-15 05:19:05 +00:00
Chris Lattner
de16ca8ecc
rename LowerToMCInst -> LowerARMMachineInstrToMCInst.
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llvm-svn: 119071
2010-11-14 21:00:02 +00:00
Chris Lattner
c5afd12557
even more simplifications. ARM MCInstLowering is now just
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a single function instead of a class. It doesn't need the
complexity that X86 does.
llvm-svn: 119070
2010-11-14 20:58:38 +00:00
Chris Lattner
b28e691657
simplify and tidy up
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llvm-svn: 119066
2010-11-14 20:31:06 +00:00
Jim Grosbach
ca21cd749e
Simplify and clean up MC symbol lookup for ARM constant pool values. This fixes
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double quoting of ObjC symbol names in constant pool entries.
rdar://8652107
llvm-svn: 118688
2010-11-10 17:59:10 +00:00
Jim Grosbach
f23b2d9d8d
Update ARMConstantPoolValue to not use a modifier string. Use an explicit
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VariantKind marker to indicate the additional information necessary. Update
MC to handle the new Kinds. rdar://8647623
llvm-svn: 118671
2010-11-10 03:26:07 +00:00
Jim Grosbach
a942ad4222
Change the ARMConstantPoolValue modifier string to an enumeration. This will
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help in MC'izing the references that use them.
llvm-svn: 118633
2010-11-09 21:36:17 +00:00
Jim Grosbach
2fd4c37d8b
Handle ARM constant pool values that need an explicit reference to the '.'
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pseudo-label. (TLS stuff).
llvm-svn: 118609
2010-11-09 19:40:22 +00:00
Jim Grosbach
38f8e76e51
Further MCize ARM constant pool values. This allows basic PIC references for
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object file emission.
llvm-svn: 118601
2010-11-09 18:45:04 +00:00
Dale Johannesen
0ef474730f
Revert 118422 in search of bot verdancy.
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llvm-svn: 118429
2010-11-08 19:17:22 +00:00
Jason W Kim
f3e224f830
Support -mcpu=cortex-a8 in ARM attributes - Has Fixme. 1 Test modified.
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llvm-svn: 118422
2010-11-08 17:58:07 +00:00
Jim Grosbach
5a2c68d308
MC'ize the '.code 16' and '.thumb_func' ARM directives.
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llvm-svn: 118301
2010-11-05 22:08:08 +00:00
Jim Grosbach
ff9e507d8e
MC'ize simple ARMConstantValue entry emission (with a FIXME).
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llvm-svn: 118295
2010-11-05 20:34:24 +00:00
Jim Grosbach
1df82e67d1
Add FIXME.
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llvm-svn: 118280
2010-11-05 17:37:13 +00:00
Jim Grosbach
4a0c2d73c3
Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it in
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the ARMExpandPseudos pass rather than during the asm lowering.
llvm-svn: 117714
2010-10-29 21:35:25 +00:00
Jim Grosbach
e477b1ad30
ARM::MOVi32imm is expanded in ARMExpandPseudoInsts, so there's no need to
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handle it in the asm lowering.
llvm-svn: 117707
2010-10-29 20:37:06 +00:00
Jim Grosbach
338de3ee56
Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like
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the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752
llvm-svn: 117505
2010-10-27 23:12:14 +00:00
Jim Grosbach
5a7c715470
Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on
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rdar://8477752.
llvm-svn: 117419
2010-10-27 00:19:44 +00:00
Jim Grosbach
1e4d9a17c2
First part of refactoring ARM addrmode2 (load/store) instructions to be more
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explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.
llvm-svn: 117409
2010-10-26 22:37:02 +00:00
Rafael Espindola
d9d0c348df
Produce the headers directly in the Finish method. This allows us to use
...
the existing streamer methods that are endian safe.
llvm-svn: 117323
2010-10-25 22:26:55 +00:00
Rafael Espindola
752913d6ba
Add a virtual destructor.
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llvm-svn: 117280
2010-10-25 18:38:32 +00:00
Rafael Espindola
0ed1543d4e
Add support for emitting ARM file attributes.
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llvm-svn: 117275
2010-10-25 17:50:35 +00:00
Jason W Kim
109ff296c8
Second set of ARM/MC/ELF changes.
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Added ARM specific ELF section types.
Added AttributesSection to ARMElfTargetObject
First step in unifying .cpu assembly tag with ELF/.o
llc now asserts on actual ELF emission on -filetype=obj :-)
llvm-svn: 116257
2010-10-11 23:01:44 +00:00
Jim Grosbach
25cd3bfbd7
remove trailing whitespace
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llvm-svn: 115860
2010-10-06 22:46:47 +00:00
Jason W Kim
bff84d418f
First in a sequence of ARM/MC/*ELF* specific work.
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Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored
llvm-svn: 115859
2010-10-06 22:36:46 +00:00
Jim Grosbach
f49540cb4f
Kill of the vestiges of the 'call' Modifier (no longer needed for PLT).
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llvm-svn: 115845
2010-10-06 21:36:43 +00:00
Jim Grosbach
2c95027258
Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-needed
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"lane" operand modifier.
llvm-svn: 115843
2010-10-06 21:22:32 +00:00
Jim Grosbach
8025f89860
target operand flag values aren't a bitmask
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llvm-svn: 115798
2010-10-06 16:51:55 +00:00
Jim Grosbach
fae8305e2b
Nuke the rest of the :comment references
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llvm-svn: 115373
2010-10-01 23:21:38 +00:00
Jim Grosbach
0e854f3d43
Rename the AsmPrinter directory to InstPrinter for those targets that have
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been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.
llvm-svn: 115360
2010-10-01 22:39:28 +00:00
Jim Grosbach
c8e2e9d830
Nuke a few more unused asm strings
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llvm-svn: 115193
2010-09-30 19:53:58 +00:00
Jim Grosbach
136ed51b08
80 column fix
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llvm-svn: 115149
2010-09-30 15:25:22 +00:00
Jason W Kim
645f6c2bef
Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile()
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Small test for sanity check of resulting ARM .s file.
Tested against -r115129.
llvm-svn: 115133
2010-09-30 02:45:56 +00:00
Jim Grosbach
080fdf4609
Nuke it from orbit. It's the only way to be sure.
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(Kill the dead non-MC asm printer for the ARM target.)
llvm-svn: 115127
2010-09-30 01:57:53 +00:00
Jim Grosbach
05eccf0e44
One Printer to rule them all, One Printer to find them,
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One Printer to lower them all and in the back end bind them.
(Remove option to use the old non-MC asm printer.)
llvm-svn: 115038
2010-09-29 15:23:40 +00:00
Jim Grosbach
45c83d496f
Factor out dbg_value comment printing and teach MC asm printing to use it.
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This should make the arm-linux self-host buildbot happy again.
llvm-svn: 114964
2010-09-28 17:05:56 +00:00
Jim Grosbach
175d6411c8
Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to
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enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.
llvm-svn: 114915
2010-09-27 22:28:11 +00:00
Jim Grosbach
9e9ed98305
ARM-mode eh.sjlj.longjmp MC lowering
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llvm-svn: 114896
2010-09-27 21:47:04 +00:00