Commit Graph

275553 Commits

Author SHA1 Message Date
Martin Storsjo ee8c973884 [COFF] Handle ARM64 in getDefaultType
Differential Revision: https://reviews.llvm.org/D39634

llvm-svn: 317455
2017-11-06 07:02:33 +00:00
Craig Topper 70eaeae7f0 [X86] Use EVEX encoded intrinsics for legacy FMA intrinsics when possible.
llvm-svn: 317454
2017-11-06 05:48:26 +00:00
Craig Topper 07dac55d95 [X86] Add scalar FMA ISD nodes without rounding mode. NFC
Next step is to use them for the legacy FMA scalar intrinsics as well. This will enable the legacy intrinsics to use EVEX encoded opcodes and the extended registers.

llvm-svn: 317453
2017-11-06 05:48:25 +00:00
Craig Topper 25cfa4cb55 [X86] Add avx512vl command line to fma-instrinsics-x86.ll
Some of these demonstrate a missed EVEX to VEX compression because we aren't prefering EVEX instructions during isel.

llvm-svn: 317452
2017-11-06 05:48:24 +00:00
Craig Topper 7e48aa89c7 [X86] Simplify command lines on the fma-instrinsics-x86.ll test and add -show-mc-encoding.
Use feature names instead of CPU names.

A future commit will add avx512vl command lines to demonstrate missed use of EVEX instructions.

llvm-svn: 317451
2017-11-06 05:48:23 +00:00
Peter Collingbourne 38082ac62d ELF: Remove SymbolTable::SymIndex class.
The Traced flag is unnecessary because we only need to set the index
to -1 to mark a symbol for tracing.

Differential Revision: https://reviews.llvm.org/D39672

llvm-svn: 317450
2017-11-06 04:58:04 +00:00
Peter Collingbourne b472aa0268 ELF: Remove function Symbol::isInCurrentOutput().
This function is now equivalent to isDefined().

llvm-svn: 317449
2017-11-06 04:39:07 +00:00
Peter Collingbourne e9a9e0a1e7 ELF: Merge DefinedRegular and Defined.
Now that DefinedRegular is the only remaining derived class of
Defined, we can merge the two classes.

Differential Revision: https://reviews.llvm.org/D39667

llvm-svn: 317448
2017-11-06 04:35:31 +00:00
Peter Collingbourne 6c55a70838 ELF: Remove DefinedCommon.
Common symbols are now represented with a DefinedRegular that points
to a BssSection, even during symbol resolution.

Differential Revision: https://reviews.llvm.org/D39666

llvm-svn: 317447
2017-11-06 04:33:58 +00:00
Rui Ueyama 32665f702e Do not consider Shared symbols as defined symbols.
I don't remember why I made shared symbols one type of defined symbols.
Shared symbols aren't undefined, so it could be considered defined, but
categorizing three symbols as:

 - defined
   - really defined
   - shared
 - undefined

is not as intuitive as

 - defined
 - shared
 - undefined

to me. So, in this patch, I made a change to stop handling shared
symbols as defined symbols.

Surprisingly, I didn't have to update any tests for this change.

Differential Revision: https://reviews.llvm.org/D39394

llvm-svn: 317446
2017-11-06 04:13:24 +00:00
Craig Topper eff606cc0e [X86] Use EVEX encoded instructions for legacy scalar sqrt intrinsics.
Fixes PR35161.

llvm-svn: 317445
2017-11-06 04:04:01 +00:00
David L. Jones 82b22e0327 [PassManager, SimplifyCFG] Revert r316908 and r316869.
These cause Clang to crash with a segfault. See PR35210 for details.

llvm-svn: 317444
2017-11-06 00:32:01 +00:00
Adrian Prantl 131ab94008 Remove \brief from doxygen comments in PrettyPrinter.h
Patch by @xsga!

Differential Revision: https://reviews.llvm.org/D39633

llvm-svn: 317443
2017-11-05 21:52:36 +00:00
Craig Topper d6471cb934 [X86] Add missing predicate to a pattern. NFC
Other patterns had higher priority so this wasn't noticed. But we shouldn't be dependent on pattern order.

llvm-svn: 317442
2017-11-05 21:14:06 +00:00
Craig Topper 4e2f53511a [X86] Remove some more RCP and RSQRT patterns from InstrAVX512.td that I missed in r317413.
llvm-svn: 317441
2017-11-05 21:14:05 +00:00
Craig Topper 948c39c480 [X86] Fix outdated comment. NFC
llvm-svn: 317440
2017-11-05 21:14:04 +00:00
Simon Pilgrim 879c5b15c4 [X86][SSE] Tests for integer min/max horizontal reductions
Matching patterns that vectorizers should have created for us. 

The experimental intrinsics should probably be added as well.

llvm-svn: 317439
2017-11-05 19:48:24 +00:00
Dorit Nuzman eb13dd3eac [LV/LAA] Avoid specializing a loop for stride=1 when this predicate implies a
single-iteration loop

This fixes PR34681. Avoid adding the "Stride == 1" predicate when we know that
Stride >= Trip-Count. Such a predicate will effectively optimize a single
or zero iteration loop, as Trip-Count <= Stride == 1.

Differential Revision: https://reviews.llvm.org/D38785

llvm-svn: 317438
2017-11-05 16:53:15 +00:00
Sanjay Patel 92403c12b5 [SLPVectorizer] minimize tests and auto-generate full checks; NFC
llvm-svn: 317437
2017-11-05 16:11:01 +00:00
Joachim Protze cab9cdc2ad Updating implementation of OMPT as specified in OpenMP 5.0 Preview 2 (TR6)
The TR6 document is expected to be publically released around November 15.
This patch does not implement OMPT for libomptarget.

Patch by Simon Convent and Joachim Protze

Differential Revision: https://reviews.llvm.org/D39182

llvm-svn: 317436
2017-11-05 14:11:19 +00:00
Joachim Protze c255ca70ce Rename fields of ompt_frame_t
This is part of the renaming of data types from OpenMP TR4 to TR6

Patch by Simon Convent

Differential Revision: https://reviews.llvm.org/D39326

llvm-svn: 317435
2017-11-05 14:11:10 +00:00
Johannes Altmanninger a584beb9d7 [clang-diff] NFC: format
llvm-svn: 317434
2017-11-05 11:53:18 +00:00
Mohammed Agabaria acd69dbc7c [REVERT][LV][X86] update the cost of interleaving mem. access of floats
reverted my changes will be committed later after fixing the failure
This patch contains update of the costs of interleaved loads of v8f32 of stride 3 and 8.

Differential Revision: https://reviews.llvm.org/D39403

llvm-svn: 317433
2017-11-05 09:36:54 +00:00
Mohammed Agabaria f74c767de6 [LV][X86] update the cost of interleaving mem. access of floats
This patch contains update of the costs of interleaved loads of v8f32 of stride 3 and 8.

Differential Revision: https://reviews.llvm.org/D39403

llvm-svn: 317432
2017-11-05 09:06:23 +00:00
Serguei Katkov aee6375b02 [CGP] Fix the bug found by asan.
Try to fix the asan failure introduced by r317429.

llvm-svn: 317431
2017-11-05 07:59:02 +00:00
Serguei Katkov cde03f3d27 [CGP] Extends the scope of optimizeMemoryInst optimization. NFC
Commit tests for previous commit.

Reviewers: efriedma, dberlin, mkazantsev, reames, john.brawn
Reviewed By: john.brawn
Subscribers: javed.absar, john.brawn, dneilson, llvm-commits
Differential Revision: https://reviews.llvm.org/D36073

llvm-svn: 317430
2017-11-05 05:51:44 +00:00
Serguei Katkov d5d8d54b08 [CGP] Extends the scope of optimizeMemoryInst optimization
This is an implementation of PR26223.

Currently optimizeMemoryInst optimization tries to fold address computation
if all possible way to get compute the address are of the form

baseGV + base + scale * Index + offset
where scale and offset are constants and baseGV, base and Index are exactly
the same instructions if defined.

The patch extends this optimization to allow different bases. In this case
it tries to find/build a Phi node merging all possible bases and use this Phi node
as a base for sunk address computation. Also it supports Select instruction on
the way.

The main motivation for this scope extension is GCRelocateInst.
If there is a relocation of derived pointer it will be represented as relocation of base + offset.
Also there will be a Phi node merging address computation for relocated derived pointer
and derived pointer itself. If we have a Phi node merging original base and relocated base
and can fold the address computation of derived pointer then we can potentially reduce
the code size and Phi node for derived pointer. The later can have a positive impact to
register allocator.

Reviewers: efriedma, dberlin, mkazantsev, reames, john.brawn
Reviewed By: john.brawn
Subscribers: javed.absar, john.brawn, dneilson, llvm-commits
Differential Revision: https://reviews.llvm.org/D36073

llvm-svn: 317429
2017-11-05 05:50:33 +00:00
Rui Ueyama 5c4cb8a9e3 Inline a small function.
llvm-svn: 317428
2017-11-04 23:57:51 +00:00
Rui Ueyama aa8523e4b6 Move OutputSectionFactory to LinkerScript.cpp. NFC.
That class is used only by LinkerScript.cpp, so we should move it to
that file. Also, it no longer has to be a "factory" class. It can just
be a non-member function.

llvm-svn: 317427
2017-11-04 23:54:25 +00:00
Rui Ueyama dc0b0b0df3 Rewrite addSymbolWrap and applySymbolWrap. NFCI.
r317396 changed the way how we handle the -defsym option. The option is
now handled using the infrastructure for the linker script.

We used to handle both -defsym and -wrap using the same set of functions
in the symbol table. Now, we don't need to do that.

This patch rewrites the functions so that they become more straightforward.
The new functions directly handle -wrap rather than abstract it.

llvm-svn: 317426
2017-11-04 23:09:43 +00:00
Rui Ueyama 45b81402e3 Remove dead code and update comment.
llvm-svn: 317425
2017-11-04 22:32:56 +00:00
Simon Pilgrim f8105cf357 [X86][AVX] Regenerate test. NFCI.
llvm-svn: 317424
2017-11-04 21:18:06 +00:00
Martin Storsjo 7ed1188c27 Add ifdefs around ELF specific parts of UnwindRegisters*.S for arm
This allows using dwarf exceptions on MinGW/ARM.

Differential Revision: https://reviews.llvm.org/D39534

llvm-svn: 317423
2017-11-04 21:01:31 +00:00
Harlan Haskins 2ad533c0f9 Use code voice for DIBuilder in LLVM C API
(This is a test commit)

llvm-svn: 317422
2017-11-04 20:31:20 +00:00
Roman Lebedev d9af8e1f98 [Sema] Document+test the -Wsign-conversion change for enums in C code [NFC]
Basically a regression after r316268.
However the diagnostic is correct, but the test coverage is bad.

So just like rL316500, introduce yet more tests,
and adjust the release notes.

See https://bugs.llvm.org/show_bug.cgi?id=35200

llvm-svn: 317421
2017-11-04 20:27:47 +00:00
Aaron Ballman cbaf5a4f50 Move the llvm-tblgen project into the Tablegenning folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
llvm-svn: 317420
2017-11-04 20:07:16 +00:00
Aaron Ballman 3f8bad8626 Move the clang-tblgen-targets project into the Misc folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
llvm-svn: 317419
2017-11-04 20:06:49 +00:00
Aaron Ballman e89760cb29 Move the clang-tblgen project into the Clang tablegenning folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
llvm-svn: 317418
2017-11-04 20:06:22 +00:00
Aaron Ballman e7db01f0e0 Move the libclang-headers project into the Misc folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
llvm-svn: 317417
2017-11-04 20:00:21 +00:00
Aaron Ballman a5ee69a010 Move the srpm, ocaml_make_directory, llvm_vcsrevision_h, and llvm-headers projects into the Misc folder on IDEs like Visual Studio rather than leave them in the root directory. NFC.
llvm-svn: 317416
2017-11-04 19:59:14 +00:00
Aaron Ballman 207751ade7 Move the LLVMCFIVerify project into the Libraries folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
llvm-svn: 317415
2017-11-04 19:48:17 +00:00
Aaron Ballman cecf7145e9 Move these CMake projects into the Tests folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
llvm-svn: 317414
2017-11-04 19:39:14 +00:00
Craig Topper 692c8efe30 [X86] Don't use RCP14 and RSQRT14 for reciprocal estimations or for legacy SSE rcp/rsqrt intrinsics when AVX512 features are enabled.
Summary:
AVX512 added RCP14 and RSQRT instructions which improve accuracy over the legacy RCP and RSQRT instruction, but not enough accuracy to remove the need for a Newton Raphson refinement.

Currently we use these new instructions for the legacy packed SSE instrinics, but not the scalar instrinsics. And we use it for fast math optimization of division and reciprocal sqrt.

I think switching the legacy instrinsics maybe surprising to the user since it changes the answer based on which processor you're using regardless of any fastmath settings. It's also weird that we did something different between scalar and packed.

As far at the reciprocal estimation, I think it creates unnecessary deltas in our output behavior (and prevents EVEX->VEX). A little playing around with gcc and icc and godbolt suggest they don't change which instructions they use here.

This patch adds new X86ISD nodes for the RCP14/RSQRT14 and uses those for the new intrinsics. Leaving the old intrinsics to use the old instructions.

Going forward I think our focus should be on
-Supporting 512-bit vectors, which will have to use the RCP14/RSQRT14.
-Using RSQRT28/RCP28 to remove the Newton Raphson step on processors with AVX512ER
-Supporting double precision.

Reviewers: zvi, DavidKreitzer, RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39583

llvm-svn: 317413
2017-11-04 18:26:41 +00:00
Craig Topper be1f219050 [X86] Regenerate a couple more tests that I missed in r317410.
llvm-svn: 317412
2017-11-04 18:26:39 +00:00
Tamas Berghammer 7cb7df2bbf Improve the posix core file triple detection
Summary:
Posix core files sometime don't contain enough information to correctly
detect the OS. If that is the case we should use the OS from the target
instead as it will contain usable information in more cases and if the
target and the core contain different OS-es then we are already in a
pretty bad state so moving from an unknown OS to a known (but possibly
incorrect) OS will do no harm.

We already had similar code in place for MIPS. This change tries to make
it more generic by using ArchSpec::MergeFrom and extends it to all
architectures but some MIPS specific issue prevent us from getting rid
of special casing MIPS.

Reviewers: clayborg, nitesh.jain

Subscribers: aemerson, sdardis, arichardson, kristof.beyls, lldb-commits

Differential Revision: https://reviews.llvm.org/D36046

llvm-svn: 317411
2017-11-04 18:25:51 +00:00
Craig Topper e5d44cefea [X86] Teach EVEX->VEX pass to turn SHUFI32X4/SHUFF32X4/SHUFI64X/SHUFF64X2 into VPERM2F128/VPERM2I128.
This recovers some of the tests that were changed by r317403.

llvm-svn: 317410
2017-11-04 18:10:03 +00:00
Yaxun Liu 0d9673cff2 [AMDGPU] Remove hardcoded address space value from AMDGPULibFunc
AMDGPULibFunc hardcodes address space values of the old address space mapping,
which causes invalid addrspacecast instructions and undefined functions in
APPSDK sample MonteCarloAsianDP.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D39616

llvm-svn: 317409
2017-11-04 17:37:43 +00:00
Sean Fertile 4595a915f6 [LTO][ThinLTO] Use the linker resolutions to mark global values as dso_local.
Now that we have a way to mark GlobalValues as local we can use the symbol
resolutions that the linker plugin provides as part of lto/thinlto link
step to refine the compilers view on what symbols will end up being local.

Originally commited as r317374, but reverted in r317395 to update some missed
tests.

Differential Revision: https://reviews.llvm.org/D35702

llvm-svn: 317408
2017-11-04 17:04:39 +00:00
Sanjay Patel c919758075 [CodeGen] add remquo to list of recognized library calls
This is just an oversight because we already do recognize __builtin_remquo()
with the same signature.

http://en.cppreference.com/w/c/numeric/math/remquo
http://pubs.opengroup.org/onlinepubs/9699919799/functions/remquo.html

Differential Revision: https://reviews.llvm.org/D39615

llvm-svn: 317407
2017-11-04 15:03:11 +00:00
George Rimar 343e8227b7 [ELF] - Stop using SectionKey for creating output sections.
Stop using SectionKey for creating output sections.

Initially SectionKey was designed because we merged section with
use of Flags and Alignment fields. Currently LLD merges them by name only,
except the case when -relocatable output is produced. In that case
we still merge sections only with the same flags and alignment.
There is probably no issue at all to stop using Flags and Alignment for -r and
just disable the merging in that case.

After doing that change we can get rid of using SectionKey. That is not only
simplifies the code, but also gives some perfomance boost.

I tried to link chrome and mozilla, results are next:
* chrome link time goes from 1,666750355s to 1,551585364s, that is about 7%.
* mozilla time changes from 3,210261947 to 3,153782940, or about 2%.

Differential revision: https://reviews.llvm.org/D39594

llvm-svn: 317406
2017-11-04 09:11:27 +00:00