Commit Graph

2707 Commits

Author SHA1 Message Date
Christian Sigg 0d4b7adb82 [MLIR] Make gpu.launch_func rewrite pattern part of the LLVM lowering pass.
Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D85073
2020-08-10 19:28:30 +02:00
Rahul Joshi 13d05787d0 [MLIR][TableGen] Fix ambiguous build methods when inferring result types.
- Fix ODS framework to suppress build methods that infer result types and are
  ambiguous with collective variants. This applies to operations with a single variadic
  inputs whose result types can be inferred.
- Extended OpBuildGenTest to test these kinds of ops.

Differential Revision: https://reviews.llvm.org/D85060
2020-08-10 10:05:06 -07:00
Artur Bialas a8fe40d973 [mlir][spirv] Add OpGroupBroadcast
OpGroupBroadcast added to SPIRV dialect

Differential Revision: https://reviews.llvm.org/D85435
2020-08-10 09:50:03 -07:00
Thomas Raoux 68330ee0a9 [mlir][vector] Relax transfer_read/transfer_write restriction on memref operand
Relax the verifier for transfer_read/transfer_write operation so that it can
take a memref with a different element type than the vector being read/written.

This is based on the discourse discussion:
https://llvm.discourse.group/t/memref-cast/1514

Differential Revision: https://reviews.llvm.org/D85244
2020-08-10 08:57:48 -07:00
Vincent Zhao 654e8aadfd [MLIR] Consider AffineIfOp when getting the index set of an Op wrapped in nested loops
This diff attempts to resolve the TODO in `getOpIndexSet` (formerly
known as `getInstIndexSet`), which states "Add support to handle IfInsts
surronding `op`".

Major changes in this diff:

1. Overload `getIndexSet`. The overloaded version considers both
`AffineForOp` and `AffineIfOp`.
2. The `getInstIndexSet` is updated accordingly: its name is changed to
`getOpIndexSet` and its implementation is based on a new API `getIVs`
instead of `getLoopIVs`.
3. Add `addAffineIfOpDomain` to `FlatAffineConstraints`, which extracts
new constraints from the integer set of `AffineIfOp` and merges it to
the current constraint system.
4. Update how a `Value` is determined as dim or symbol for
`ValuePositionMap` in `buildDimAndSymbolPositionMaps`.

Differential Revision: https://reviews.llvm.org/D84698
2020-08-09 03:16:03 +05:30
Feng Liu 5c9c4ade9d Add the inline interface to the shape dialect
This patch also fixes a minor issue that shape.rank should allow
returning !shape.size. The dialect doc has such an example for
shape.rank.

Differential Revision: https://reviews.llvm.org/D85556
2020-08-07 23:29:43 -07:00
Mehdi Amini 58acda1c16 Revert "[mlir] Add a utility class, ThreadLocalCache, for storing non static thread local objects."
This reverts commit 9f24640b7e.

We hit some dead-locks on thread exit in some configurations: TLS exit handler is taking a lock.
Temporarily reverting this change as we're debugging what is going on.
2020-08-08 05:31:25 +00:00
Vincent Zhao 754e09f9ce [MLIR] Add tiling validity check to loop tiling pass
This revision aims to provide a new API, `checkTilingLegality`, to
verify that the loop tiling result still satisifes the dependence
constraints of the original loop nest.

Previously, there was no check for the validity of tiling. For instance:

```
func @diagonal_dependence() {
  %A = alloc() : memref<64x64xf32>

  affine.for %i = 0 to 64 {
    affine.for %j = 0 to 64 {
      %0 = affine.load %A[%j, %i] : memref<64x64xf32>
      %1 = affine.load %A[%i, %j - 1] : memref<64x64xf32>
      %2 = addf %0, %1 : f32
      affine.store %2, %A[%i, %j] : memref<64x64xf32>
    }
  }

  return
}
```

You can find more information about this example from the Section 3.11
of [1].

In general, there are three types of dependences here: two flow
dependences, one in direction `(i, j) = (0, 1)` (notation that depicts a
vector in the 2D iteration space), one in `(i, j) = (1, -1)`; and one
anti dependence in the direction `(-1, 1)`.

Since two of them are along the diagonal in opposite directions, the
default tiling method in `affine`, which tiles the iteration space into
rectangles, will violate the legality condition proposed by Irigoin and
Triolet [2]. [2] implies two tiles cannot depend on each other, while in
the `affine` tiling case, two rectangles along the same diagonal are
indeed dependent, which simply violates the rule.

This diff attempts to put together a validator that checks whether the
rule from [2] is violated or not when applying the default tiling method
in `affine`.

The canonical way to perform such validation is by examining the effect
from adding the constraint from Irigoin and Triolet to the existing
dependence constraints.

Since we already have the prior knowlegde that `affine` tiles in a
hyper-rectangular way, and the resulting tiles will be scheduled in the
same order as their respective loop indices, we can simplify the
solution to just checking whether all dependence components are
non-negative along the tiling dimensions.

We put this algorithm into a new API called `checkTilingLegality` under
`LoopTiling.cpp`. This function iterates every `load`/`store` pair, and
if there is any dependence between them, we get the dependence component
  and check whether it has any negative component. This function returns
  `failure` if the legality condition is violated.

[1]. Bondhugula, Uday. Effective Automatic parallelization and locality optimization using the Polyhedral model. https://dl.acm.org/doi/book/10.5555/1559029
[2]. Irigoin, F. and Triolet, R. Supernode Partitioning. https://dl.acm.org/doi/10.1145/73560.73588

Differential Revision: https://reviews.llvm.org/D84882
2020-08-08 09:29:47 +05:30
Mauricio Sifontes 27d0e14da9 Create Reduction Tree Pass
Implement the Reduction Tree Pass framework as part of the MLIR Reduce tool. This is a parametarizable pass that allows for the implementation of custom reductions passes in the tool.
Implement the FunctionReducer class as an example of a Reducer class parameter for the instantiation of a Reduction Tree Pass.
Create a pass pipeline with a Reduction Tree Pass with the FunctionReducer class specified as parameter.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D83969
2020-08-07 23:17:31 +00:00
Sean Silva b0d76f454d [mlir] Centralize handling of memref element types.
This also beefs up the test coverage:
- Make unranked memref testing consistent with ranked memrefs.
- Add testing for the invalid element type cases.

This is not quite NFC: index types are now allowed in unranked memrefs.

Differential Revision: https://reviews.llvm.org/D85541
2020-08-07 15:17:23 -07:00
Kiran Chandramohan 660832c4e7 [OpenMP,MLIR] Translation of parallel operation: num_threads, if clauses 3/n
This simple patch translates the num_threads and if clauses of the parallel
operation. Also includes test cases.
A minor change was made to parsing of the if clause to parse AnyType and
return the parsed type. Updates to test cases also.

Reviewed by: SouraVX
Differential Revision: https://reviews.llvm.org/D84798
2020-08-07 20:54:24 +00:00
River Riddle 1d6a8deb41 [mlir] Remove the need to define `kindof` on attribute and type classes.
This revision refactors the default definition of the attribute and type `classof` methods to use the TypeID of the concrete class instead of invoking the `kindof` method. The TypeID is already used as part of uniquing, and this allows for removing the need for users to define any of the type casting utilities themselves.

Differential Revision: https://reviews.llvm.org/D85356
2020-08-07 13:43:25 -07:00
River Riddle 9f24640b7e [mlir] Add a utility class, ThreadLocalCache, for storing non static thread local objects.
This class allows for defining thread local objects that have a set non-static lifetime. This internals of the cache use a static thread_local map between the various different non-static objects and the desired value type. When a non-static object destructs, it simply nulls out the entry in the static map. This will leave an entry in the map, but erase any of the data for the associated value. The current use cases for this are in the MLIRContext, meaning that the number of items in the static map is ~1-2 which aren't particularly costly enough to warrant the complexity of pruning. If a use case arises that requires pruning of the map, the functionality can be added.

This is especially useful in the context of MLIR for implementing thread-local caching of context level objects that would otherwise have very high lock contention. This revision adds a thread local cache in the MLIRContext for attributes, identifiers, and types to reduce some of the locking burden. This led to a speedup of several hundred miliseconds when compiling a conversion pass on a very large mlir module(>300K operations).

Differential Revision: https://reviews.llvm.org/D82597
2020-08-07 13:43:25 -07:00
Tim Shen b53fd9cdba [MLIR] Add getSizeInBits() for tensor of complex
Differential Revision: https://reviews.llvm.org/D85382
2020-08-07 12:38:49 -07:00
Konrad Dobros 9414a71aaa [mlir][spirv] Add correct handling of Kernel and Addresses capabilities
This change adds initial support needed to generate OpenCL compliant SPIRV.
If Kernel capability is declared then memory model becomes OpenCL.
If Addresses capability is declared then addressing model becomes Physical64.
Additionally for Kernel capability interface variable ABI attributes are not
generated as entry point function is expected to have normal arguments.

Differential Revision: https://reviews.llvm.org/D85196
2020-08-07 12:29:21 -07:00
Nicolas Vasilache 2a01d7f7b6 [mlir][SCF] Add utility to outline the then and else branches of an scf.IfOp
Differential Revision: https://reviews.llvm.org/D85449
2020-08-07 14:49:49 -04:00
Nicolas Vasilache 3110e7b077 [mlir] Introduce AffineMinSCF folding as a pattern
This revision adds a folding pattern to replace affine.min ops by the actual min value, when it can be determined statically from the strides and bounds of enclosing scf loop .

This matches the type of expressions that Linalg produces during tiling and simplifies boundary checks. For now Linalg depends both on Affine and SCF but they do not depend on each other, so the pattern is added there.
In the future this will move to a more appropriate place when it is determined.

The canonicalization of AffineMinOp operations in the context of enclosing scf.for and scf.parallel proceeds by:
  1. building an affine map where uses of the induction variable of a loop
  are replaced by `%lb + %step * floordiv(%iv - %lb, %step)` expressions.
  2. checking if any of the results of this affine map divides all the other
  results (in which case it is also guaranteed to be the min).
  3. replacing the AffineMinOp by the result of (2).

The algorithm is functional in simple parametric tiling cases by using semi-affine maps. However simplifications of such semi-affine maps are not yet available and the canonicalization does not succeed yet.

Differential Revision: https://reviews.llvm.org/D82009
2020-08-07 14:30:38 -04:00
aartbik c3c95b9c80 [mlir] [VectorOps] Improve lowering of extract_strided_slice (and friends like shape_cast)
Using a shuffle for the last recursive step in progressive lowering not only
results in much more compact IR, but also more efficient code (since the
backend is no longer confused on subvector aliasing for longer vectors).

E.g. the following

  %f = vector.shape_cast %v0: vector<1024xf32> to vector<32x32xf32>

yields much better x86-64 code that runs 3x faster than the original.

Reviewed By: bkramer, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D85482
2020-08-07 09:21:05 -07:00
Mehdi Amini 575b22b5d1 Revisit Dialect registration: require and store a TypeID on dialects
This patch moves the registration to a method in the MLIRContext: getOrCreateDialect<ConcreteDialect>()

This method requires dialect to provide a static getDialectNamespace()
and store a TypeID on the Dialect itself, which allows to lazyily
create a dialect when not yet loaded in the context.
As a side effect, it means that duplicated registration of the same
dialect is not an issue anymore.

To limit the boilerplate, TableGen dialect generation is modified to
emit the constructor entirely and invoke separately a "init()" method
that the user implements.

Differential Revision: https://reviews.llvm.org/D85495
2020-08-07 15:57:08 +00:00
Alexander Belyaev 9c94908320 BEGIN_PUBLIC
[mlir] Add support for unranked case for `tensor_store` and `tensor_load` ops.
END_PUBLIC

Differential Revision: https://reviews.llvm.org/D85518
2020-08-07 14:32:52 +02:00
Nicolas Vasilache 3f906c54a2 [mlir][Vector] Add 2-D vector contract lowering to ReduceOp
This new pattern mixes vector.transpose and direct lowering to vector.reduce.
This allows more progressive lowering than immediately going to insert/extract and
composes more nicely with other canonicalizations.
This has 2 use cases:
1. for very wide vectors the generated IR may be much smaller
2. when we have a custom lowering for transpose ops we can target it directly
rather than rely LLVM

Differential Revision: https://reviews.llvm.org/D85428
2020-08-07 06:17:48 -04:00
Nicolas Vasilache 54fafd17a7 [mlir][Linalg] Introduce canonicalization to remove dead LinalgOps
When any of the memrefs in a structured linalg op has a zero dimension, it becomes dead.
This is consistent with the fact that linalg ops deduce their loop bounds from their operands.

Note however that this is not the case for the `tensor<0xelt_type>` which is a special convention
that must be lowered away into either `memref<elt_type>` or just `elt_type` before this
canonicalization can kick in.

Differential Revision: https://reviews.llvm.org/D85413
2020-08-06 06:08:46 -04:00
Alexander Belyaev 3effc35015 [mlir] Lower DimOp to LLVM for unranked memrefs.
Differential Revision: https://reviews.llvm.org/D85361
2020-08-06 11:46:11 +02:00
aartbik 39379916a7 [mlir] [VectorOps] Add masked load/store operations to Vector dialect
The intrinsics were already supported and vector.transfer_read/write lowered
direclty into these operations. By providing them as individual ops, however,
clients can used them directly, and it opens up progressively lowering transfer
operations at higher levels (rather than direct lowering to LLVM IR as done now).

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D85357
2020-08-05 16:45:24 -07:00
Alex Zinenko b2ab375d1f [mlir] use the new stateful LLVM type translator by default
Previous type model in the LLVM dialect did not support identified structure
types properly and therefore could use stateless translations implemented as
free functions. The new model supports identified structs and must keep track
of the identified structure types present in the target context (LLVMContext or
MLIRContext) to avoid creating duplicate structs due to LLVM's type
auto-renaming. Expose the stateful type translation classes and use them during
translation, storing the state as part of ModuleTranslation.

Drop the test type translation mechanism that is no longer necessary and update
the tests to exercise type translation as part of the main translation flow.

Update the code in vector-to-LLVM dialect conversion that relied on stateless
translation to use the new class in a stateless manner.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85297
2020-08-06 00:36:33 +02:00
Lei Zhang 0d03b3901d [mlir][StandardToSPIRV] Use spv.UMod for index re-calculation
Per Vulkan's SPIR-V environment spec: "While the OpSRem and OpSMod
instructions are supported by the Vulkan environment, they require
non-negative values and thus do not enable additional functionality
beyond what OpUMod provides."

The `getOffsetForBitwidth` function is used for lowering std.load
and std.store, whose indices are of `index` type and cannot be
negative. So we should be okay to use spv.UMod directly here to
be exact. Also made the comment explicit about the assumption.

Differential Revision: https://reviews.llvm.org/D83714
2020-08-05 14:52:04 -04:00
Lei Zhang 48378a32af [spirv] Fix bitwidth emulation for Workgroup storage class
If Int16 is not available, 16-bit integers inside Workgroup storage
class should be emulated via 32-bit integers. This was previously
broken because the capability querying logic was incorrectly
intercepting all storage classes where it meant to only handle
interface storage classes. Adjusted where we return to fix this.

Differential Revision: https://reviews.llvm.org/D85308
2020-08-05 14:44:03 -04:00
Alexander Belyaev bc7456fd8a [mlir] Fix rank bitwidth in UnrankedMemRefType conversion.
Differential Revision: https://reviews.llvm.org/D85300
2020-08-05 18:35:23 +02:00
Alex Zinenko 75f239e975 [mlir] Initial version of C APIs
Introduce an initial version of C API for MLIR core IR components: Value, Type,
    Attribute, Operation, Region, Block, Location. These APIs allow for both
    inspection and creation of the IR in the generic form and intended for wrapping
    in high-level library- and language-specific constructs. At this point, there
    is no stability guarantee provided for the API.

Reviewed By: stellaraccident, lattner

Differential Revision: https://reviews.llvm.org/D83310
2020-08-05 15:04:08 +02:00
Alex Zinenko 4e491570b5 [mlir] Remove LLVMTypeTestDialect
This dialect was introduced during the bring-up of the new LLVM dialect type
system for testing purposes. The main LLVM dialect now uses the new type system
and the test dialect is no longer necessary, so remove it.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85224
2020-08-05 14:39:36 +02:00
Alex Zinenko bdb9295664 [mlir] Fix convert-to-llvmir.mlir test broken due to syntax change
The syntax of the LLVM dialect types changed between the time the code
was written and it was submitted, leading to a test failure. Update the
syntax.
2020-08-05 13:29:35 +02:00
Arpith C. Jacob fab4b59961 [mlir] Conversion of ViewOp with memory space to LLVM.
Handle the case where the ViewOp takes in a memref that has
an memory space.

Reviewed By: ftynse, bondhugula, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D85048
2020-08-05 12:19:52 +02:00
Alexander Belyaev a3d427d30c [mlir] Lower RankOp to LLVM for unranked memrefs.
Differential Revision: https://reviews.llvm.org/D85273
2020-08-05 12:13:43 +02:00
George Mitenkov e739648cfa [MLIR][SPIRVToLLVM] Conversion pattern for loop op
This patch introduces a conversion of `spv.loop` to LLVM dialect.
Similarly to `spv.selection`, op's control attributes are not mapped
to LLVM yet and therefore the conversion fails if the loop control is
not `None`. Also, all blocks within the loop should be reachable in
order for conversion to succeed.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D84245
2020-08-05 10:33:54 +03:00
Diego Caballero 3bfbc5df87 [MLIR][Affine] Fix createPrivateMemRef in affine fusion
Always define a remapping for the memref replacement (`indexRemap`)
with the proper number of inputs, including all the `outerIVs`, so that
the number of inputs and the operands provided for the map don't mismatch.

Reviewed By: bondhugula, andydavis1

Differential Revision: https://reviews.llvm.org/D85177
2020-08-04 12:17:48 -07:00
aartbik e8dcf5f87d [mlir] [VectorOps] Add expand/compress operations to Vector dialect
Introduces the expand and compress operations to the Vector dialect
(important memory operations for sparse computations), together
with a first reference implementation that lowers to the LLVM IR
dialect to enable running on CPU (and other targets that support
the corresponding LLVM IR intrinsics).

Reviewed By: reidtatge

Differential Revision: https://reviews.llvm.org/D84888
2020-08-04 12:00:42 -07:00
George Mitenkov b9266f81bc [MLIR][SPIRVToLLVM] Indentation and style fix in tests
Second patch with test fixes. Redundant `%{{.*}} = `
removed, label checks added, tabs converted to spaces and
some namings are changed to match the convention.

Fixed tests:
- constant-op-to-llvm
- func-ops-to-llvm (renamed)
- memory-ops-to-llvm
- misc-ops-to-llvm
- module-ops-to-llvm
- shift-ops-to-llvm (renamed)
- spirv-types-to-llvm-invalid (renamed)

Reviewed By: ftynse, rriddle

Differential Revision: https://reviews.llvm.org/D85206
2020-08-04 20:53:20 +03:00
Yash Jain 56593fa370 [MLIR] Simplify semi-affine expressions
Simplify semi-affine expression for the operations like ceildiv,
floordiv and modulo by any given symbol by checking divisibilty by that
symbol.

Some properties used in simplification are:

1) Commutative property of the floordiv and ceildiv:
((expr1 floordiv expr2) floordiv expr3 ) = ((expr1 floordiv expr3) floordiv expr2)
((expr1 ceildiv expr2) ceildiv expr3 ) = ((expr1 ceildiv expr3) ceildiv expr2)

While simplification if operations are different no simplification is
possible as there is no property that simplify expressions like these:
((expr1 ceildiv expr2) floordiv expr3) or  ((expr1 floordiv expr2)
ceildiv expr3).

2) If both expr1 and expr2 are divisible by the expr3 then:
(expr1 % expr2) / expr3 = ((expr1 / expr3) % (expr2 / expr3))
where / is divide symbol.

3) If expr1 is divisible by expr2 then expr1 % expr2 = 0.

Signed-off-by: Yash Jain <yash.jain@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D84920
2020-08-04 22:07:18 +05:30
Nicolas Vasilache 1a4263d394 [mlir][Vector] Add linalg.copy-based pattern for splitting vector.transfer_read into full and partial copies.
This revision adds a transformation and a pattern that rewrites a "maybe masked" `vector.transfer_read %view[...], %pad `into a pattern resembling:

```
   %1:3 = scf.if (%inBounds) {
      scf.yield %view : memref<A...>, index, index
    } else {
      %2 = linalg.fill(%extra_alloc, %pad)
      %3 = subview %view [...][...][...]
      linalg.copy(%3, %alloc)
      memref_cast %extra_alloc: memref<B...> to memref<A...>
      scf.yield %4 : memref<A...>, index, index
   }
   %res= vector.transfer_read %1#0[%1#1, %1#2] {masked = [false ... false]}
```
where `extra_alloc` is a top of the function alloca'ed buffer of one vector.

This rewrite makes it possible to realize the "always full tile" abstraction where vector.transfer_read operations are guaranteed to read from a padded full buffer.
The extra work only occurs on the boundary tiles.
2020-08-04 08:46:08 -04:00
Alex Zinenko ec1f4e7c3b [mlir] switch the modeling of LLVM types to use the new mechanism
A new first-party modeling for LLVM IR types in the LLVM dialect has been
developed in parallel to the existing modeling based on wrapping LLVM `Type *`
instances. It resolves the long-standing problem of modeling identified
structure types, including recursive structures, and enables future removal of
LLVMContext and related locking mechanisms from LLVMDialect.

This commit only switches the modeling by (a) renaming LLVMTypeNew to LLVMType,
(b) removing the old implementaiton of LLVMType, and (c) updating the tests. It
is intentionally minimal. Separate commits will remove the infrastructure built
for the transition and update API uses where appropriate.

Depends On D85020

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85021
2020-08-04 14:29:25 +02:00
Alex Zinenko d4fbbab2e4 [mlir] translate types between MLIR LLVM dialect and LLVM IR
With new LLVM dialect type modeling, the dialect types no longer wrap LLVM IR
types. Therefore, they need to be translated to and from LLVM IR during export
and import. Introduce the relevant functionality for translating types. It is
currently exercised by an ad-hoc type translation roundtripping test that will
be subsumed by the actual translation test when the type system transition is
complete.

Depends On D84339

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D85019
2020-08-04 13:42:43 +02:00
George Mitenkov f003b28363 [MLIR][SPIRVToLLVM] Indentation and style fix in tests
This is a first patch that sweeps over tests to fix
indentation (tabs to spaces). It also adds label checks and
removes redundant matching of `%{{.*}} = `.

The following tests have been fixed:
- arithmetic-ops-to-llvm
- bitwise-ops-to-llvm
- cast-ops-to-llvm
- comparison-ops-to-llvm
- logical-ops-to-llvm (renamed to match the rest)

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D85181
2020-08-04 14:30:49 +03:00
River Riddle 8c39e70679 [mlir][OpFormatGen] Add support for eliding UnitAttr when used to anchor an optional group
Unit attributes are given meaning by their existence, and thus have no meaningful value beyond "is it present". As such, in the format of an operation unit attributes are generally used to guard the printing of other elements and aren't generally printed themselves; as the presence of the group when parsing means that the unit attribute should be added. This revision adds support to the declarative format for eliding unit attributes in situations where they anchor an optional group, but aren't the first element.

For example,
```
let assemblyFormat = "(`is_optional` $unit_attr^)? attr-dict";
```

would print `foo.op is_optional` when $unit_attr is present, instead of the current `foo.op is_optional unit`.

Differential Revision: https://reviews.llvm.org/D84577
2020-08-03 14:31:41 -07:00
MaheshRavishankar e888886cc3 [mlir][DialectConversion] Add support for mergeBlocks in ConversionPatternRewriter.
Differential Revision: https://reviews.llvm.org/D84795
2020-08-03 10:06:04 -07:00
Nicolas Vasilache d313e9c12e [mlir][Vector] Add transformation + pattern to split vector.transfer_read into full and partial copies.
This revision adds a transformation and a pattern that rewrites a "maybe masked" `vector.transfer_read %view[...], %pad `into a pattern resembling:

```
   %1:3 = scf.if (%inBounds) {
      scf.yield %view : memref<A...>, index, index
    } else {
      %2 = vector.transfer_read %view[...], %pad : memref<A...>, vector<...>
      %3 = vector.type_cast %extra_alloc : memref<...> to
      memref<vector<...>> store %2, %3[] : memref<vector<...>> %4 =
      memref_cast %extra_alloc: memref<B...> to memref<A...> scf.yield %4 :
      memref<A...>, index, index
   }
   %res= vector.transfer_read %1#0[%1#1, %1#2] {masked = [false ... false]}
```
where `extra_alloc` is a top of the function alloca'ed buffer of one vector.

This rewrite makes it possible to realize the "always full tile" abstraction where vector.transfer_read operations are guaranteed to read from a padded full buffer.
The extra work only occurs on the boundary tiles.

Differential Revision: https://reviews.llvm.org/D84631
2020-08-03 12:58:18 -04:00
Mehdi Amini 7ba82a7320 Revert "[mlir][Vector] Add transformation + pattern to split vector.transfer_read into full and partial copies."
This reverts commit 35b65be041.

Build is broken with -DBUILD_SHARED_LIBS=ON with some undefined
references like:

VectorTransforms.cpp:(.text._ZN4llvm12function_refIFvllEE11callback_fnIZL24createScopedInBoundsCondN4mlir25VectorTransferOpInterfaceEE3$_8EEvlll+0xa5): undefined reference to `mlir::edsc::op::operator+(mlir::Value, mlir::Value)'
2020-08-03 16:16:47 +00:00
Alex Zinenko 0c40af6b59 [mlir] First-party modeling of LLVM types
The current modeling of LLVM IR types in MLIR is based on the LLVMType class
that wraps a raw `llvm::Type *` and delegates uniquing, printing and parsing to
LLVM itself. This model makes thread-safe type manipulation hard and is being
progressively replaced with a cleaner MLIR model that replicates the type
system.  Introduce a set of classes reflecting the LLVM IR type system in MLIR
instead of wrapping the existing types. These are currently introduced as
separate classes without affecting the dialect flow, and are exercised through
a test dialect. Once feature parity is reached, the old implementation will be
gradually substituted with the new one.

Depends On D84171

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D84339
2020-08-03 15:45:29 +02:00
Julian Gross 6d47431d7e [mlir] Extended Buffer Assignment to support AllocaOps.
Added support for AllocaOps in Buffer Assignment.

Differential Revision: https://reviews.llvm.org/D85017
2020-08-03 11:20:30 +02:00
Nicolas Vasilache 35b65be041 [mlir][Vector] Add transformation + pattern to split vector.transfer_read into full and partial copies.
This revision adds a transformation and a pattern that rewrites a "maybe masked" `vector.transfer_read %view[...], %pad `into a pattern resembling:

```
   %1:3 = scf.if (%inBounds) {
      scf.yield %view : memref<A...>, index, index
    } else {
      %2 = vector.transfer_read %view[...], %pad : memref<A...>, vector<...>
      %3 = vector.type_cast %extra_alloc : memref<...> to
      memref<vector<...>> store %2, %3[] : memref<vector<...>> %4 =
      memref_cast %extra_alloc: memref<B...> to memref<A...> scf.yield %4 :
      memref<A...>, index, index
   }
   %res= vector.transfer_read %1#0[%1#1, %1#2] {masked = [false ... false]}
```
where `extra_alloc` is a top of the function alloca'ed buffer of one vector.

This rewrite makes it possible to realize the "always full tile" abstraction where vector.transfer_read operations are guaranteed to read from a padded full buffer.
The extra work only occurs on the boundary tiles.

Differential Revision: https://reviews.llvm.org/D84631
2020-08-03 04:53:43 -04:00
Frederik Gossen 11492be9d7 [MLIR][Shape] Lower `shape.broadcast` to `scf`
Differential Revision: https://reviews.llvm.org/D85027
2020-08-03 08:20:14 +00:00
George Mitenkov 91f6a5f785 [MLIR][SPIRV] Control attributes support for loop and selection
This patch handles loopControl and selectionControl in parsing and
printing. In order to reuse the functionality, and avoid handling cases when
`{` of the region is parsed as a dictionary attribute, `control` keyword was
introduced.`None` is a default control attribute. This functionality can be
later extended to `spv.func`.
Also, loopControl and selectionControl can now be (de)serialized.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84175
2020-08-03 09:31:37 +03:00
Mehdi Amini 4091413c00 Remove debug flags from test (NFC) 2020-08-02 16:59:20 +00:00
Jacques Pienaar 86a78546b9 [mlir] Add shape.with_shape op
This is an operation that can returns a new ValueShape with a different shape. Useful for composing shape function calls and reusing existing shape transfer functions.

Just adding the op in this change.

Differential Revision: https://reviews.llvm.org/D84217
2020-07-31 14:46:48 -07:00
Thomas Raoux cfb955ac37 [mlir][spirv] Relax restriction on pointer type for CooperativeMatrix load/store
This change allow CooperativeMatrix Load/Store operations to use pointer type
that may not match the matrix element type. This allow us to declare buffer
with a larger type size than the matrix element type. This follows SPIR-V spec
and this is needed to be able to use cooperative matrix in combination with
shared local memory efficiently.

Differential Revision: https://reviews.llvm.org/D84993
2020-07-31 08:02:21 -07:00
Frederik Gossen 6983cf3a57 [MLIR][Shape] Allow unsafe `shape.broadcast`
In a context in which `shape.broadcast` is known not to produce an error value,
we want it to operate solely on extent tensors. The operation's behavior is
then undefined in the error case as the result type cannot hold this value.

Differential Revision: https://reviews.llvm.org/D84933
2020-07-31 14:18:06 +00:00
Jakub Lichman eef1bfb2d2 [mlir][Linalg] Conv {1,2,3}D ops defined with TC syntax
Replaced definition of named ND ConvOps with tensor comprehension
syntax which reduces boilerplate code significantly. Furthermore,
new ops to support TF convolutions added (without strides and dilations).

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D84628
2020-07-31 13:20:17 +02:00
Thomas Raoux 59156bad03 [mlir][spirv] Add support for converting memref of vector to SPIR-V
This allow declaring buffers and alloc of vectors so that we can support vector
load/store.

Differential Revision: https://reviews.llvm.org/D84982
2020-07-30 15:05:40 -07:00
Alexander Belyaev 6b8c641d8e [mlir] NFC: Expose `getElementPtrType` and `getSizes` methods of AllocOpLowering.
Differential Revision: https://reviews.llvm.org/D84917
2020-07-30 20:18:29 +02:00
Stephan Herhut 85defd23aa [mlir][shape] Use memref of index in shape lowering
Now that we can have a memref of index type, we no longer need to materialize shapes in i64 and then index_cast.

Differential Revision: https://reviews.llvm.org/D84938
2020-07-30 15:12:43 +02:00
Abhishek Varma 76d07503f0 [MLIR] Introduce inter-procedural memref layout normalization
-- Introduces a pass that normalizes the affine layout maps to the identity layout map both within and across functions by rewriting function arguments and call operands where necessary.
-- Memref normalization is now implemented entirely in the module pass '-normalize-memrefs' and the limited intra-procedural version has been removed from '-simplify-affine-structures'.
-- Run using -normalize-memrefs.
-- Return ops are not handled and would be handled in the subsequent revisions.

Signed-off-by: Abhishek Varma <abhishek.varma@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D84490
2020-07-30 18:12:56 +05:30
Stephan Herhut e12db3ed99 [mlir] Allow index as element type of memref
Differential Revision: https://reviews.llvm.org/D84934
2020-07-30 14:35:22 +02:00
Frederik Gossen a97940d4e0 [MLIR][Shape] Limit `shape.rank` lowering to its extent tensor variant
When lowering to the standard dialect, we currently support only the extent
tensor variant of the shape.rank operation. This change lets the conversion
pattern fail in a well-defined manner.

Differential Revision: https://reviews.llvm.org/D84852
2020-07-30 11:43:08 +00:00
George Mitenkov 1880532036 [MLIR][SPIRVToLLVM] Conversion of GLSL ops to LLVM intrinsics
This patch introduces new intrinsics in LLVM dialect:
-  `llvm.intr.floor`
-  `llvm.intr.maxnum`
-  `llvm.intr.minnum`
-  `llvm.intr.smax`
-  `llvm.intr.smin`
These intrinsics correspond to SPIR-V ops from GLSL
extended instruction set (`spv.GLSL.Floor`, `spv.GLSL.FMax`,
`spv.GLSL.FMin`,  `spv.GLSL.SMax` and `spv.GLSL.SMin`
respectively). Also conversion patterns for them were added.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84661
2020-07-30 11:22:44 +03:00
George Mitenkov 3aab320557 [MLIR][SPIRVToLLVM] Conversion for inverse sqrt and tanh
This is a second patch on conversion of GLSL ops to LLVM dialect.
It introduces patterns to convert `spv.InverseSqrt` and `spv.Tanh`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84633
2020-07-30 10:50:48 +03:00
George Mitenkov 647e9a54c7 [MLIR][SPIRVToLLVM] Conversion patterns for GLSL ops
This is the first patch that adds support for GLSL extended
instruction set ops. These are direct conversions, apart from `spv.Tan`
that is lowered to `sin() / cos()`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84627
2020-07-30 10:20:11 +03:00
Frederik Gossen 5fc34fafa7 [MLIR][Shape] Limit shape to SCF lowering patterns to their supported types
Differential Revision: https://reviews.llvm.org/D84444
2020-07-29 14:54:09 +00:00
Jakub Lichman 1aaf8aa53d [mlir][Linalg] Conv1D, Conv2D and Conv3D added as named ops
This commit is part of a greater project which aims to add
full end-to-end support for convolutions inside mlir. The
reason behind having conv ops for each rank rather than
having one generic ConvOp is to enable better optimizations
for every N-D case which reflects memory layout of input/kernel
buffers better and simplifies code as well. We expect plain linalg.conv
to be progressively retired.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D83879
2020-07-29 16:39:56 +02:00
Frederik Gossen 6673c6cd82 [MLIR][Shape] Limit shape to standard lowerings to their supported types
The lowering does not support all types for its source operations. This change
makes the patterns fail in a well-defined manner.

Differential Revision: https://reviews.llvm.org/D84443
2020-07-29 13:56:52 +00:00
Tres Popp ad793ed903 Forward extent tensors through shape.broadcast.
Differential Revision: https://reviews.llvm.org/D84832
2020-07-29 15:49:10 +02:00
Stephan Herhut 823ffef009 [mlir][Standard] Allow unranked memrefs as operands to dim and rank
`std.dim` currently only accepts ranked memrefs and `std.rank` is limited to
tensors.

Differential Revision: https://reviews.llvm.org/D84790
2020-07-29 14:42:58 +02:00
Frederik Gossen b6b9d3ea85 [MLIR][Shape] Remove type conversion from lowering to standard
Operating on indices and extent tensors directly, the type conversion is no
longer needed for the supported cases.

Differential Revision: https://reviews.llvm.org/D84442
2020-07-29 10:48:05 +00:00
Stephan Herhut 5d9f33aaa0 [MLIR][Shape] Add conversion for missing ops to standard
This adds conversions for const_size and to_extent_tensor. Also, cast-like operations are now folded away if the source and target types are the same.

Differential Revision: https://reviews.llvm.org/D84745
2020-07-29 12:46:18 +02:00
Frederik Gossen 2e7baf6197 [MLIR][Shape] Allow `shape.add` to operate on indices
Differential Revision: https://reviews.llvm.org/D84441
2020-07-29 10:23:37 +00:00
George Mitenkov 1f4aa30a4f [MLIR][SPIRVToLLVM] Branch weights support for BranchConditional conversion
Conversion of `spv.BranchConditional` now supports branch weights
that are mapped to weights vector in `llvm.cond_br`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84657
2020-07-29 10:11:10 +03:00
George Mitenkov 8a66bb7a75 [MLIR][SPIRV] Added storage class constraint on global variable
Added a check for 'Function' storage class in `spv.globalVariable`
verifier since it only can be used with `spv.Variable`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84731
2020-07-29 09:15:00 +03:00
George Mitenkov b1e398920f [MLIR][SPIRVToLLVM] Support of volatile/nontemporal memory access in load/store
This patch adds support of Volatile and Nontemporal
memory accesses to `spv.Load` and `spv.Store`. These attributes are
modelled with a `volatile` and `nontemporal` flags.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84739
2020-07-29 08:45:40 +03:00
Rahul Joshi 0b161def6c [MLIR] Add unit test for tblgen Op build methods
- Initiate the unit test with a test that tests variants of build() methods
  generated for ops with variadic operands and results.
- The intent is to migrate unit .td tests in mlir/test/mlir-tblgen that check for
  generated C++ code to these unit tests which test both that the generated code
  compiles and also is functionally correct.

Differential Revision: https://reviews.llvm.org/D84074
2020-07-28 15:43:37 -07:00
MaheshRavishankar e5608cacfd [mlir][GPUToSPIRV] Add a test pass to set workgroup size for kernel
functions.

This allows using command line flags to lowere from GPU to SPIR-V. The
pass added is only for testing/example purposes. Most uses cases will
need more fine-grained control on setting workgroup sizes for kernel
functions.

Differential Revision: https://reviews.llvm.org/D84619
2020-07-28 12:10:30 -07:00
Anand Kodnani 834133c950 [MLIR] Vector store to load forwarding
The MemRefDataFlow pass does store to load forwarding
only for affine store/loads. This patch updates the pass
to use affine read/write interface which enables vector
forwarding.

Reviewed By: dcaballe, bondhugula, ftynse

Differential Revision: https://reviews.llvm.org/D84302
2020-07-28 11:30:54 -07:00
Nicolas Vasilache 64cdd5b3da [mlir][Vector] Drop declarative transforms
For the purpose of vector transforms, the Tablegen-based infra is subsumed by simple C++ pattern application. Deprecate declarative transforms whose complexity does not pay for itself.

Differential Revision: https://reviews.llvm.org/D84753
2020-07-28 13:11:16 -04:00
Frederik Gossen dfcc09890a [MLIR][Shape] Lower `shape.const_shape` to `tensor_from_elements`
Differential Revision: https://reviews.llvm.org/D82848
2020-07-28 15:40:55 +00:00
Christian Sigg c64c04bbaa Clean up cuda-runtime-wrappers API.
Do not return error code, instead return created resource handles or void. Error reporting is done by the library function.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D84660
2020-07-28 16:34:08 +02:00
Stephan Herhut 6d10d317d8 [MLIR][Shape] Support transforming shape.num_elements on tensors
The current transformation to shape.reduce does not support tensor values.
This adds the required changes to make that work, including fixing the builder
for shape.reduce.

Differential Revision: https://reviews.llvm.org/D84744
2020-07-28 14:13:06 +02:00
lorenzo chelini 946be75b9e [MLIR][Linalg] Retire C++ DotOp in favor of a linalg-ods-gen'd op
- replace DotOp, now that DRR rules have been dropped.

- Capture arguments mismatch in the parser. The number of parsed arguments must
  equal the number of expected arguments.

Reviewed By: ftynse, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D82952
2020-07-28 12:34:19 +02:00
MaheshRavishankar fbe911ee75 [mlir][AffineToStandard] Make LowerAffine pass Op-agnostic.
The LowerAffine psas was a FunctionPass only for legacy
reasons. Making this Op-agnostic allows it to be used from command
line when affine expressions are within operations other than
`std.func`.

Differential Revision: https://reviews.llvm.org/D84590
2020-07-27 12:14:17 -07:00
MaheshRavishankar 8f6e84ba7b [mlir][Linalg] Enable fusion of std.constant (producer) with
linalg.indexed_generic (consumer) with tensor arguments.

The implementation of fusing std.constant producer with a
linalg.indexed_generic consumer was already in place. It is exposed
with this change. Also cleaning up some of the patterns that implement
the fusion to not be templated, thereby avoiding lot of conditional
checks for calling the right instantiation.

Differential Revision: https://reviews.llvm.org/D84566
2020-07-27 09:51:20 -07:00
Christian Sigg 2dd7a9cc2d [MLIR] NFC: Rename mcuMemHostRegister* to mgpuMemHostRegister* to make it consistent with the other cuda-runner functions and ROCm.
Summary: Rename mcuMemHostRegister* to mgpuMemHostRegister*.

Reviewers: herhut

Reviewed By: herhut

Subscribers: yaxunl, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D84583
2020-07-27 15:48:05 +02:00
Alex Zinenko a51829913d [mlir] Support for mutable types
Introduce support for mutable storage in the StorageUniquer infrastructure.
This makes MLIR have key-value storage instead of just uniqued key storage. A
storage instance now contains a unique immutable key and a mutable value, both
stored in the arena allocator that belongs to the context. This is a
preconditio for supporting recursive types that require delayed initialization,
in particular LLVM structure types.  The functionality is exercised in the test
pass with trivial self-recursive type. So far, recursive types can only be
printed in parsed in a closed type system. Removing this restriction is left
for future work.

Differential Revision: https://reviews.llvm.org/D84171
2020-07-27 13:07:44 +02:00
George Mitenkov 36618274f3 [MLIR][LLVMDialect] Added volatile and nontemporal attributes to load/store
This patch introduces 2 new optional attributes to `llvm.load`
and `llvm.store` ops: `volatile` and `nontemporal`. These attributes
are translated into proper LLVM as a `volatile` marker and a metadata node
respectively. They are also helpful with SPIR-V to LLVM dialect conversion
since they are the mappings for `Volatile` and `NonTemporal` Memory Operands.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D84396
2020-07-27 10:55:56 +03:00
Vincent Zhao d135744c34 [MLIR][Affine] Add test for non-hyperrectangular loop tiling
This diff provides a concrete test case for the error that will be raised when the iteration space is non hyper-rectangular.

The corresponding emission method for this error message has been changed as well.

Differential Revision: https://reviews.llvm.org/D84531
2020-07-26 20:17:23 +05:30
Jacques Pienaar 595d214f47 [mlir][shape] Further operand and result type generalization
Previous changes generalized some of the operands and results. Complete
a larger group of those to simplify progressive lowering. Also update
some of the declarative asm form due to generalization. Tried to keep it
mostly mechanical.
2020-07-25 21:41:31 -07:00
Frederik Gossen 07f227c0eb [MLIR][Shape] Allow `num_elements` to operate on extent tensors
Re-landing with dependent change landed and error condition relaxed.
Beyond the change to error condition exactly https://reviews.llvm.org/D84445.
2020-07-25 15:02:29 -07:00
Jacques Pienaar 5142448a5e [MLIR][Shape] Refactor verification
Based on https://reviews.llvm.org/D84439 but less restrictive, else we
don't allow shape_of to be able to produce a ranked output and doesn't
allow for iterative refinement here. We can consider making it more
restrictive later.
2020-07-25 14:55:19 -07:00
Jacques Pienaar 7bfecd7739 Revert "[MLIR][Shape] Allow `num_elements` to operate on extent tensors"
This reverts commit 55ced04d6b.

Forgot to submit depend change first.
2020-07-25 14:47:57 -07:00
Frederik Gossen 55ced04d6b [MLIR][Shape] Allow `num_elements` to operate on extent tensors
Differential Revision: https://reviews.llvm.org/D84445
2020-07-25 14:41:05 -07:00
George Mitenkov 8be0371eb7 [MLIR][SPIRVToLLVM] Conversion of load and store SPIR-V ops
This patch introduces conversion pattern for `spv.Store` and `spv.Load`.
Only op with `Function` Storage Class is supported at the moment
because `spv.GlobalVariable` has not been introduced yet. If the op
has memory access attribute, then there are the following cases.
If the access is `Aligned`, add alignment to the op builder. Otherwise
the conversion fails as other cases are not supported yet because they
require additional attributes for `llvm.store`/`llvm.load` ops: e.g.
`volatile` and `nontemporal`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84236
2020-07-24 16:31:45 +03:00
Frederik Gossen 670ae4b6da [MLIR][Shape] Fold `shape.mul`
Implement constant folding for `shape.mul`.

Differential Revision: https://reviews.llvm.org/D84438
2020-07-24 13:30:45 +00:00
Frederik Gossen 783a351785 [MLIR][Shape] Allow `shape.mul` to operate in indices
Differential Revision: https://reviews.llvm.org/D84437
2020-07-24 13:25:40 +00:00
George Mitenkov 5c98631391 [MLIR][SPIRVToLLVM] Conversion of SPIR-V variable op
The patch introduces the conversion pattern for function-level
`spv.Variable`. It is modelled as `llvm.alloca` op. If initialized, then
additional store instruction is used. Note that there is no initialization
for arrays and structs since constants of these types are not supported in
LLVM dialect yet. Also, at the moment initialisation is only possible via
`spv.constant` (since `spv.GlobalVariable` conversion is not implemented
yet).

The input code has some scoping is not taken into account and will be
addressed in a different patch.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D84224
2020-07-24 15:49:55 +03:00
Frederik Gossen bb442bb51a [MLIR][Shape] Remove deprecated and unused lowerings
This concerns `from/to_extent_tensor`, `size_to_index`, `index_to_size`, and
`const_size` conversion patterns. The new lowering will work directly on indices
and extent tensors. The shape and size values will allow for error values but
are not yet supported by the dialect conversion.

Differential Revision: https://reviews.llvm.org/D84436
2020-07-24 11:19:36 +00:00
Frederik Gossen 5984d74139 [MLIR][Shape] Allow `get_extent` to operate on extent tensors and indices
Differential Revision: https://reviews.llvm.org/D84435
2020-07-24 11:13:17 +00:00
Frederik Gossen 7f600da828 [MLIR][Shape] Allow `shape.any` to operate on extent tensors
Differential Revision: https://reviews.llvm.org/D84433
2020-07-24 11:03:10 +00:00
Frederik Gossen 23a65648c0 [MLIR][Shape] Allow `shape.rank` to operate on extent tensors
Differential Revision: https://reviews.llvm.org/D84429
2020-07-24 10:43:39 +00:00
Frederik Gossen d4e4d5d780 [MLIR][Shape] Allow for `shape_of` to return extent tensors
The operation `shape.shape_of` now returns an extent tensor `tensor<?xindex>` in
cases when no error are possible. All consuming operation will eventually accept
both, shapes and extent tensors.

Differential Revision: https://reviews.llvm.org/D84160
2020-07-24 08:40:40 +00:00
Frederik Gossen 0e1a42efd8 [MLIR][Shape] Allow `shape.get_extent` to operate on extent tensors
`shape.get_extent` now accepts extent tensors `tensor<?xindex>` as an argument.

Differential Revision: https://reviews.llvm.org/D84158
2020-07-24 08:34:37 +00:00
Frederik Gossen fb1e571687 [MLIR][Standard] Add default lowering for `assert`
The default lowering of `assert` calls `abort` in case the assertion is
violated. The failure message is ignored but should be used by custom lowerings
that can assume more about their environment.

Differential Revision: https://reviews.llvm.org/D83886
2020-07-24 08:31:12 +00:00
Frederik Gossen 14d3cef012 [MLIR][Shape] Generalze `shape.const_shape` to extent tensors
The operation `shape.const_shape` was used for constants of type shape only.
We can now also use it to create constant extent tensors.

Differential Revision: https://reviews.llvm.org/D84157
2020-07-24 08:06:24 +00:00
George Mitenkov 99d03f0391 [MLIR][LLVMDialect] Added branch weights attribute to CondBrOp
This patch introduces branch weights metadata to `llvm.cond_br` op in
LLVM Dialect. It is modelled as optional `ElementsAttr`, for example:
```
llvm.cond_br %cond weights(dense<[1, 3]> : vector<2xi32>), ^bb1, ^bb2
```
When exporting to proper LLVM, this attribute is transformed into metadata
node. The test for metadata creation is added to `../Target/llvmir.mlir`.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D83658
2020-07-24 10:11:13 +03:00
River Riddle 4589dd924d [mlir][DialectConversion] Enable deeper integration of type conversions
This revision adds support for much deeper type conversion integration into the conversion process, and enables auto-generating cast operations when necessary. Type conversions are now largely automatically managed by the conversion infra when using a ConversionPattern with a provided TypeConverter. This removes the need for patterns to do type cast wrapping themselves and moves the burden to the infra. This makes it much easier to perform partial lowerings when type conversions are involved, as any lingering type conversions will be automatically resolved/legalized by the conversion infra.

To support this new integration, a few changes have been made to the type materialization API on TypeConverter. Materialization has been split into three separate categories:
* Argument Materialization: This type of materialization is used when converting the type of block arguments when calling `convertRegionTypes`. This is useful for contextually inserting additional conversion operations when converting a block argument type, such as when converting the types of a function signature.
* Source Materialization: This type of materialization is used to convert a legal type of the converter into a non-legal type, generally a source type. This may be called when uses of a non-legal type persist after the conversion process has finished.
* Target Materialization: This type of materialization is used to convert a non-legal, or source, type into a legal, or target, type. This type of materialization is used when applying a pattern on an operation, but the types of the operands have not yet been converted.

Differential Revision: https://reviews.llvm.org/D82831
2020-07-23 19:40:31 -07:00
MaheshRavishankar 4ff48db68d [mlir][Linalg] Fixing bug in subview size computation in Linalg tiling.
The `makeTiledViews` did not use the sizes of the tiled views based on
the result of the loop bound inference computation. This manifested as
an error in computing tile sizes with convolution where not all the
result expression of concatenated affine maps are simple
AffineDimExpr.

Differential Revision: https://reviews.llvm.org/D84366
2020-07-23 11:09:55 -07:00
Jakub Lichman 919922b0c2 [mlir] Added verification check for linalg.conv to ensure memrefs are of rank > 2
linalg.conv does not support memrefs with rank smaller than 3 as stated here:
https://www.tensorflow.org/versions/r2.0/api_docs/python/tf/nn/convolution

However it does not verify it and thus crashes with "LLVM ERROR: out of memory"
error for 1D case and "nWin > 0 && "expected at least one window dimension"" assertion
for 2D case. This commit adds check for that in the verification method.

Differential Revision: https://reviews.llvm.org/D84317
2020-07-23 12:27:05 +02:00
Jakub Lichman e4dd964df0 [mlir] Loop bounds inference in linalg.generic op improved to support bounds for convolution
Loop bound inference is right now very limited as it supports only permutation maps and thus
it is impossible to implement convolution with linalg.generic as it requires more advanced
loop bound inference. This commits solves it for the convolution case.

Depends On D83158

Differential Revision: https://reviews.llvm.org/D83191
2020-07-23 11:01:54 +02:00
aartbik 1485fd295b [mlir] [VectorOps] Improve scatter/gather CPU performance
Replaced the linearized address with the proper LLVM way of
defining vector of base + indices in SIMD style. This yields
much better code. Some prototype results with microbencmarking
sparse matrix x vector with 50% sparsity (about 2-3x faster):

         LINEARIZED     IMPROVED
GFLOPS  sdot  saxpy     sdot saxpy
16x16    1.6   1.4       4.4  2.1
32x32    1.7   1.6       5.8  5.9
64x64    1.7   1.7       6.4  6.4
128x128  1.7   1.7       5.9  5.9
256x256  1.6   1.6       6.1  6.0
512x512  1.4   1.4       4.9  4.7

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D84368
2020-07-22 23:47:36 -07:00
Thomas Raoux a1b9fb220f [mlir][linalg] Add vectorization transform for CopyOp
CopyOp get vectorized to vector.transfer_read followed by vector.transfer_write

Differential Revision: https://reviews.llvm.org/D83739
2020-07-22 12:40:42 -07:00
Benjamin Kramer bf561dd2eb [mlir][Vector] Vectorize integer matmuls
The underlying infrastructure supports this already, just add the
pattern matching for linalg.generic.

Differential Revision: https://reviews.llvm.org/D84335
2020-07-22 19:39:56 +02:00
Haruki Imai 7f44a7130b [MLIR] Set alignment in AllocOp of normalizeMemref()
AllocOp is updated in normalizeMemref(AllocOp allocOp), but, when the
AllocOp has `alignment` attribute, it was ignored and updated AllocOp
does not have `alignment` attribute. This patch fixes it.

Differential Revision: https://reviews.llvm.org/D83656
2020-07-22 12:34:35 +05:30
aartbik 19dbb230a2 [mlir] [VectorOps] Add scatter/gather operations to Vector dialect
Introduces the scatter/gather operations to the Vector dialect
(important memory operations for sparse computations), together
with a first reference implementation that lowers to the LLVM IR
dialect to enable running on CPU (and other targets that support
the corresponding LLVM IR intrinsics).

The operations can be used directly where applicable, or can be used
during progressively lowering to bring other memory operations closer to
hardware ISA support for a gather/scatter. The semantics of the operation
closely correspond to those of the corresponding llvm intrinsics.

Note that the operation allows for a dynamic index vector (which is
important for sparse computations). However, this first reference
lowering implementation "serializes" the address computation when
base + index_vector is converted to a vector of pointers. Exploring
how to use SIMD properly during these step is TBD. More general
memrefs and idiomatic versions of striding are also TBD.

Reviewed By: arpith-jacob

Differential Revision: https://reviews.llvm.org/D84039
2020-07-21 10:57:40 -07:00
Diego Caballero f8b72fba86 [MLIR][EDSC] Add fptrunc and fpext to EDSC
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D84216
2020-07-21 08:55:18 -07:00
George Mitenkov 61dd481f11 [MLIR][LLVMDialect] SelectionOp conversion pattern
This patch introduces conversion pattern for `spv.selection` op.
The conversion can only be applied to selection with all blocks being
reachable. Moreover, selection with control attributes "Flatten" and
"DontFlatten" is not supported.
Since the `PatternRewriter` hook for block merging has not been implemented
for `ConversionPatternRewriter`, merge and continue blocks are kept
separately.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D83860
2020-07-21 17:11:46 +03:00
George Mitenkov 05d3160c9c [MLIR][SPIRVToLLVM] Conversion of SPIR-V branch ops
This patch introduces conversion for `spv.Branch` and `spv.BranchConditional`
ops. Branch weigths for `spv.BranchConditional` are not supported at the
moment, and conversion in this case fails.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83784
2020-07-21 10:52:20 +03:00
Jakub Lichman f9c8febc52 [mlir] Added support for symbols inside linalg.generic and map concatenation
This commit adds functionality needed for implementation of convolutions with
linalg.generic op. Since linalg.generic right now expects indexing maps to be
just permutations, offset indexing needed in convolutions is not possible.
Therefore in this commit we address the issue by adding support for symbols inside
indexing maps which enables more advanced indexing. The upcoming commit will
solve the problem of computing loop bounds from such maps.

Differential Revision: https://reviews.llvm.org/D83158
2020-07-20 19:20:47 +02:00
Frederik Gossen 71e7a37e7e [MLIR][Shape] Allow `shape.rank` to accept extent tensors `tensor?xindex>`
Differential Revision: https://reviews.llvm.org/D84156
2020-07-20 14:47:19 +00:00
Frederik Gossen ccb40c84c5 [MLIR][Shape] Allow `cstr_broadcastable` to accept extent tensors
Differential Revision: https://reviews.llvm.org/D84155
2020-07-20 14:39:44 +00:00
Frederik Gossen f9595857b9 [MLIR][Shape] Fold `shape.shape_eq`
Fold `shape.shape_eq`.

Differential Revision: https://reviews.llvm.org/D82533
2020-07-20 12:25:53 +00:00
Alex Zinenko ebbdecdd57 [mlir] Support translating function linkage between MLIR and LLVM IR
Linkage support is already present in the LLVM dialect, and is being translated
for globals other than functions. Translation support has been missing for
functions because their conversion goes through a different code path than
other globals.

Differential Revision: https://reviews.llvm.org/D84149
2020-07-20 14:04:31 +02:00
Yash Jain 3382b7177f [MLIR] Add lowering for affine.parallel to scf.parallel
Add lowering conversion from affine.parallel to scf.parallel.

Differential Revision: https://reviews.llvm.org/D83239
2020-07-18 13:13:49 +05:30
Nicolas Vasilache cc0a58d7cd [mlir][Vector] Fix masking logic in VectorToSCF
Summary: The logic was conservative but inverted: cases that should remain unmasked became 1-D masked.

Differential Revision: https://reviews.llvm.org/D84051
2020-07-17 13:24:07 -04:00
Pierre Oechsel ec62e37c86 [mlir] [vector] Add an optional filter to vector contract lowering patterns.
Summary: Vector contract patterns were only parameterized by a `vectorTransformsOptions`. As a result, even if an mlir file was containing several occurrences of `vector.contract`, all of them would be lowered in the same way. More granularity might be required . This Diff adds a `constraint` argument to each of these patterns which allows the user to specify with more precision on which `vector.contract` should each of the lowering apply.

Differential Revision: https://reviews.llvm.org/D83960
2020-07-17 12:03:13 -04:00
Rahul Joshi 764931d248 [MLIR][TableGen] Add default value for named attributes for 2 more build methods
- Added more default values for `attributes` parameter for 2 more build methods
- Extend the op-decls.td unit test to test these build methods.

Differential Revision: https://reviews.llvm.org/D83839
2020-07-16 09:32:19 -07:00
Frederik Gossen aca7b8dd63 [MLIR][Shape] Lower `shape.shape_eq` to `scf`
Lower `shape.shape_eq` to the `scf` (and `std`) dialect. For now, this lowering
is limited to extent tensor operands.

Differential Revision: https://reviews.llvm.org/D82530
2020-07-16 14:44:29 +00:00
Frederik Gossen 67391a7045 [MLIR] Lower `shape.reduce` to `scf.for` only when argument is `tensor<?xindex>`
To make it clear when shape error values cannot occur the shape operations can
operate on extent tensors. This change updates the lowering for `shape.reduce`
accordingly.

Differential Revision: https://reviews.llvm.org/D83944
2020-07-16 13:55:48 +00:00
Frederik Gossen 0eb50e614c [MLIR][Shape] Allow `shape.reduce` to operate on extent tensors
Allow `shape.reduce` to take both `shape.shape` and `tensor<?xindex>` as an
argument.

Differential Revision: https://reviews.llvm.org/D83943
2020-07-16 13:53:37 +00:00
Stephen Neuendorffer 628288658c [MLIR] Add RegionKindInterface
Some dialects have semantics which is not well represented by common
SSA structures with dominance constraints.  This patch allows
operations to declare the 'kind' of their contained regions.
Currently, two kinds are allowed: "SSACFG" and "Graph".  The only
difference between them at the moment is that SSACFG regions are
required to have dominance, while Graph regions are not required to
have dominance.  The intention is that this Interface would be
generated by ODS for existing operations, although this has not yet
been implemented. Presumably, if someone were interested in code
generation, we might also have a "CFG" dialect, which defines control
flow, but does not require SSA.

The new behavior is mostly identical to the previous behavior, since
registered operations without a RegionKindInterface are assumed to
contain SSACFG regions.  However, the behavior has changed for
unregistered operations.  Previously, these were checked for
dominance, however the new behavior allows dominance violations, in
order to allow the processing of unregistered dialects with Graph
regions.  One implication of this is that regions in unregistered
operations with more than one op are no longer CSE'd (since it
requires dominance info).

I've also reorganized the LangRef documentation to remove assertions
about "sequential execution", "SSA Values", and "Dominance".  Instead,
the core IR is simply "ordered" (i.e. totally ordered) and consists of
"Values".  I've also clarified some things about how control flow
passes between blocks in an SSACFG region. Control Flow must enter a
region at the entry block and follow terminator operation successors
or be returned to the containing op.  Graph regions do not define a
notion of control flow.

see discussion here:
https://llvm.discourse.group/t/rfc-allowing-dialects-to-relax-the-ssa-dominance-condition/833/53

Differential Revision: https://reviews.llvm.org/D80358
2020-07-15 14:27:05 -07:00
Rahul Joshi a3ad8f92b4 [MLIR] Add type checking capability to RegionBranchOpInterface
- Add function `verifyTypes` that Op's can call to do type checking verification
  along the control flow edges described the Op's RegionBranchOpInterface.
- We cannot rely on the verify methods on the OpInterface because the interface
  functions assume valid Ops, so they may crash if invoked on unverified Ops.
  (For example, scf.for getSuccessorRegions() calls getRegionIterArgs(), which
  dereferences getBody() block. If the scf.for is invalid with no body, this
  can lead to a segfault). `verifyTypes` can be called post op-verification to
  avoid this.

Differential Revision: https://reviews.llvm.org/D82829
2020-07-15 11:14:07 -07:00
Stephan Herhut 8ef47244b9 [mlir][shape] Fold shape.broadcast with one scalar operand
This folds shape.broadcast where at least one operand is a scalar to the
other operand.

Also add an assemblyFormat for shape.broadcast and shape.concat.

Differential Revision: https://reviews.llvm.org/D83854
2020-07-15 18:49:12 +02:00
Frederik Gossen 978804821e [MLIR][Shape] Add `shape.shape_eq` operation
Add `shape.shape_eq` operation to the shape dialect.
The operation allows to test shapes and extent tensors for equality.

Differential Revision: https://reviews.llvm.org/D82528
2020-07-15 10:30:52 +00:00
Florian Hahn c872e809d1 [Matrix] Only pass vector arg as overloaded type in MatrixBuilder.
In 2b3c505, the pointer arguments for the matrix load and store
intrinsics was changed to always be the element type of the vector
argument.

This patch updates the MatrixBuilder to not add the pointer type to the
overloaded types and adjusts the clang/mlir tests.

This should fix a few build failures on GreenDragon, including
 http://green.lab.llvm.org/green/job/test-suite-verify-machineinstrs-x86_64-O0-g/7891/
2020-07-15 10:42:24 +01:00
Nicolas Vasilache 512da70be7 [mlir][Vector] Degrade masking information when forwarding linalg.copy to vector.transfer
Summary:
linalg.copy + linalg.fill can be used to create a padded local buffer.
The `masked` attribute is only valid on this padded buffer.
When forwarding to vector.transfer ops, the attribute must be reset
conservatively.

Differential Revision: https://reviews.llvm.org/D83782
2020-07-15 02:32:45 -04:00
River Riddle 6b476e2426 [mlir] Add support for parsing optional Attribute values.
This adds a `parseOptionalAttribute` method to the OpAsmParser that allows for parsing optional attributes, in a similar fashion to how optional types are parsed. This also enables the use of attribute values as the first element of an assembly format optional group.

Differential Revision: https://reviews.llvm.org/D83712
2020-07-14 13:14:59 -07:00
River Riddle b98f414a04 [mlir][DialectConversion] Emit an error if an operation marked as erased has live users after conversion
Up until now, there has been an implicit agreement that when an operation is marked as
"erased" all uses of that operation's results are guaranteed to be removed during conversion. How this works in practice is that there is either an assert/crash/asan failure/etc. This revision adds support for properly detecting when an erased operation has dangling users, emits and error and fails the conversion.

Differential Revision: https://reviews.llvm.org/D82830
2020-07-14 13:06:08 -07:00
George Mitenkov be15284ef6 [MLIR][StdToSPIRV] Fixed a typo in ops conversion tests
Fixed a typo in `std-ops-to-spitv.mlir` test.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D83791
2020-07-14 21:46:07 +03:00
Rahul Joshi e2b716105b [MLIR] Add argument related API to Region
- Arguments of the first block of a region are considered region arguments.
- Add API on Region class to deal with these arguments directly instead of
  using the front() block.
- Changed several instances of existing code that can use this API
- Fixes https://bugs.llvm.org/show_bug.cgi?id=46535

Differential Revision: https://reviews.llvm.org/D83599
2020-07-14 09:28:29 -07:00
Frederik Gossen 1ee0d22f26 [MLIR][Standard] Erase redundant assertions `std.assert`
Differential Revision: https://reviews.llvm.org/D83118
2020-07-14 10:09:39 +00:00
Frederik Gossen bcedc4fa0a [MLIR][Standard] Add `assert` operation to the standard dialect
Differential Revision: https://reviews.llvm.org/D83117
2020-07-14 10:00:54 +00:00
Kiran Chandramohan d9067dca7b Lowering of OpenMP Parallel operation to LLVM IR 1/n
This patch introduces lowering of the OpenMP parallel operation to LLVM
IR using the OpenMPIRBuilder.

Functions topologicalSort and connectPhiNodes are generalised so that
they work with operations also. connectPhiNodes is also made static.

Lowering works for a parallel region with multiple blocks. Clauses and
arguments of the OpenMP operation are not handled.

Reviewed By: rriddle, anchu-rajendran

Differential Revision: https://reviews.llvm.org/D81660
2020-07-13 23:55:45 +01:00
Nicolas Vasilache affbc0cd1c [mlir] Add alignment attribute to LLVM memory ops and use in vector.transfer
Summary: The native alignment may generally not be used when lowering a vector.transfer to the underlying load/store operation. This revision fixes the unmasked load/store alignment to match that of the masked path.

Differential Revision: https://reviews.llvm.org/D83684
2020-07-13 17:35:20 -04:00
Rahul Joshi 0d988da6d1 [MLIR] Change ODS collective params build method to provide an empty default value for named attributes
- Provide default value for `ArrayRef<NamedAttribute> attributes` parameter of
  the collective params build method.
- Change the `genSeparateArgParamBuilder` function to not generate build methods
  that may be ambiguous with the new collective params build method.
- This change should help eliminate passing empty NamedAttribue ArrayRef when the
  collective params build method is used
- Extend op-decl.td unit test to make sure the ambiguous build methods are not
  generated.

Differential Revision: https://reviews.llvm.org/D83517
2020-07-13 13:35:44 -07:00
Thomas Raoux 2f23270af9 [mlir] Support operations with multiple results in slicing
Right now slicing would assert if an operation with multiple results is in the
slice.

Differential Revision: https://reviews.llvm.org/D83627
2020-07-13 13:24:27 -07:00
Lei Zhang 4ba45a778a [mlir][StandardToSPIRV] Fix conversion for signed remainder
Per the Vulkan's SPIR-V environment spec, "for the OpSRem and OpSMod
instructions, if either operand is negative the result is undefined."
So we cannot directly use spv.SRem/spv.SMod if either operand can be
negative. Emulate it via spv.UMod.

Because the emulation uses spv.SNegate, this commit also defines
spv.SNegate.

Differential Revision: https://reviews.llvm.org/D83679
2020-07-13 16:15:31 -04:00
Benjamin Kramer 3bffe6022c [mlir][VectorOps] Lower vector.fma to llvm.fmuladd instead of llvm.fma
Summary:
These are semantically equivalent, but fmuladd allows decaying the op
into fmul+fadd if there is no fma instruction available. llvm.fma lowers
to scalar calls to libm fmaf, which is a lot slower.

Reviewers: nicolasvasilache, aartbik, ftynse

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D83666
2020-07-13 12:26:03 +02:00
Frederik Gossen 9df6afbb5c [MLIR][Shape] Lower `shape.any`
Lower `shape.any` to its first operand.

Differential Revision: https://reviews.llvm.org/D83123
2020-07-13 08:30:05 +00:00
Yash Jain 102828249c [MLIR] Parallelize affine.for op to 1-D affine.parallel op
Introduce pass to convert parallel affine.for op into 1-D affine.parallel op.
Run using --affine-parallelize. Removes test-detect-parallel: pass for checking
parallel affine.for ops.

Signed-off-by: Yash Jain <yash.jain@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D83193
2020-07-11 21:33:25 +05:30
Mauricio Sifontes 16e9ccb2be Create TestReducer pass
- Create a pass that generates bugs based on trivially defined behavior for the purpose of testing the MLIR Reduce Tool.
- Implement the functionality inside the pass to crash mlir-opt in the presence of an operation with the name "crashOp".
- Register the pass as a test pass in the mlir-opt tool.

Reviewed by: jpienaar

Differential Revision: https://reviews.llvm.org/D83422
2020-07-11 00:46:57 +00:00
Thomas Raoux 6d5aeb0dce [mlir][linalg] Improve aliasing approximation for hoisting transfer read/write
Improve the logic deciding if it is safe to hoist vector transfer read/write
out of the loop. Change the logic to prevent hoisting operations if there are
any unknown access to the memref in the loop no matter where the operation is.
For other transfer read/write in the loop check if we can prove that they
access disjoint memory and ignore them in this case.

Differential Revision: https://reviews.llvm.org/D83538
2020-07-10 14:55:04 -07:00
Nicolas Vasilache ec2f2cec76 [mlir][Vector] Add folding for vector.transfer ops
This revision folds vector.transfer operations by updating the `masked` bool array attribute when more unmasked dimensions can be discovered.

Differential revision: https://reviews.llvm.org/D83586
2020-07-10 16:49:12 -04:00
aartbik 365434a584 [mlir] [VectorOps] Merge OUTER/AXPY vector.contract lowering into single case
We temporarily had separate OUTER lowering (for matmat flavors) and
AXPY lowering (for matvec flavors). With the new generalized
"vector.outerproduct" semantics, these cases can be merged into
a single lowering method. This refactoring will simplify future
decisions on cost models and lowering heuristics.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D83585
2020-07-10 13:11:54 -07:00
aartbik 9bf6354301 [mlir] [VectorOps] Allow AXPY to be expressed as special case of OUTERPRODUCT
This specialization allows sharing more code where an AXPY follows naturally
in cases where an OUTERPRODUCT on a scalar would be generated.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D83453
2020-07-10 12:23:24 -07:00
Nicolas Vasilache a490d387e6 [mlir][Vector] Add ExtractOp folding when fed by a TransposeOp
TransposeOp are often followed by ExtractOp.
In certain cases however, it is unnecessary (and even detrimental) to lower a TransposeOp to either a flat transpose (llvm.matrix intrinsics) or to unrolled scalar insert / extract chains.

Providing foldings of ExtractOp mitigates some of the unnecessary complexity.

Differential revision: https://reviews.llvm.org/D83487
2020-07-10 11:09:27 -04:00
Nicolas Vasilache 56c638b5c1 [mlir][Linalg] Generalize Vectorization of Linalg contractions
This revision adds support for vectorizing named and generic contraction ops to vector.contract. Cases in which the memref is 0-D are special cased to emit std.load/std.store instead of vector.transfer. Relevant tests are added.

Differential revision: https://reviews.llvm.org/D83307
2020-07-10 10:28:34 -04:00
Nicolas Vasilache 22c8a08fd8 [mlir][Vector] Fold chains of ExtractOp
This revision adds folding to ExtractOp by simply concatenating the position attributes.
2020-07-10 09:32:02 -04:00
George Mitenkov eb6b7c5d4f [MLIR][SPIRVToLLVM] Conversion of SPIR-V struct type without offset
This patch introduces type conversion for SPIR-V structs. Since
handling offset case requires thorough testing, it was left out
for now. Hence, only structs with no offset are currently
supported. Also, structs containing member decorations cannot
be translated.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83403
2020-07-10 10:15:45 +03:00
ergawy 3847a6ae75 [MLIR][SPIRV] Support two memory access attributes in OpCopyMemory.
This commit augments spv.CopyMemory's implementation to support 2 memory
access operands. Hence, more closely following the spec. The following
changes are introduces:

- Customize logic for spv.CopyMemory serialization and deserialization.
- Add 2 additional attributes for source memory access operand.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83241
2020-07-09 20:23:35 -04:00
Stella Laurenzo 722475a375 Initial boiler-plate for python bindings.
Summary:
* Native '_mlir' extension module.
* Python mlir/__init__.py trampoline module.
* Lit test that checks a message.
* Uses some cmake configurations that have worked for me in the past but likely needs further elaboration.

Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D83279
2020-07-09 12:03:58 -07:00
Jeremy Bruestle 2ede891875 [MLIR] IR changes to add yield semantics for affine.if and affine.parallel
Reviewed By: bondhugula, flaub

Differential Revision: https://reviews.llvm.org/D82600
2020-07-09 12:12:42 -07:00
George Mitenkov 28cd3cbc12 [MLIR][SPIRVToLLVM] Conversion of SPIR-V array, runtime array, and pointer types
This patch adds type conversion for 4 SPIR-V types: array, runtime array, pointer
and struct. This conversion is integrated using a separate function
`populateSPIRVToLLVMTypeConversion()` that adds new type conversions. At the moment,
this is a basic skeleton that allows to perfom conversion from SPIR-V array,
runtime array and pointer types to LLVM typesystem. There is no support of array
strides or storage classes. These will be supported on the case by case basis.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83399
2020-07-09 18:11:45 +03:00
Benjamin Kramer b44470547e Make helpers static. NFC. 2020-07-09 13:48:56 +02:00
Tres Popp 2ef71cb7fd [mlir] Add additional Canonicalization of shape.cstr_broadcastable.
Summary:
Added canonicalization and folding was:
- Folding when either input is an attribute indicating a scalar input
which can always be broadcasted.
- Canonicalization where it can be determined that either input shape is
a scalar.
- Canonicalization where the partially specified input shapes can be
proven to be broadcastable always.

Differential Revision: https://reviews.llvm.org/D83194
2020-07-09 11:23:25 +02:00
Stella Laurenzo abd6574b45 Add missing CMake bool canonicalizations.
Summary:
* This allows these flags to be passed on the command line with normal CMake bool-interpreted values like ON/OFF instead of requiring 0/1.
* As-is, if passing ON/OFF, these will cause a parse error in lit.site.cfg.py because Python tries to interpret the string literally.

Reviewers: stephenneuendorffer

Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D83451
2020-07-08 17:56:48 -07:00
River Riddle 24aa4efffd [mlir] Print 0 element DenseElementsAttr as dense<> to fix parser bugs with expected shape.
Depending on where the 0 dimension is within the shape, the parser will currently reject .mlir generated by the printer.

Differential Revision: https://reviews.llvm.org/D83445
2020-07-08 18:44:23 -07:00
George Mitenkov 7a4e39b326 [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldSExtract and spv.BitFieldUExtract patterns
This patch adds conversion patterns for `spv.BitFieldSExtract` and `spv.BitFieldUExtract`.
As in the patch for `spv.BitFieldInsert`, `offset` and `count` have to be broadcasted in
vector case and casted to match the type of the base.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82640
2020-07-08 12:37:37 +03:00
George Mitenkov 00580349c3 [MLIR][SPIRVToLLVM] Miscellaneous ops conversion: select, fmul and undef
This patch introduces 3 new direct conversions for SPIR-V ops:
- `spv.Select`
- `spv.Undef`
- `spv.FMul` that was skipped in the patch with arithmetic ops

Differential Revision: https://reviews.llvm.org/D83291
2020-07-08 11:06:04 +03:00
Mehdi Amini f54d0e36be Rename `xla_lhlo.terminator` into `return` in SCF parallel loop test (NFC)
It seems that these were inserted here inadvertently instead of using
standard `return`.
2020-07-08 04:05:43 +00:00
HazemAbdelhafez 34c4852015 [mlir][spirv] Add MatrixTimesMatrix operation
Add MatrixTimesMatrix operation to SPIRV Dialect and add NoSideEffect trait
to Matrix ops.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82671
2020-07-07 21:32:50 -04:00
Mauricio Sifontes ec04ce4623 Create the MLIR Reduce framework
Create the framework and testing environment for MLIR Reduce - a tool
with the objective to reduce large test cases into smaller ones while
preserving their interesting behavior.

Implement the functionality to parse command line arguments, parse the
MLIR test cases into modules and run the interestingness tests on
the modules.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D82803
2020-07-07 23:42:53 +00:00
Nicolas Vasilache 24ed3a9403 [mlir][Vector] Add ExtractOp folding
This revision adds foldings for ExtractOp operations that come from previous InsertOp.
InsertOp have cumulative semantic where multiple chained inserts are necessary to produce the final value from which the extracts are obtained.
Additionally, TransposeOp may be interleaved and need to be tracked in order to follow the producer consumer relationships and properly compute positions.

Differential revision: https://reviews.llvm.org/D83150
2020-07-07 16:48:49 -04:00
Alexander Belyaev 1a2ed71a8a [mlir] Support unranked types in func signature conversion in BufferPlacement.
Currently, only ranked tensor args and results can be converted to memref types.

Differential Revision: https://reviews.llvm.org/D83324
2020-07-07 19:43:48 +02:00
Sean Silva a084b94f11 [mlir] Convert function signatures before converting globals
Summary: This allows global initializers to reference functions.

Differential Revision: https://reviews.llvm.org/D83266
2020-07-07 10:40:02 -07:00
Mehdi Amini e10e034f4b Revert "Create the framework and testing environment for MLIR Reduce - a tool"
This reverts commit 28a45d54a7.

Windows bot is broken with:

LLVM ERROR: Error running interestingness test: posix_spawn failed: Permission denied
2020-07-07 15:47:09 +00:00
Benjamin Kramer cca4ac523e [mlir][VectorOps] Lower vector.outerproduct of int vectors
vector.fma and mulf don't work on integers. Use a muli/addi pair or
plain muli instead.

Differential Revision: https://reviews.llvm.org/D83292
2020-07-07 14:40:07 +02:00
River Riddle 9db53a1827 [mlir][NFC] Remove usernames and google bug numbers from TODO comments.
These were largely leftover from when MLIR was a google project, and don't really follow LLVM guidelines.
2020-07-07 01:40:52 -07:00
Martin Waitz 72df59d590 [mlir] resolve types from attributes in assemblyFormat
An operation can specify that an operation or result type matches the
type of another operation, result, or attribute via the `AllTypesMatch`
or `TypesMatchWith` constraints.

Use these constraints to also automatically resolve types in the
automatically generated assembly parser.
This way, only the attribute needs to be listed in `assemblyFormat`,
e.g. for constant operations.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D78434
2020-07-07 04:40:01 +00:00
Mauricio Sifontes 28a45d54a7 Create the framework and testing environment for MLIR Reduce - a tool
with the objective to reduce large test cases into smaller ones while
preserving their interesting behavior.

Implement the framework to parse the command line arguments, parse the
input MLIR test case into a module and call reduction passes on the MLIR module.

Implement the Tester class which allows the different reduction passes to test the
interesting behavior of the generated reduced variants of the test case and keep track
of the most reduced generated variant.
2020-07-07 01:59:11 +00:00
Jacques Pienaar 2a19672af5 [mlir] Change ODS to have include and exclude regex
This makes it easier to have a "remainder" include rule. And also makes it easier to read the command line flag.
2020-07-06 09:55:10 -07:00
Rahul Joshi 52af9c59e3 [MLIR] Add a NoRegionArguments trait
- This trait will verify that all regions attached to an Op have no arguments
- Fixes https://bugs.llvm.org/show_bug.cgi?id=46521 : Add trait NoRegionArguments

Differential Revision: https://reviews.llvm.org/D83016
2020-07-06 09:05:38 -07:00
Nicolas Vasilache bd87c6bce1 [mlir][Vector] Add custom slt / SCF.if folding to VectorToSCF
scf.if currently lacks folding on true / false conditionals.
Such foldings are a bit more involved than can be addressed immediately.
This revision introduces an eager folding  for lowering vector.transfer operations in the presence of unrolling.

Differential revision: https://reviews.llvm.org/D83146
2020-07-06 08:21:21 -04:00
Nicolas Vasilache 05c65dc0fe [mlir][Vector] Add a VectorUnrollInterface and expose UnrollVectorPattern.
The UnrollVectorPattern is can be used in a programmable fashion by:
```
OwningRewritePatternList patterns;
    patterns.insert<UnrollVectorPattern<AddFOp>>(ArrayRef<int64_t>{2, 2}, ctx);
    patterns.insert<UnrollVectorPattern<vector::ContractionOp>>(
        ArrayRef<int64_t>{2, 2, 2}, ctx);
    ...
    applyPatternsAndFoldGreedily(getFunction(), patterns);
```

Differential revision: https://reviews.llvm.org/D83064
2020-07-06 08:09:06 -04:00
Mehdi Amini fbc06b2280 Revert "[MLIR] Parallelize affine.for op to 1-D affine.parallel op"
This reverts commit 5f2843857f.
This broke the build when -DDBUILD_SHARED_LIBS=ON is used.
2020-07-04 20:55:47 +00:00
Yash Jain 5f2843857f [MLIR] Parallelize affine.for op to 1-D affine.parallel op
Introduce pass to convert parallel affine.for op into 1-D
affine.parallel op. Run using --affine-parallelize. Removes
test-detect-parallel: pass for checking parallel affine.for ops.

Differential Revision: https://reviews.llvm.org/D82672
2020-07-04 19:09:23 +05:30
Uday Bondhugula 6d6d5db251 [MLIR][Linalg] Generate the right type of load/store when lowering max/min pooling ops
While lowering min/max pooling ops to loops, generate the right kind of
load/stores (std or affine) instead of always generating std
load/stores.

Differential Revision: https://reviews.llvm.org/D83080
2020-07-04 14:55:02 +05:30
Julian Gross 91c320e9d8 [mlir] Add check for ViewLikeOpInterface that creates additional aliases.
ViewLikeOpInterfaces introduce new aliases that need to be added to the alias
list. This is necessary to place deallocs in the right positions.

Differential Revision: https://reviews.llvm.org/D83044
2020-07-03 16:38:21 +02:00
Ehsan Toosi 0f03b2bfda [mlir] Add redundant copy removal transform
This pass removes redundant dialect-independent Copy operations in different
situations like the following:

%from = ...
%to = ...
... (no user/alias for %to)
copy(%from, %to)
... (no user/alias for %from)
dealloc %from
use(%to)

Differential Revision: https://reviews.llvm.org/D82757
2020-07-03 15:36:25 +02:00
aartbik ee01c7a740 [mlir] [VectorOps] Add choice between dot and axpy lowering of vector.contract
Default vector.contract lowering essentially yields a series of sdot/ddot
operations. However, for some layouts a series of saxpy/daxpy operations,
chained through fma are more efficient. This CL introduces a choice between
the two lowering paths. A default heuristic is to follow.

Some preliminary avx2 performance numbers for matrix-times-vector.
Here, dot performs best for 64x64 A x b and saxpy for 64x64 A^T x b.

```
------------------------------------------------------------
            A x b                          A^T x b
------------------------------------------------------------
GFLOPS    sdot (reassoc)    saxpy    sdot (reassoc)    saxpy
------------------------------------------------------------
1x1        0.6               0.9       0.6             0.9
2x2        2.5               3.2       2.4             3.5
4x4        6.4               8.4       4.9             11.8
8x8       11.7               6.1       5.0             29.6
16x16     20.7              10.8       7.3             43.3
32x32     29.3               7.9       6.4             51.8
64x64     38.9                                         79.3
128x128   32.4                                         40.7
------------------------------------------------------------
```

Reviewed By: nicolasvasilache, ftynse

Differential Revision: https://reviews.llvm.org/D83012
2020-07-02 13:21:17 -07:00
Lei Zhang 08679af900 Revert "[MLIR][SPIRV] Support two memory access attributes in OpCopyMemory."
This reverts commit ef2f46e1f6, which
likely triggers a compiler internal error for MSVC.

Differential Revision: https://reviews.llvm.org/D83075
2020-07-02 15:57:25 -04:00
George Mitenkov 1cfaaf6455 [MLIR][SPIRVToLLVM] Convert spv.constant scalars and vectors
This patch introduces conversion pattern for `spv.constant` with scalar
and vector types. There is a special case when the constant value is a
signed/unsigned integer (vector of integers). Since LLVM dialect does not
have signedness semantics, the types had to be converted to signless ints.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82936
2020-07-02 14:26:58 -04:00
ergawy ef2f46e1f6 [MLIR][SPIRV] Support two memory access attributes in OpCopyMemory.
This commit augments spv.CopyMemory's implementation to support 2 memory
access operands. Hence, more closely following the spec. The following
changes are introduces:

- Customize logic for spv.CopyMemory serialization and deserialization.
- Add 2 additional attributes for source memory access operand.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82710
2020-07-02 13:17:22 -04:00
George Mitenkov 8119a374bc [MLIR][SPIRVToLLVM] SPIR-V function call conversion pattern
Added conversion pattern for SPIR-V `FunctionCallOp`. Based on
specification, it returns no results or a single result, so
can be mapped directly to LLVM dialect's `llvm.call`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D83030
2020-07-02 12:38:27 -04:00
George Mitenkov 03fe7eb16f [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldInsert pattern
This patch introduces conversion pattern for `spv.BitFiledInsert` op,
as well as some utility functions to facilitate code reading.
Since `spv.BitFiledInsert` may take both vector and integer operands,
this case was specifically handled by broadcasting values (`count`
and `offset` here) to vectors. Moreover, the types had to be converted
to same bitwidth in order to conform with LLVM dialect rules.
This was done with `zext` when extending (Note that `count` and
`offset` are treated as unsigned) and `trunc` in the opposite case.
For the latter one, truncation is safe since the op is defined only when
`count`/`offset`/their sum is less than the bitwidth of the result.
This introduces a natural bound of the value of 64, which can be
expressed as `i8`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D82639
2020-07-02 12:19:12 -04:00
River Riddle c59aec0ca1 [mlir][OpFormatGen] Add support for resolving variadic types from non-variadic
This enables better support for traits such as SameOperandsAndResultType, and other situations in which a variadic operand may be resolved from a non-variadic.

Differential Revision: https://reviews.llvm.org/D83011
2020-07-01 22:27:08 -07:00
Thomas Raoux 0670f855a7 [mlir][spirv] Add support for lowering scf.for scf/if with return value
This allow lowering to support scf.for and scf.if with results. As right now
spv region operations don't have return value the results are demoted to
Function memory. We create one allocation per result right before the region
and store the yield values in it. Then we can load back the value from
allocation to be able to use the results.

Differential Revision: https://reviews.llvm.org/D82246
2020-07-01 17:08:08 -07:00
Nicolas Vasilache 7d9518c800 [mlir][Linalg] Add an option to use Alloca instead of malloc/free pairs.
Summary: A relevant test is also added.

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82959
2020-07-01 09:44:01 -04:00