454ff53d58
Use ARMFunctionInfo to track number of constpool entries and jumptables.
...
llvm-svn: 58877
2008-11-08 00:51:41 +00:00
0d1e9a8e04
Switch the MachineOperand accessors back to the short names like
...
isReg, etc., from isRegister, etc.
llvm-svn: 57006
2008-10-03 15:45:36 +00:00
38453eebdc
Remove isImm(), isReg(), and friends, in favor of
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isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
llvm-svn: 56189
2008-09-13 17:58:21 +00:00
a79db30d28
Tidy up several unbeseeming casts from pointer to intptr_t.
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llvm-svn: 55779
2008-09-04 17:05:41 +00:00
3b46030375
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
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MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
llvm-svn: 53212
2008-07-07 23:14:23 +00:00
ae84bbdbed
Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
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llvm-svn: 49809
2008-04-16 20:10:13 +00:00
596875118c
rename MachineInstr::setInstrDescriptor -> setDesc
...
llvm-svn: 45871
2008-01-11 18:10:50 +00:00
03ad885039
rename TargetInstrDescriptor -> TargetInstrDesc.
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Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
a98c679de0
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
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that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
2008-01-07 01:56:04 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
5c4637816e
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
...
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
283207a71c
Eliminate the remaining uses of getTypeSize. This
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should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
llvm-svn: 43688
2007-11-05 00:04:43 +00:00
85ee72f7ba
ARM: make branch folder remove unconditional branches
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following jump tables that it earlier inserted. This
would be OK on other targets but is needed for correctness
only on ARM (constant islands needs to find jump tables).
llvm-svn: 39782
2007-07-12 16:45:35 +00:00
e59411d056
Fix hang compiling TimberWolf (allow for islands
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of size other than 4).
llvm-svn: 39743
2007-07-11 18:32:38 +00:00
94579dbd2e
Didn't mean the last commit. Revert.
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llvm-svn: 38515
2007-07-10 22:00:16 +00:00
effa7467b6
Update.
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llvm-svn: 38513
2007-07-10 21:49:47 +00:00
94f04c6fc9
Reflects the chanegs made to PredicateOperand.
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llvm-svn: 37898
2007-07-05 07:18:20 +00:00
c95f95b6da
Fix comment.
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llvm-svn: 37098
2007-05-16 05:14:06 +00:00
0f7cbe8370
Add PredicateOperand to all ARM instructions that have the condition field.
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llvm-svn: 37066
2007-05-15 01:29:07 +00:00
8c78a0bff0
Drop 'const'
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llvm-svn: 36662
2007-05-03 01:11:54 +00:00
e95c6ad802
Use 'static const char' instead of 'static const int'.
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
2007-05-02 21:39:20 +00:00
09f162ca6a
Do not use typeinfo to identify pass in pass manager.
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llvm-svn: 36632
2007-05-01 21:15:47 +00:00
4a00cf3fc4
Rewrite of Thumb constant islands handling (exact allowance for padding
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around islands and jump tables).
llvm-svn: 36573
2007-04-29 19:19:30 +00:00
559c546453
Doh. ARM::LEApcrel is a single instruction MI.
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llvm-svn: 36513
2007-04-27 18:27:13 +00:00
d9990f061f
Special handling of LEApcrel and tLEApcrel.
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llvm-svn: 36504
2007-04-27 08:14:15 +00:00
fdfb757682
Make Thumb funcs containing islands 4-byte aligned. Fix bugs maintaining
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BBOffsets and BBSizes when adjusting conditional branches.
llvm-svn: 36372
2007-04-23 20:09:04 +00:00
3c68d4e8ba
Remove unused constant pool entries.
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llvm-svn: 35635
2007-04-03 23:39:48 +00:00
d13786dd82
fix off by 1 error in displacement computation
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llvm-svn: 35602
2007-04-02 20:31:06 +00:00
6f059e3e0a
- Track which callee-saved registers are spilled.
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- Some code clean up.
llvm-svn: 34783
2007-03-01 08:26:31 +00:00
962fa8eb9a
Changes requested in review of last pass. Also pulled isThumb into a
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member, instead of resetting in every function that uses it.
llvm-svn: 34764
2007-02-28 23:20:38 +00:00
440995bd9a
Add intelligence about where to break large blocks.
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llvm-svn: 34755
2007-02-28 18:41:23 +00:00
c2f3d015e0
cosmetic changes from review of last patch. obvious
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llvm-svn: 34598
2007-02-25 18:31:31 +00:00
e80e31eada
remove crediting of Evan Cheng and me.
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llvm-svn: 34568
2007-02-25 01:42:36 +00:00
01ee5750f4
Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this
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from README.
When no water available, use end of block if in range. (More to do here.)
llvm-svn: 34563
2007-02-25 00:47:03 +00:00
e18b13b213
rewrite of constant islands
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llvm-svn: 34523
2007-02-23 05:02:36 +00:00
540f5e0d41
These vectors are frequently large. Use std::vector instead.
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llvm-svn: 34109
2007-02-09 23:59:14 +00:00
8b7700f146
Add reference counting to constantpool entries. Delete the unused ones.
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llvm-svn: 34105
2007-02-09 20:54:44 +00:00
36d559d369
- Branch max. displacement calculation bug.
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- Add debugging info.
llvm-svn: 33811
2007-02-03 02:08:34 +00:00
d9d94700a4
Use MBB.empty() instead of MBB.size() for speed.
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llvm-svn: 33789
2007-02-02 19:09:19 +00:00
3ad22567b3
Watch out for empty BB.
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llvm-svn: 33788
2007-02-02 18:49:02 +00:00
fd522996c8
Pasto. Lots of it.
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llvm-svn: 33762
2007-02-01 20:44:52 +00:00
f9a4c690de
- Off by one bugs in maximum displacement calculation / testing.
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- In thumb mode, a new constpool island BB size should be 4 + 2 to
compensate for the potential padding due to alignment requirement.
llvm-svn: 33753
2007-02-01 10:16:15 +00:00
234e031e36
Pessmistically assume the .align 2 before the first constpool entry adds
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two bytes padding.
llvm-svn: 33734
2007-02-01 01:09:47 +00:00
e5c19993cd
Handle an interesting corner case: the constpool_entry being reference is two
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instructions away, i.e. its address is equal to PC.
%r0 = tLDRpci <cp#0>
bx
CONSTPOOL_ENTRY 0 <cp#0>, 4
llvm-svn: 33728
2007-01-31 23:35:18 +00:00
1f3fc4b3f0
When determining whether a pc relative branch / load displacement fits in the
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instruction field, adjust it for PC value (4 for thumb, 8 for arm).
llvm-svn: 33711
2007-01-31 19:57:44 +00:00
7169bd8784
Some comments.
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llvm-svn: 33707
2007-01-31 18:29:27 +00:00
456928bbbc
ConstPool island bug: watch out for cases where UserMI is the last MI of the BB.
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llvm-svn: 33706
2007-01-31 18:19:07 +00:00
345877e77c
- Added Thumb constpool island support.
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- Islands are inserted right after the user MI since thumb LDR cannot encode
negative offset.
llvm-svn: 33690
2007-01-31 02:22:22 +00:00
7fa6964dc2
- In thumb mode, if size of MachineFunction is >= 2048, force LR to be
...
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
in thumb mode so it can be clobbered if it is properly spilled / restored
in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
spill by:
push lr -> delete
pop pc -> bx lr
llvm-svn: 33650
2007-01-30 01:18:38 +00:00
760c68b8af
Factor GetInstSize() out of constpool island pass.
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llvm-svn: 33644
2007-01-29 23:45:17 +00:00
0701c5a074
Thumb jumptable support.
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llvm-svn: 33568
2007-01-27 02:29:45 +00:00
3c9dc6bd46
Conditional branch being fixed up is not the last MI in the BB, there is a
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unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b L2
=>
bne L2
b L1
llvm-svn: 33548
2007-01-26 20:38:26 +00:00
f9e5445ed4
Make LABEL a builtin opcode.
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llvm-svn: 33537
2007-01-26 14:34:52 +00:00
1e270b639d
SplitBlockBeforeInstr() insert a unconditional branch to the next BB. This
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is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.
llvm-svn: 33517
2007-01-26 02:02:39 +00:00
db7f0591f3
Need to scan the function for branches even if there aren't any constants.
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llvm-svn: 33515
2007-01-26 01:04:44 +00:00
1d138989f4
Forgot to update this.
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llvm-svn: 33512
2007-01-25 23:31:04 +00:00
010ae386b8
Add comment, fix typo, reduce memory usage, etc.
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llvm-svn: 33510
2007-01-25 23:18:59 +00:00
417260dc11
Doh. Skip JT branches.
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llvm-svn: 33501
2007-01-25 19:43:52 +00:00
22c7cf504e
Added (preliminary) branch shortening capability to constantpool island pass.
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llvm-svn: 33497
2007-01-25 03:12:46 +00:00
1526ba50d9
Use PC relative ldr to load from a constantpool in Thumb mode.
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llvm-svn: 33484
2007-01-24 08:53:17 +00:00
10043e215b
ARM backend contribution from Apple.
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llvm-svn: 33353
2007-01-19 07:51:42 +00:00
Evan Cheng