83d9b62b28
Add some comments to the backtracking code.
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llvm-svn: 15200
2004-07-25 08:10:33 +00:00
cf72e7f854
Change std::map<unsigned, LiveInterval*> into a std::map<unsigned,
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LiveInterval>. This saves some space and removes the pointer
indirection caused by following the pointer.
llvm-svn: 15167
2004-07-24 11:44:15 +00:00
c51866a20e
Completely eliminate the intervals_ list. instead, the r2iMap_ maintains
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ownership of the intervals.
llvm-svn: 15155
2004-07-24 03:32:06 +00:00
856383326a
Rename LiveIntervals.(cpp|h) -> LiveIntervalAnalysis.(cpp|h)
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llvm-svn: 15135
2004-07-23 17:56:30 +00:00
1a876fab64
Some compile time improvements resulting in a 1sec speedup in the 5sec
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compilation of gcc:
* Use vectors instead of lists for the intervals sets
* Use a heap for the unhandled set to keep intervals always sorted and
makes insertions back to the heap very fast (compared to scanning a
list)
llvm-svn: 15103
2004-07-22 08:14:44 +00:00
902dcf0729
These files don't need to include <iostream> since they include "Support/Debug.h".
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llvm-svn: 15089
2004-07-21 20:50:33 +00:00
12a71ea03e
Remove dead code.
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llvm-svn: 15011
2004-07-19 23:35:55 +00:00
8c8144b958
Fix assertion to not dereference end!
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llvm-svn: 14991
2004-07-19 05:02:09 +00:00
70f8dca59b
Add some asserts that the list of intervals returned by addIntervalsForSpills
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is sorted. This is not the case currently, which is causing no end of
problems.
llvm-svn: 14990
2004-07-19 04:47:36 +00:00
21b3a5b0de
Correctly compute the ration of iterations/#intervals.
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llvm-svn: 14626
2004-07-04 17:23:35 +00:00
8f3cc0316c
Add efficiency statistic.
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llvm-svn: 14590
2004-07-04 07:59:06 +00:00
4fbff990b0
Rename Interval class to LiveInterval to avoid conflicting with the already
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existing llvm::Interval class.
Patch contributed by Vladimir Prus!
http://mail.cs.uiuc.edu/pipermail/llvmbugs/2004-June/000710.html
llvm-svn: 14281
2004-06-21 13:10:56 +00:00
fbe799cfa2
Pull Interval class out of LiveIntervals.
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llvm-svn: 13910
2004-05-30 07:46:27 +00:00
a5268e8199
When spilling an register, introduce a new temporary for each of its
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spills. This allows for more flexibility when allocating registers for
spill code.
llvm-svn: 13907
2004-05-30 07:24:39 +00:00
2a54b5d3e1
Add required header
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llvm-svn: 13417
2004-05-08 03:50:03 +00:00
991425ae70
numeric_limits::infinity() apparently does not work on all systems. As a
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workaround, use the C HUGE_VAL macro instead.
llvm-svn: 13377
2004-05-06 16:25:59 +00:00
02a5354d9b
Make the set of fixed (preallocated) intervals be a fixed superset of
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unhandled + handled. So unhandled is now including all fixed intervals
and fixed intervals never changes when processing a function.
llvm-svn: 12462
2004-03-17 00:48:59 +00:00
31953c7a10
Add a spiller option to llc. A simple spiller will come soon. When we get CFG in the machine code represenation a global spiller will also be possible. Also document the linear scan register allocator but mark it as experimental for now.
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llvm-svn: 12062
2004-03-01 23:18:15 +00:00
b76d234ee9
Add the long awaited memory operand folding support for linear scan
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llvm-svn: 12058
2004-03-01 20:05:10 +00:00
e669caafe0
Rename member function to be consistent with the rest.
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llvm-svn: 11898
2004-02-27 06:11:15 +00:00
a9f03fba9d
Remove asssert since it is breaking cases that it shouldn't.
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llvm-svn: 11841
2004-02-25 22:01:06 +00:00
f5a393a133
Add an assertion
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llvm-svn: 11830
2004-02-25 19:37:44 +00:00
1dd872ce94
Move machine code rewriter and spiller outside the register
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allocator.
The implementation is completely rewritten and now employs several
optimizations not exercised before. For example for 164.gzip we have
997 loads and 699 stores vs the 1221 loads and 880 stores we have
before.
llvm-svn: 11798
2004-02-24 08:58:30 +00:00
ab77b05d8c
Remove '4Virt' from member function names as it is obvious.
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llvm-svn: 11781
2004-02-23 23:47:10 +00:00
c794a9060f
Refactor VirtRegMap out of RegAllocLinearScan as the first part of bug
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251 (providing a generic machine code rewriter/spiller).
llvm-svn: 11780
2004-02-23 23:08:11 +00:00
52de9e214c
Add number of spilled registers statistic.
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llvm-svn: 11759
2004-02-23 18:45:32 +00:00
d780ce6462
Remove implementation of default constructor as it is useless now.
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llvm-svn: 11755
2004-02-23 18:28:35 +00:00
f83cb74b57
Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr
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llvm-svn: 11738
2004-02-23 06:10:13 +00:00
d42c2f24ec
Fix comments in PhysRegTracker and rename isPhysRegAvail to isRegAvail to be consistent with the other two
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llvm-svn: 11723
2004-02-23 01:25:05 +00:00
1410859484
Pull PhysRegTracker out of RegAllocLinearScan as it can be used by other allocators as well
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llvm-svn: 11720
2004-02-23 00:53:31 +00:00
486b12b71a
Move LiveIntervals.h to lib/CodeGen since it shouldn't be exposed to other parts of the compiler
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llvm-svn: 11719
2004-02-23 00:50:15 +00:00
cb352300c9
Print basic block boundaries in machine instruction debug output.
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llvm-svn: 11704
2004-02-22 05:46:04 +00:00
22de21ea80
Fix crash in debug output.
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llvm-svn: 11659
2004-02-20 06:41:12 +00:00
bcc99a83ee
Fix instruction numbering in debug output.
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llvm-svn: 11655
2004-02-20 06:29:51 +00:00
76eca062ea
Too many changes in one commit:
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1. LiveIntervals now implement a 4 slot per instruction model. Load,
Use, Def and a Store slot. This is required in order to correctly
represent caller saved register clobbering on function calls,
register reuse in the same instruction (def resues last use) and
also spill code added later by the allocator. The previous
representation (2 slots per instruction) was insufficient and as a
result was causing subtle bugs.
2. Fixes in spill code generation. This was the major cause of
failures in the test suite.
3. Linear scan now has core support for folding memory operands. This
is untested and not enabled (the live interval update function does
not attempt to fold loads/stores in instructions).
4. Lots of improvements in the debugging output of both live intervals
and linear scan. Give it a try... it is beautiful :-)
In summary the above fixes all the issues with the recent reserved
register elimination changes and get the allocator very close to the
next big step: folding memory operands.
llvm-svn: 11654
2004-02-20 06:15:40 +00:00
3cf546037e
Fix RA::verifyAssignment()
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llvm-svn: 11629
2004-02-19 19:24:17 +00:00
d0a60b71fc
Rename reloads/spills to loads/stores.
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llvm-svn: 11619
2004-02-19 06:19:09 +00:00
b490a12501
Implement assignment correctness verification.
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llvm-svn: 11609
2004-02-18 23:15:23 +00:00
2c5ddd20ba
Eliminate the use of spill (reserved) registers.
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llvm-svn: 11476
2004-02-15 10:24:21 +00:00
ddcb4ad53e
Use std::numeric_limits<float>::infinity() instead of
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std::numeric_limits<float>::max() for weighting preallocated
intervals.
llvm-svn: 11427
2004-02-14 00:44:07 +00:00
8cdd0215bf
Remove getAllocatedRegNum(). Use getReg() instead.
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llvm-svn: 11393
2004-02-13 21:01:20 +00:00
80da865f77
Change MachineBasicBlock's vector of MachineInstr pointers into an
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ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
2004-02-12 02:27:10 +00:00
5dd5be3ec3
Do not use MachineOperand::isVirtualRegister either!
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llvm-svn: 11283
2004-02-10 21:12:22 +00:00
e82a70766e
Increase code clarity.
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llvm-svn: 11151
2004-02-06 18:08:18 +00:00
cd2e7ffcc6
Eliminate uneeded lookups by passing a Virt2PhysMap::iterator instead
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of the virtual register to certain functions.
llvm-svn: 11143
2004-02-06 03:15:40 +00:00
327426411e
Modify the two address instruction pass to remove the duplicate
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operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
2004-02-04 22:17:40 +00:00
3d100ef0ca
When an instruction like: A += B had both A and B virtual registers
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spilled, A was loaded from its stack location twice. This fixes the bug.
llvm-svn: 11093
2004-02-03 01:13:07 +00:00
6e34205653
Fix debugging output.
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llvm-svn: 11088
2004-02-02 22:00:32 +00:00
2cecace9b2
Create an object for tracking physical register usage. This will look
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much better when I get rid of the reserved registers.
llvm-svn: 11066
2004-02-02 07:30:36 +00:00
9b9c0485fd
Change weight array into a vector and make it as big as the number of
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registers (not as the max number of registers).
Change toSpill from a std::set into a std::vector<bool>.
Use the reverse iterator adapter to do a reverse scan of allocatable
registers.
llvm-svn: 11061
2004-02-01 20:13:26 +00:00
Alkis Evlogimenos