Commit Graph

87412 Commits

Author SHA1 Message Date
Akira Hatanaka db49b39200 [mips] Set isCommutable flag in a more explicit way.
llvm-svn: 170060
2012-12-13 00:46:23 +00:00
Akira Hatanaka 193e1f738a [mips] Remove fmt from the parameter list of classes FMADDSUB and FNMADDSUB.
llvm-svn: 170057
2012-12-13 00:38:59 +00:00
Akira Hatanaka caaf4dd516 [mips] Remove single-precision floating point instruction from multiclass
FFR2P_M.
 

llvm-svn: 170055
2012-12-13 00:35:54 +00:00
Akira Hatanaka 02ec5516f8 [mips] Move class IsCommutable into MipsInstrInfo.td.
llvm-svn: 170054
2012-12-13 00:32:01 +00:00
Akira Hatanaka e986a59ad9 [mips] Remove single-precision floating point instructions from multiclasses
FFR1_W_M and FFR1P_M. The new instruction definitions have one-to-one
correspondence with the instructions in the ISA manual.
 

llvm-svn: 170053
2012-12-13 00:29:29 +00:00
Eli Bendersky b2022f3a5a Fix a bogus comment
llvm-svn: 170052
2012-12-13 00:24:56 +00:00
Nadav Rotem 36510f7194 Teach the cost model about the optimization in r169904: Truncation of induction variables costs the same as scalar trunc.
llvm-svn: 170051
2012-12-13 00:21:03 +00:00
Chad Rosier e28ae30a8e Typo.
llvm-svn: 170050
2012-12-13 00:18:46 +00:00
Pedro Artigas 7212ee4534 Make the MCStreamer have a reset method and call that after finalization of the asm printer,
also changed MCContext to a single reset only method for simplicity as requested on the list

llvm-svn: 170041
2012-12-12 22:59:46 +00:00
Chad Rosier 149e8e042f [ms-inline asm] Make sure we fail gracefully on parse errors. Parse errors
should only occur on invalid input.  Instruction matching errors aren't
unexpected, so we can't rely on the AsmParsers HadError variable directly.
rdar://12840278

llvm-svn: 170037
2012-12-12 22:45:52 +00:00
Benjamin Kramer 36b0f12474 YAMLIO: Remove all of the template instantiation hacks, I don't see why they're necessary and it breaks linking of the unit tests.
Also comes with a clang-format run on the cpp file, it had major style violations.

llvm-svn: 170036
2012-12-12 22:40:02 +00:00
Nick Kledzik 808f84d35e Temporarily disable test cases until they compile with g++ too.
llvm-svn: 170035
2012-12-12 22:39:45 +00:00
David Blaikie b088ff6617 Unbreak the build. Fallout from r170019.
llvm-svn: 170033
2012-12-12 22:14:32 +00:00
Nick Kledzik 323bcb9eb9 AlignedCharArrayUnion is erroring with non-clang compilers
llvm-svn: 170031
2012-12-12 22:03:57 +00:00
Nick Kledzik f54b15a86d Fix calls to getAsSignedInteger() to use long long - not int64_t
llvm-svn: 170030
2012-12-12 21:42:49 +00:00
Dmitri Gribenko aa0e77cf24 Makefile.sphinx: reST conversion is complete!
No need to copy HTML files anymore.

llvm-svn: 170029
2012-12-12 21:35:43 +00:00
Dmitri Gribenko 508d98f67f Documentation: use paths relative to document root in links.
llvm-svn: 170027
2012-12-12 21:16:29 +00:00
Jakub Staszak c6ecd7deba Fix typo, which prevent test from being check.
llvm-svn: 170025
2012-12-12 21:10:56 +00:00
Michael Ilseman 3c814128cd Restore the PHI optimization I accidently removed
llvm-svn: 170024
2012-12-12 20:59:36 +00:00
Jakub Staszak a3619d31d8 unHECKify test fixed by Jacob in r159003.
llvm-svn: 170023
2012-12-12 20:58:42 +00:00
Michael Ilseman 9fc0f258fa Remove trailing whitespace
llvm-svn: 170022
2012-12-12 20:57:53 +00:00
Benjamin Kramer cbe058412a Fix the build on case sensitive file systems.
llvm-svn: 170021
2012-12-12 20:55:44 +00:00
David Majnemer 5226aa94ce Simplify negated bit test
llvm-svn: 170020
2012-12-12 20:48:54 +00:00
Nick Kledzik f60a9279ea Initial implementation of a utility for converting native data
structures to and from YAML using traits.  The first client will
be the test suite of lld.  The documentation will show up at:

   http://llvm.org/docs/YamlIO.html

llvm-svn: 170019
2012-12-12 20:46:15 +00:00
Evan Cheng b7d3d03bf9 Fix a logic bug in inline expansion of memcpy / memset with an overlapping
load / store pair. It's not legal to use a wider load than the size of
the remaining bytes if it's the first pair of load / store.

llvm-svn: 170018
2012-12-12 20:43:23 +00:00
Jakub Staszak 0a74fc8d6c unHECKify test. It was fixed by Chris in 2009.
llvm-svn: 170017
2012-12-12 20:43:00 +00:00
Bill Schmidt 25ffd19502 The ordering of two relocations on the same instruction is apparently not
predictable when compiled on at least one non-PowerPC host.  Source of
nondeterminism not apparent.  Restrict the test to build on PowerPC hosts
for now while looking into the issue further.

llvm-svn: 170016
2012-12-12 20:29:20 +00:00
Jakub Staszak aee9cca331 Fix typo in test-case.
llvm-svn: 170015
2012-12-12 20:29:06 +00:00
Akira Hatanaka 7bc144c366 [mips] Fix a memory leak bug report by NAKAMURA Takumi.
llvm-svn: 170012
2012-12-12 20:09:58 +00:00
Dmitri Gribenko f8bb4eadca Documentation: SphinxQuickstartTemplate.rst: add guidelines about highlighting
console sessions and add more highlighter names.

llvm-svn: 170011
2012-12-12 20:07:18 +00:00
Eli Bendersky e11ab3aafe Make naming consistent, add comments and sanity asserts
llvm-svn: 170007
2012-12-12 19:54:05 +00:00
Jakub Staszak 67bf76ebbc Fix typo.
llvm-svn: 170006
2012-12-12 19:47:04 +00:00
Nadav Rotem 6027bdf898 Fix indentation.
llvm-svn: 170005
2012-12-12 19:39:36 +00:00
Nadav Rotem d0bb22bba3 LoopVectorizer: Use the "optsize" attribute to decide if we are allowed to increase the function size.
llvm-svn: 170004
2012-12-12 19:29:45 +00:00
Bill Schmidt 24b8dd6eb7 This patch implements local-dynamic TLS model support for the 64-bit
PowerPC target.  This is the last of the four models, so we now have 
full TLS support.

This is mostly a straightforward extension of the general dynamic model.
I had to use an additional Chain operand to tie ADDIS_DTPREL_HA to the
register copy following ADDI_TLSLD_L; otherwise everything above the
ADDIS_DTPREL_HA appeared dead and was removed.

As before, there are new test cases to test the assembly generation, and
the relocations output during integrated assembly.  The expected code
gen sequence can be read in test/CodeGen/PowerPC/tls-ld.ll.

There are a couple of things I think can be done more efficiently in the
overall TLS code, so there will likely be a clean-up patch forthcoming;
but for now I want to be sure the functionality is in place.

Bill

llvm-svn: 170003
2012-12-12 19:29:35 +00:00
Bill Wendling 623d8ceb08 Kerning.
llvm-svn: 170002
2012-12-12 19:21:53 +00:00
Dmitri Gribenko 28574d36aa Documentation: llvm-bcanalyzer.rst: cleanup.
llvm-svn: 170001
2012-12-12 19:15:53 +00:00
Dmitri Gribenko 3fa700f17d Documentation: AliasAnalysis.rst: improve internal and external links
llvm-svn: 169993
2012-12-12 17:03:50 +00:00
Dmitri Gribenko 11ffe2c47e Documentation: convert WritingAnLLVMPass.html to reST.
Patch by Anthony Mykhailenko with small fixes by me.

llvm-svn: 169992
2012-12-12 17:02:44 +00:00
Dmitri Gribenko 427cfcb937 Documentation: cleanup
llvm-svn: 169990
2012-12-12 16:58:13 +00:00
Rafael Espindola e40238069e The TargetData is not used for the isPowerOfTwo determination. It has never
been used in the first place.  It simply was passed to the function and to the
recursive invocations.  Simply drop the parameter and update the callers for the
new signature.

Patch by Saleem Abdulrasool!

llvm-svn: 169988
2012-12-12 16:52:40 +00:00
Alexey Samsonov 3d43b63a6e Improve debug info generated with enabled AddressSanitizer.
When ASan replaces <alloca instruction> with
<offset into a common large alloca>, it should also patch
llvm.dbg.declare calls and replace debug info descriptors to mark
that we've replaced alloca with a value that stores an address
of the user variable, not the user variable itself.

See PR11818 for more context.

llvm-svn: 169984
2012-12-12 14:31:53 +00:00
Dmitri Gribenko 99e8b43498 Documentation: use a 'console' highlighter for terminal output examples. This
gives a nicer output than 'bash'.

llvm-svn: 169981
2012-12-12 14:23:14 +00:00
Dmitri Gribenko 125939cbf7 Documentation: use a 'console' highlighter for terminal output examples. This
gives a nicer output than 'bash'.

llvm-svn: 169979
2012-12-12 13:56:37 +00:00
NAKAMURA Takumi be230b8fdb llvm/test/CodeGen/X86/atom-bypass-slow-division.ll: Fix possible typo(s) in CHECK-NOT lines.
Found by Alexander Zinenko, thanks!

llvm-svn: 169978
2012-12-12 13:34:20 +00:00
NAKAMURA Takumi cae5321a3b llvm/test/CodeGen/X86/atom-bypass-slow-division.ll: Rename symbols, s/test_/Test/g, not to mismatch "CHECK(-NOT): test".
llvm-svn: 169977
2012-12-12 13:34:14 +00:00
Logan Chien 4dd14fb5eb Add ARM NONE and PREL31 relocation types.
Add R_ARM_NONE and R_ARM_PREL31 relocation types
to MCExpr.  Both of them will be used while
generating .ARM.extab and .ARM.exidx sections.

llvm-svn: 169965
2012-12-12 07:14:46 +00:00
Rafael Espindola 07cc84876e Remove some dead code.
llvm-svn: 169963
2012-12-12 06:18:15 +00:00
NAKAMURA Takumi 85292a1338 [CMake] Fixup R600.
llvm-svn: 169962
2012-12-12 03:34:26 +00:00
Evan Cheng 962711ee71 Sorry about the churn. One more change to getOptimalMemOpType() hook. Did I
mention the inline memcpy / memset expansion code is a mess?

This patch split the ZeroOrLdSrc argument into two: IsMemset and ZeroMemset.
The first indicates whether it is expanding a memset or a memcpy / memmove.
The later is whether the memset is a memset of zero. It's totally possible
(likely even) that targets may want to do different things for memcpy and
memset of zero.

llvm-svn: 169959
2012-12-12 02:34:41 +00:00
NAKAMURA Takumi 69d1405e48 llvm/test/CodeGen/X86/store_op_load_fold.ll: Fix typo, s/CHECK_NEXT/CHECK-NEXT/
llvm-svn: 169957
2012-12-12 01:41:01 +00:00
NAKAMURA Takumi 01ac65af00 llvm/test/CodeGen/X86/store_op_load_fold.ll: Add explicit triple.
llvm-svn: 169956
2012-12-12 01:40:56 +00:00
Nadav Rotem 6798a04b15 Fix the ascii drawing that was ruined when I split the H and CPP
llvm-svn: 169955
2012-12-12 01:33:47 +00:00
Evan Cheng c3d1aca657 - Rename isLegalMemOpType to isSafeMemOpType. "Legal" is a very overloade term.
Also added more comments to explain why it is generally ok to return true.
- Rename getOptimalMemOpType argument IsZeroVal to ZeroOrLdSrc. It's meant to
be true for loaded source (memcpy) or zero constants (memset). The poor name
choice is probably some kind of legacy issue.

llvm-svn: 169954
2012-12-12 01:32:07 +00:00
Nadav Rotem 4fa2e3d5af fix a typo.
llvm-svn: 169953
2012-12-12 01:31:10 +00:00
Manman Ren 82751a105c DAGCombine: clamp hi bit in APInt::getBitsSet to avoid assertion
rdar://12838504

llvm-svn: 169951
2012-12-12 01:13:50 +00:00
Nadav Rotem aeb17df802 LoopVectorizer: When -Os is used, vectorize only loops that dont require a tail loop. There is no testcase because I dont know of a way to initialize the loop vectorizer pass without adding an additional hidden flag.
llvm-svn: 169950
2012-12-12 01:11:46 +00:00
Evan Cheng 04e5518783 Avoid using lossy load / stores for memcpy / memset expansion. e.g.
f64 load / store on non-SSE2 x86 targets.

llvm-svn: 169944
2012-12-12 00:42:09 +00:00
Michael Ilseman d2b05e59b5 Have SimplifyBinOp call the new FAdd/FSub/FMul helpers, with fast-math flags off
llvm-svn: 169943
2012-12-12 00:29:16 +00:00
Shuxin Yang 81b3678564 - Fix a problematic way in creating all-the-1 APInt.
- Propagate "exact" bit of [l|a]shr instruction.

llvm-svn: 169942
2012-12-12 00:29:03 +00:00
Michael Ilseman d5787be5ba Remove redunant optimizations from InstCombine, instead call the appropriate functions from SimplifyInstruction
llvm-svn: 169941
2012-12-12 00:28:32 +00:00
Michael Ilseman bb6f691b01 Added a slew of SimplifyInstruction floating-point optimizations, many of which take advantage of fast-math flags. Test cases included.
fsub X, +0 ==> X
  fsub X, -0 ==> X, when we know X is not -0
  fsub +/-0.0, (fsub -0.0, X) ==> X
  fsub nsz +/-0.0, (fsub +/-0.0, X) ==> X
  fsub nnan ninf X, X ==> 0.0
  fadd nsz X, 0 ==> X
  fadd [nnan ninf] X, (fsub [nnan ninf] 0, X) ==> 0
    where nnan and ninf have to occur at least once somewhere in this expression
  fmul X, 1.0 ==> X

llvm-svn: 169940
2012-12-12 00:27:46 +00:00
Michael Ilseman 5cd69b4ce3 Pattern matchers for floating point values
m_ConstantFP - match and bind a float constant
m_SpecificConstantFP - match a specific floating point value or vector of floats of that value
m_FPOne - match a floating point 1.0 or vector of 1.0s
m_NegZero - match -0.0
m_AnyZero - match 0 or -0.0

llvm-svn: 169939
2012-12-12 00:23:43 +00:00
Michael Ilseman d9d61793e6 Remove FIXMEs surrounding Constant[Data]Vectors, instead
llvm-svn: 169938
2012-12-12 00:21:43 +00:00
Jim Grosbach 647c702780 Trim unneeded header #include.
llvm-svn: 169933
2012-12-11 23:39:51 +00:00
Dmitri Gribenko 134f76a2bc Documentation: cleanup: remove useless anchors and write :ref:s explicitly.
llvm-svn: 169932
2012-12-11 23:35:23 +00:00
Jim Grosbach 0ddedcc560 ARM: Remove old testing option.
Pre-regalloc frame allocation and referencing has been on by default
for ages. No need for the testing option that disables it.

llvm-svn: 169931
2012-12-11 23:31:12 +00:00
Jim Grosbach 1197889c44 ARM: Remove old testing options.
Base pointer referencing has been enabled for ages.

llvm-svn: 169930
2012-12-11 23:31:10 +00:00
Evan Cheng eb54240dc2 Replace TargetLowering::isIntImmLegal() with
ScalarTargetTransformInfo::getIntImmCost() instead. "Legal" is a poorly defined
term for something like integer immediate materialization. It is always possible
to materialize an integer immediate. Whether to use it for memcpy expansion is
more a "cost" conceern.

llvm-svn: 169929
2012-12-11 23:26:14 +00:00
Dmitri Gribenko a2d35d153f Documentation: Lexicon.rst: add 'SLP' acronym
llvm-svn: 169928
2012-12-11 23:13:23 +00:00
Nadav Rotem f707bf4ca3 PR14574. Fix a bug in the code that calculates the mask the converted PHIs in if-conversion.
llvm-svn: 169916
2012-12-11 21:30:14 +00:00
Tom Stellard 75aadc2813 Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
2012-12-11 21:25:42 +00:00
Bill Schmidt c56f1d34bc This patch implements the general dynamic TLS model for 64-bit PowerPC.
Given a thread-local symbol x with global-dynamic access, the generated
code to obtain x's address is:

     Instruction                            Relocation            Symbol
  addis ra,r2,x@got@tlsgd@ha           R_PPC64_GOT_TLSGD16_HA       x
  addi  r3,ra,x@got@tlsgd@l            R_PPC64_GOT_TLSGD16_L        x
  bl __tls_get_addr(x@tlsgd)           R_PPC64_TLSGD                x
                                       R_PPC64_REL24           __tls_get_addr
  nop
  <use address in r3>

The implementation borrows from the medium code model work for introducing
special forms of ADDIS and ADDI into the DAG representation.  This is made
slightly more complicated by having to introduce a call to the external
function __tls_get_addr.  Using the full call machinery is overkill and,
more importantly, makes it difficult to add a special relocation.  So I've
introduced another opcode GET_TLS_ADDR to represent the function call, and
surrounded it with register copies to set up the parameter and return value.

Most of the code is pretty straightforward.  I ran into one peculiarity
when I introduced a new PPC opcode BL8_NOP_ELF_TLSGD, which is just like
BL8_NOP_ELF except that it takes another parameter to represent the symbol
("x" above) that requires a relocation on the call.  Something in the 
TblGen machinery causes BL8_NOP_ELF and BL8_NOP_ELF_TLSGD to be treated
identically during the emit phase, so this second operand was never
visited to generate relocations.  This is the reason for the slightly
messy workaround in PPCMCCodeEmitter.cpp:getDirectBrEncoding().

Two new tests are included to demonstrate correct external assembly and
correct generation of relocations using the integrated assembler.

Comments welcome!

Thanks,
Bill

llvm-svn: 169910
2012-12-11 20:30:11 +00:00
Eric Christopher d692c1dbb7 Update some comments.
llvm-svn: 169907
2012-12-11 19:42:09 +00:00
Nadav Rotem e266efb70b Loop Vectorize: optimize the vectorization of trunc(induction_var). The truncation is now done on scalars.
llvm-svn: 169904
2012-12-11 18:58:10 +00:00
Eli Bendersky 0f74f173f7 Remove the RelaxAll overrule in MCAssembler::fixupNeedsRelaxation,
because that method is only getting called for MCInstFragment. These
fragments aren't even generated when RelaxAll is set, which is why the
flag reference here is superfluous. Removing it simplifies the code
with no harmful effects.

An assertion is added higher up to make sure this path is never
reached.

llvm-svn: 169886
2012-12-11 17:16:00 +00:00
Rafael Espindola a92da5b34f Use an ArrayRef instead of a std::vector&.
llvm-svn: 169881
2012-12-11 16:36:02 +00:00
Joel Jones 24e440d045 Add comment for load folding
llvm-svn: 169880
2012-12-11 16:10:25 +00:00
Dmitri Gribenko ed4325f7ac Documentation: convert Passes.html to reST.
Since now we have an autogenerated TOC, a manually written table of all passes
was removed.

Patch by Anthony Mykhailenko with small fixes by me.

llvm-svn: 169867
2012-12-11 15:29:37 +00:00
NAKAMURA Takumi e55382ea55 llvm/test/TableGen: Remove XFAIL:vg_leak in dozen of tests, according to llvm-x86_64-linux-vg_leak.
llvm-svn: 169862
2012-12-11 13:14:16 +00:00
Evgeniy Stepanov d2bd319adc [msan] Use explicitely aligned stores and loads with function argument shadow.
Use explicitely aligned store and load instructions to deal with argument and
retval shadow. This matters when an argument's alignment is higher than
__msan_param_tls alignment (which is the case with __m128i).

llvm-svn: 169859
2012-12-11 12:34:09 +00:00
Patrik Hagglund e98b7a0389 Revert EVT->MVT changes, r169836-169851, due to buildbot failures.
llvm-svn: 169854
2012-12-11 11:14:33 +00:00
Chandler Carruth 7ec41c7827 Holding my nose and moving the accumulation routine to GEPOperator
instead of the instruction. I've left a forwarding wrapper for the
instruction so users with the instruction don't need to create
a GEPOperator themselves.

This lets us remove the copy of this code in instsimplify.

I've looked at most of the other copies of similar code, and this is the
only one I've found that is actually exactly the same. The one in
InlineCost is very close, but it requires re-mapping non-constant
indices through the cost analysis value simplification map. I could add
direct support for this to the generic routine, but it seems overly
specific.

llvm-svn: 169853
2012-12-11 11:05:15 +00:00
Chandler Carruth 1e14053d84 Hoist the GEP constant address offset computation to a common home on
the GEP instruction class.

This is part of the continued refactoring and cleaning of the
infrastructure used by SROA. This particular operation is also done in
a few other places which I'll try to refactor to share this
implementation.

llvm-svn: 169852
2012-12-11 10:29:10 +00:00
Patrik Hagglund b31465b09b Change RegVT in BitTestBlock and RegsForValue, to contain MVTs,
instead of EVTs.

llvm-svn: 169851
2012-12-11 10:24:48 +00:00
Patrik Hagglund ad432a8e70 Change TargetLowering::getTypeForExtArgOrReturn to take and return
MVTs, instead of EVTs.

Accordingly, add bitsLT (and similar) to MVT.

llvm-svn: 169850
2012-12-11 10:20:51 +00:00
Patrik Hagglund d34337495e Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,
from EVT.

llvm-svn: 169849
2012-12-11 10:16:19 +00:00
Patrik Hagglund 03e9628cfa Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of
EVTs.

llvm-svn: 169848
2012-12-11 10:09:23 +00:00
Patrik Hagglund c50489e203 Change TargetLowering::TransformToType to contain MVTs, instead of
EVTs.

llvm-svn: 169847
2012-12-11 10:05:04 +00:00
Patrik Hagglund 7d0ba05894 Change TargetLowering::getRepRegClassCostFor, getIndexedLoadAction,
getIndexedStoreAction, and addRegisterClass to take an MVT, instead
of EVT.

llvm-svn: 169846
2012-12-11 10:00:35 +00:00
Patrik Hagglund 8d2e7cf561 Change TargetLowering::findRepresentativeClass to take an MVT, instead
of EVT.

llvm-svn: 169845
2012-12-11 09:57:18 +00:00
Patrik Hagglund ffb60f7c08 Change TargetLowering::getTypeToPromoteTo to take and return MVTs,
instead of EVTs.

llvm-svn: 169844
2012-12-11 09:54:23 +00:00
Patrik Hagglund a970281106 Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.
llvm-svn: 169843
2012-12-11 09:51:27 +00:00
Patrik Hagglund e3bec6365a Change TargetLowering::getCondCodeAction to take an MVT, instead of
EVT.

llvm-svn: 169842
2012-12-11 09:48:14 +00:00
Patrik Hagglund 7ffcd226dd Change TargetLowering::getTruncStoreAction to take MVTs, instead of EVTs.
llvm-svn: 169841
2012-12-11 09:42:24 +00:00
Patrik Hagglund cbc9d4d0f9 Change TargetLowering::getLoadExtAction to take an MVT, instead of EVT.
llvm-svn: 169840
2012-12-11 09:39:09 +00:00
Patrik Hagglund 40e1afe970 Change TargetLowering::setTypeAction to take an MVT, instead fo EVT.
llvm-svn: 169839
2012-12-11 09:32:56 +00:00
Patrik Hagglund 57b1694df1 Change TargetLowering::getRepRegClassFor to take an MVT, instead of
EVT.

Accordingly, change RegDefIter to contain MVTs instead of EVTs.

llvm-svn: 169838
2012-12-11 09:31:43 +00:00
Patrik Hagglund 3708e548f8 Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.
Accordingly, add helper funtions getSimpleValueType (in parallel to
getValueType) in SDValue, SDNode, and TargetLowering.

This is the first, in a series of patches.

llvm-svn: 169837
2012-12-11 09:10:33 +00:00
Hao Liu 14390f031c revert the test change
llvm-svn: 169823
2012-12-11 06:25:18 +00:00