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3 Commits

Author SHA1 Message Date
Ulrich Weigand c7eb5a95b2 [SystemZ] Add decimal integer instructions 
This adds the set of decimal integer (BCD) instructions for
assembler / disassembler use.

llvm-svn: 302646
 2017-05-10 12:42:45 +00:00
Jonas Paulsson 4f0509fab3 [SystemZ] Correct the SchedModel regarding vector unit / instructions. 
* Use a generic vector unit to model the issue unit more accurately.
* Update some vector instructions that actually use the vector unit for more
  than one cycle.

Review: Ulrich Weigand
llvm-svn: 286112
 2016-11-07 15:45:06 +00:00
Jonas Paulsson 8010b631d5 [SystemZ] Post-RA scheduler implementation 
Post-RA sched strategy and scheduling instruction annotations for z196, zEC12
and z13.

This scheduler optimizes decoder grouping and balances processor resources
(including side steering the FPd unit instructions).

The SystemZHazardRecognizer keeps track of the scheduling state, which can
be dumped with -debug-only=misched.

Reviers: Ulrich Weigand, Andrew Trick.
https://reviews.llvm.org/D17260

llvm-svn: 284704
 2016-10-20 08:27:16 +00:00