7 Commits

Author	SHA1	Message	Date
Marek Olsak	a93603d508	R600/SI: Don't shrink instructions whose e32 encoding doesn't exist ... v2: modify hasVALU32BitEncoding instead v3: - add pseudoToMCOpcode helper to AMDGPUInstInfo, which is used by both hasVALU32BitEncoding and AMDGPUMCInstLower::lower - report an error if a pseudo can't be lowered llvm-svn: 226188	2015-01-15 18:42:51 +00:00
Marek Olsak	5df00d63e2	R600/SI: Add VI instructions ... llvm-svn: 223603	2014-12-07 12:18:57 +00:00
Benjamin Kramer	a7c40ef022	Canonicalize header guards into a common format. ... Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558	2014-08-13 16:26:38 +00:00
Matt Arsenault	236d9afd18	Alphabetize forward declarations ... llvm-svn: 211509	2014-06-23 18:00:20 +00:00
Tom Stellard	c721a23882	R600/SI: Refactor the VOP3_32 tablegen class ... This will allow us to use a single MachineInstr to represent instructions which behave the same but have different encodings on some subtargets. llvm-svn: 209028	2014-05-16 20:56:47 +00:00
Tom Stellard	9e90b5895d	R600: BB operand support for SI ... Patch by: Christian König Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> llvm-svn: 170342	2012-12-17 15:14:54 +00:00
Tom Stellard	75aadc2813	Add R600 backend ... A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX llvm-svn: 169915	2012-12-11 21:25:42 +00:00