Commit Graph

36 Commits

Author SHA1 Message Date
Evandro Menezes b2c8244715 [AArch64, ARM] Add support for Samsung Exynos M4
Create a separate feature set for Exynos M4 and add test cases.

llvm-svn: 334115
2018-06-06 18:56:00 +00:00
Erich Keane fa3e722597 Fix signed/unsigned compare warning I introduced
'size' of a vector is unsigned, and I accidentially compared
it to an int through GTEST.  I switched it to unsigned, which
is the template parameter type anyway.

llvm-svn: 324625
2018-02-08 17:11:32 +00:00
Erich Keane 0299cc9db5 [ARM] Add 'fillValidCPUArchList' to ARM targets
This is a support change for a CFE change (https://reviews.llvm.org/D42978)
that allows march and -target-cpu to list the valid targets in a note. The changes
are limited to the ARM/AArch64, since this is the only target that gets the CPU
list from LLVM.

llvm-svn: 324623
2018-02-08 16:48:54 +00:00
Florian Hahn 4ed75a73e6 [TargetParser] Add missing armv8l ARMv8 variant.
This change adds the missing armv8l variant as an alias of armv8 architecture.
The issue was observed with several regressions in validation on armv8l
hardware (for instance ExecutionEngine/frem.ll failed due to lack of neon fpu).

Tested with regression testsuite passed without regression on ARM and x86_64.

Patch by Yvan Roux.

Reviewers: rengolin, rogfer01, olista01, fhahn

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D41859

llvm-svn: 322098
2018-01-09 17:49:25 +00:00
Florian Hahn 3cfdaa30e2 [TargetParser] Check size before accessing architecture version.
Summary:
This fixes a crash when invalid -march options like `armv` are provided.

Based on a patch by Will Lovett.


Reviewers: rengolin, samparker, mcrosier

Reviewed By: samparker

Subscribers: aemerson, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D41429

llvm-svn: 321166
2017-12-20 11:32:43 +00:00
Evandro Menezes 27e7f9c809 [Unit][AArch64] Additional tests for target parsing
Add Exynos M2/M3 to extension check.

llvm-svn: 320762
2017-12-14 23:13:04 +00:00
Chad Rosier 71070856e6 [AArch64] Add basic support for Qualcomm's Saphira CPU.
llvm-svn: 314105
2017-09-25 14:05:00 +00:00
Chad Rosier bfd4014304 [TargetParser][AArch64] Add support for RDM feature in the target parser.
Differential Revision: https://reviews.llvm.org/D37081

llvm-svn: 311659
2017-08-24 14:30:44 +00:00
Sam Parker d65e19f7b3 [ARM][AArch64] Add Armv8.3-a unittests
Add Armv8.3-A to the architecture to the TargetParser unittests.

Differential Revision: https://reviews.llvm.org/D36748

llvm-svn: 311450
2017-08-22 12:46:33 +00:00
Sam Parker b252ffd2cc [ARM][AArch64] Cortex-A75 and Cortex-A55 support
This patch introduces support for Cortex-A75 and Cortex-A55, Arm's
latest big.LITTLE A-class cores. They implement the ARMv8.2-A
architecture, including the cryptography and RAS extensions, plus
the optional dot product extension. They also implement the RCpc
AArch64 extension from ARMv8.3-A.

Cortex-A75:
https://developer.arm.com/products/processors/cortex-a/cortex-a75

Cortex-A55:
https://developer.arm.com/products/processors/cortex-a/cortex-a55

Differential Revision: https://reviews.llvm.org/D36667

llvm-svn: 311316
2017-08-21 08:43:06 +00:00
Florian Hahn 67ddd1d08f [TargetParser] Use enum classes for various ARM kind enums.
Summary:
Using c++11 enum classes ensures that only valid enum values are used
for ArchKind, ProfileKind, VersionKind and ISAKind. This removes the
need for checks that the provided values map to a proper enum value,
allows us to get rid of AK_LAST and prevents comparing values from
different enums. It also removes a bunch of static_cast
from unsigned to enum values and vice versa, at the cost of introducing
static casts to access AArch64ARCHNames and ARMARCHNames by ArchKind.

FPUKind and ArchExtKind are the only remaining old-style enum in
TargetParser.h. I think it's beneficial to keep ArchExtKind as old-style
enum, but FPUKind can be converted too, but this patch is quite big, so
could do this in a follow-up patch. I could also split this patch up a
bit, if people would prefer that.

Reviewers: rengolin, javed.absar, chandlerc, rovka

Reviewed By: rovka

Subscribers: aemerson, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D35882

llvm-svn: 309287
2017-07-27 16:27:56 +00:00
Amara Emerson 9f3a245e76 [AArch64] Add an SVE target feature to the backend and TargetParser.
The feature will be used properly once assembler/disassembler support
begins to land.

llvm-svn: 307917
2017-07-13 15:19:56 +00:00
Chandler Carruth 9a67b07398 Re-sort #include lines for unittests. This uses a slightly modified
clang-format (https://reviews.llvm.org/D33932) to keep primary headers
at the top and handle new utility headers like 'gmock' consistently with
other utility headers.

No other change was made. I did no manual edits, all of this is
clang-format.

This should allow other changes to have more clear and focused diffs,
and is especially motivated by moving some headers into more focused
libraries.

llvm-svn: 304786
2017-06-06 11:06:56 +00:00
Kristof Beyls 955cc13bd1 Make mcpu=generic the default for armv7-a and armv8-a.
As discussed in
http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html

llvm-svn: 304390
2017-06-01 07:31:43 +00:00
Ahmed Bougacha 9097967dd9 [AArch64] Make the TargetParser add CPU exts provided by the arch.
Otherwise, each CPU has to manually specify the extensions it supports,
even though they have to be a superset of the base arch extensions.
And when there's redundant data there's stale data, so most of the CPUs
lie about the features they support (almost none lists AEK_FP).

Instead, do the saner thing: add the optional extensions on top of the
base extensions provided by the architecture.

The ARM TargetParser has the same behavior.

Differential Revision: https://reviews.llvm.org/D32780

llvm-svn: 302078
2017-05-03 20:33:58 +00:00
Diana Picus 7c6dee9f16 [ARM] Rename HW div feature to HW div Thumb. NFCI.
The hardware div feature refers only to Thumb, but because of its name
it is tempting to use it to check for hardware division in general,
which may cause problems in ARM mode. See https://reviews.llvm.org/D32005.

This patch adds "Thumb" to its name, to make its scope clear. One
notable place where I haven't made the change is in the feature flag
(used with -mattr), which is still hwdiv. Changing it would also require
changes in a lot of tests, including clang tests, and it doesn't seem
like it's worth the effort.

Differential Revision: https://reviews.llvm.org/D32160

llvm-svn: 300827
2017-04-20 09:38:25 +00:00
Joel Jones 2852088126 [AArch64] Vulcan is now ThunderXT99
Broadcom Vulcan is now Cavium ThunderX2T99.

LLVM Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32113

Minor fixes for the alignments of loops and functions for
ThunderX T81/T83/T88 (better performance).

Patch was tested with SpecCPU2006.

Patch by Stefan Teleman

Differential Revision: https://reviews.llvm.org/D30510

llvm-svn: 297190
2017-03-07 19:42:40 +00:00
Joel Jones ab0f3b43e3 [AArch64] Add Cavium ThunderX support
This set of patches adds support for Cavium ThunderX ARM64 processors:

  * ThunderX
  * ThunderX T81
  * ThunderX T83
  * ThunderX T88

Patch by Stefan Teleman
Differential Revision: https://reviews.llvm.org/D28891

llvm-svn: 295475
2017-02-17 18:34:24 +00:00
George Burgess IV ccf11c2f9f [ARM] Add support for armv7ve triple in llvm (PR31358).
Gcc supports target armv7ve which is armv7-a with virtualization
extensions. This change adds support for this in llvm for gcc
compatibility.

Also remove redundant FeatureHWDiv, FeatureHWDivARM for a few models as
this is specified automatically by FeatureVirtualization.

Patch by Manoj Gupta.

Differential Revision: https://reviews.llvm.org/D29472

llvm-svn: 294661
2017-02-09 23:29:14 +00:00
Javed Absar e5ad87e939 [ARM] Enable Cortex-M23 and Cortex-M33 support.
Add both cores to the target parser and TableGen. Test that eabi
attributes are set correctly for both cores. Additionally, test the
absence and presence of MOVT in Cortex-M23 and Cortex-M33, respectively.

Committed on behalf of Sanne Wouda.
Reviewers : rengolin, olista01.

Differential Revision: https://reviews.llvm.org/D29073

llvm-svn: 293761
2017-02-01 11:55:03 +00:00
Evandro Menezes aeec780e42 Add support for Samsung Exynos M3 (NFC)
llvm-svn: 289613
2016-12-13 23:31:41 +00:00
Zijiao Ma 639f84bd2d Refactor TargetParserTests.
The TargetParser tests are a bit redundant. Refactor them in a more
repeatable way.

llvm-svn: 288758
2016-12-06 02:22:08 +00:00
Chad Rosier 201fc1ed26 [AArch64] Add support for Qualcomm's Falkor CPU.
Differential Revision: https://reviews.llvm.org/D26673

llvm-svn: 287036
2016-11-15 21:34:12 +00:00
Chad Rosier 2bcf3f04e7 [AArch64] Refactor test per Matthias' request.
llvm-svn: 287031
2016-11-15 21:18:18 +00:00
Javed Absar fb4b6e8db9 [ARM]: Add Cortex-R52 target to LLVM
This patch adds Cortex-R52, the new ARM real-time processor, to LLVM. 
Cortex-R52 implements the ARMv8-R architecture.

llvm-svn: 283542
2016-10-07 12:06:40 +00:00
Mehdi Amini a0016ec95f Use StringReg in TargetParser APIs (NFC)
llvm-svn: 283527
2016-10-07 08:37:29 +00:00
Zachary Turner 67cb90ba95 Fix TargetParser unit tests for ARM / AArch64.
String pooling is not guaranteed by the standard, so if
you're comparing two different string literals for equality,
you have to use strcmp.

llvm-svn: 277831
2016-08-05 16:45:07 +00:00
Evandro Menezes 82e245a202 [AArch64] Add support for Samsung Exynos M2 (NFC).
llvm-svn: 277364
2016-08-01 18:39:45 +00:00
David Blaikie fd5a7f1891 Fix some sign compare warnings breaking the -Werror build
llvm-svn: 277040
2016-07-28 21:42:12 +00:00
Simon Pilgrim b1d31ea6bb Removed unused variables
llvm-svn: 276975
2016-07-28 13:42:57 +00:00
Simon Pilgrim 3080dbcc7c Fix signed/unsigned warning.
llvm-svn: 276974
2016-07-28 13:29:56 +00:00
Daniel Jasper 5e9e365725 Remove two tests added in r276957.
These loop from 0 to AEK_XSCALE, which is currently defined as 0x80000000, and
thus the tests loop over the entire int range, which is unreasonable
and also too slow in debug builds.

llvm-svn: 276969
2016-07-28 09:54:35 +00:00
Zijiao Ma 726301bca2 R276957 broke bot clang-ppc64be-linux-multistage,try to fix it.
llvm-svn: 276966
2016-07-28 07:29:45 +00:00
Zijiao Ma e56a53a9b3 Add unittests to {ARM | AArch64}TargetParser.
Add unittest to {ARM | AArch64}TargetParser,and by the way correct problems as below:
1.Correct a incorrect indexing problem in AArch64TargetParser. The architecture enumeration
 is shared across ARM and AArch64 in original implementation.But In the code,I just used the
 index which was offset by the ARM, and this would index into the array incorrectly. To make
 AArch64 has its own arch enum,or we will do a lot of slowly iterating.
2.Correct a spelling error. The parameter of llvm::AArch64::getArchExtName.
3.Correct a writing mistake, in llvm::ARM::parseArchISA.

Differential Revision: https://reviews.llvm.org/D21785

llvm-svn: 276957
2016-07-28 06:11:18 +00:00
Saleem Abdulrasool 1ef925f0bd Support: correct AArch64 TargetParser implementation
The architecture enumeration is shared across ARM and AArch64.  However, the
data is not.  The code incorrectly would index into the array using the
architecture index which was offset by the ARMv7 architecture enumeration.  We
do not have a marker for indicating the architectural family to which the
enumeration belongs so we cannot be clever about offsetting the index (at least
it is not immediately apparent to me).  Instead, fall back to the tried-and-true
method of slowly iterating the array (its not a large array, so the impact of
this is not too high).

Because of the incorrect indexing, if we were lucky, we would crash, but usually
we would return an invalid StringRef.  We did not have any tests for the AArch64
target parser previously;.  Extend the previous tests I had added for ARM to
cover AArch64 for ensuring that we return expected StringRefs.

Take the opportunity to change some iterator types to references.

This work is needed to support parsing `.arch name` directives in the AArch64
target asm parser.

llvm-svn: 272145
2016-06-08 14:30:00 +00:00
Saleem Abdulrasool 11bf1ac297 unitests: add some ARM TargetParser tests
The ARM TargetParser would construct invalid StringRefs.  This would cause
asserts to trigger.  Add some tests in LLVM to ensure that we dont regress on
this in the future.  Although there is a test for this in clang, this ensures
that the changes would get caught in the same repository.

llvm-svn: 262790
2016-03-06 04:50:55 +00:00