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Author SHA1 Message Date
Eli Friedman 92d0d13366 [AArch64] Prefer "mov" over "orr" to materialize constants. 
This is generally more readable due to the way the assembler aliases
work.

(This causes a lot of test changes, but it's not really as scary as it
looks at first glance; it's just mechanically changing a bunch of checks
for orr to check for mov instead.)

Differential Revision: https://reviews.llvm.org/D59720

llvm-svn: 356954
 2019-03-25 21:25:28 +00:00
Hans Wennborg 4a61370b8f Fix CHECK directives that weren't checking. 
llvm-svn: 246485
 2015-08-31 21:10:35 +00:00
Weiming Zhao b33a5557f4 This patch eanble register coalescing to coalesce the following: 
%vreg2<def> = MOVi32imm 1; GPR32:%vreg2
  %W1<def> = COPY %vreg2; GPR32:%vreg2
into:
  %W1<def> = MOVi32imm 1
Patched by Lawrence Hu (lawrence@codeaurora.org)

llvm-svn: 243033
 2015-07-23 19:24:53 +00:00