Commit Graph

11357 Commits

Author SHA1 Message Date
River Riddle ebc77f012f [mlir:LSP] Link the test dialect into mlir-lsp-server
This allows for more easily interacting with lit files that utilize
the test dialect.
2022-05-25 20:54:27 -07:00
Matthias Springer 52698a33d0 [mlir][bufferization] Clean up imports and code comments
Differential Revision: https://reviews.llvm.org/D126427
2022-05-26 05:48:52 +02:00
bixia1 a14057d4bd [mlir][sparse] Add more complex operations.
Support complex operations sqrt, expm1, and tanh.

Add tests.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D126393
2022-05-25 16:38:09 -07:00
bixia1 338e76f8ee Lower complex.expm1 to standard dialect.
Add a test.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D126409
2022-05-25 16:11:28 -07:00
Matthias Springer ab249fd87d [mlir][bufferization][NFC] Remove dead code
There were two copies of AlwaysCopyAnalysisState. (Must have been a merge conflict mistake...)

Differential Revision: https://reviews.llvm.org/D126414
2022-05-25 22:26:00 +02:00
Chia-hung Duan c088fbe7de [mlir][PDLL] Allow numeric result indexing for unregistered op
If we don't specify the result index while matching operand with the
result of certain operation, it's supposed to match all the results of
the operation with the operand. For registered op, it's easy to do that
by either indexing with number or name. For unregistered op, this commit
enables the numeric result indexing for this use case.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D126330
2022-05-25 19:29:29 +00:00
Matthias Springer 0ee1c0388c [mlir][bufferize] Remove hoisting functionality from One-Shot Bufferize
The same functionality is already provided by `-buffer-hoisting` and `-buffer-loop-hoisting`.

Differential Revision: https://reviews.llvm.org/D126251
2022-05-25 19:56:18 +02:00
Logan Chien 0c8fdd7230 [mlir] Fix Tensor_InsertSliceOp description
This commit fixes `Tensor_InsertSliceOp` `sizes` inputs/attributes
description.

Before this commit, the description says the `sizes` inputs/attributes
denote the size of the return type. But according to the
`InsertSliceOpConstantArgumentFolder` in
`lib/Dialect/Tensor/IR/TensorOps.cpp`, the `sizes` inputs/attributes
actually denote the size of the source type.

I had an off-line discussion with the authors of `TensorOps.td` and
`TensorOps.cpp`. We concluded that it was a typo in the Op description.

This commit updates the Op description to match the actual usage.

Differential Revision: https://reviews.llvm.org/D126264
2022-05-25 09:38:06 -07:00
Lei Zhang e0ea1fc6f8 [mlir][spirv] Fix capability check for 64-bit element types
Using 64-bit integer/float type in interface storage classes would
require Int64/Float64 capability, per the Vulkan spec:

```
shaderInt64 specifies whether 64-bit integers (signed and unsigned) are
supported in shader code. If this feature is not enabled, 64-bit integer
types must not be used in shader code. This also specifies whether
shader modules can declare the Int64 capability. Declaring and using
64-bit integers is enabled for all storage classes that SPIR-V allows
with the Int64 capability.
```

This is different from, say, 16-bit element types, where:

```
shaderInt16 specifies whether 16-bit integers (signed and unsigned) are
supported in shader code. If this feature is not enabled, 16-bit integer
types must not be used in shader code. This also specifies whether
shader modules can declare the Int16 capability. However, this only
enables a subset of the storage classes that SPIR-V allows for the Int16
SPIR-V capability: Declaring and using 16-bit integers in the Private,
Workgroup (for non-Block variables), and Function storage classes is
enabled, while declaring them in the interface storage classes (e.g.,
UniformConstant, Uniform, StorageBuffer, Input, Output, and
PushConstant) is not enabled.
```

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D126256
2022-05-25 10:57:31 -04:00
Lei Zhang 413fbb045d [mlir][scf] Retain existing attributes in scf.for transforms
These attributes can carry useful information, e.g., pipelines
might use them to organize and chain patterns.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D126320
2022-05-25 10:53:02 -04:00
Groverkss fb857ded70 [MLIR][Presburger] Add inverse to IntegerRelation
This patch adds support for obtaining inverse of a relation.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D126327
2022-05-25 19:37:52 +05:30
Groverkss 3c057ac2c2 [MLIR][Presburger] Add getDomainSet, getRangeSet to IntegerRelation
This patch adds support for obtaining a set corresponding to the domain/range
of the relation.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D126326
2022-05-25 19:35:56 +05:30
Ivan Kosarev b3c856d10c [MLIR][NFC] Fix the Conversion/MemRefToSPIRV/alloc.mlir test.
Caught with D125604.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D126292
2022-05-25 13:58:19 +01:00
lorenzo chelini 1ad9b26622 [MLIR][Linalg] Adjust documentation (NFC)
Adjust docs for tensor.pad, tensor.collapse_shape and tensor.expand_shape.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D126370
2022-05-25 13:57:11 +02:00
Shraiysh Vaishay 512d06b045 [mlir][openmp] Add check for types of operands in omp.atomic.write
This patch makes sure that the address dereferences to value in
omp.atomic.write operation.

Reviewed By: kiranchandramohan, peixin

Differential Revision: https://reviews.llvm.org/D126272
2022-05-25 17:22:16 +05:30
Javed Absar 8919447c71 [mlir] Fix warning `missing base in copy ctor`
This suppresse annoying warning when building mlir.
```
 warning: base class ‘class mlir::PassWrapper<{anonymous}::TestStatisticPass,
  mlir::OperationPass<void> >’ should be explicitly initialized in the copy constructor [-Wextra]
```

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D126209
2022-05-25 10:24:00 +01:00
Alexander Belyaev b3c5c22c13 [mlir] Add `complex.atan2` operation.
Differential Revision: https://reviews.llvm.org/D126357
2022-05-25 10:11:44 +02:00
Aart Bik a9e354c83b [mlir][sparse] complex lowering
Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D126335
2022-05-24 16:06:16 -07:00
Aart Bik 5799f843a2 [mlir][sparse] add new complex ops to reduction recognition
Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D126318
2022-05-24 15:00:56 -07:00
Mogball 96bbe1bd61 [mlir] Rename mlir::SmallVector -> llvm::SmallVector 2022-05-24 15:03:19 +00:00
Logan Chien 57d239e4ad [mlir] Breakdown diagnostic string literals
This commit breaks down diagnostic string literals so that the attribute
name and enumurator names can be shared with the stringify utility
function and the "expected ", " to be one of ", and ", " can be shared
between different enum-related diagnostic.

Differential Revision: https://reviews.llvm.org/D125938
2022-05-24 07:58:00 -07:00
Thomas Raoux 89aaa2d033 [mlir][vector] Add new lowering mode to vector.contractionOp
Add lowering for cases where the reduction dimension is fully unrolled.
It is common to unroll the reduction dimension, therefore we would want
to lower the contractions to an elementwise vector op in this case.

Differential Revision: https://reviews.llvm.org/D126120
2022-05-24 14:19:08 +00:00
Mehdi Amini 994a1841eb Apply clang-tidy fixes for modernize-use-bool-literals in Parser.cpp (NFC) 2022-05-23 23:13:33 +00:00
Mehdi Amini f38765a813 Apply clang-tidy fixes for modernize-use-override in SparseTensorUtils.cpp (NFC) 2022-05-23 23:12:58 +00:00
Mehdi Amini 63d69a21b7 Apply clang-tidy fixes for performance-unnecessary-value-param in Utils.cpp (NFC) 2022-05-23 23:12:58 +00:00
Stella Stamenova e7afa23366 [mlir] Use 'native' instead of 'llvm_has_native_target' in the mlir tests
The tests actually require the target triple to match the host, rather than just having the host in the list of available targets. This change removes `llvm_has_native_target` and instead uses the `native` feature from the lit configuration.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D126011
2022-05-23 12:38:24 -07:00
natashaknk bedd3ee881 [mlir][tosa] Change tosa.depthwise_conv2d's ending reshape to a collapse.
TOSAs depthwise_conv2d operation includes a reshape to include the implicit x1 dimension.

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D126212
2022-05-23 11:27:01 -07:00
Christopher Bate 7085cb6011 [mlir][NvGpuToNVVM] Fix byte size calculation in async copy lowering
AsyncCopyOp lowering converted "size in elements" to "size in bytes"
assuming the element type size is at least one byte. This removes
that restriction, allowing for types such as i4 and b1 to be handled
correctly.

Differential Revision: https://reviews.llvm.org/D125838
2022-05-23 10:53:51 -06:00
Matthias Springer 82c85bf38e [mlir][bufferize][NFC] Update One-Shot Bufferize pass documentation
Differential Revision: https://reviews.llvm.org/D125637
2022-05-23 18:53:36 +02:00
Christopher Bate 334f63e7c3 [mlir][NvGpuToNVVM] Fix missing i4 support for nvgpu.mma.sync
This changes adds missing support for the i4 data type. Tests are added
to ensure proper lowering of an nvgpu.mma.sync operation targeting the
16x8x64xi4 and 16x8x32xi4 MMA variants in the NVVM dialect.

Differential Revision: https://reviews.llvm.org/D126092
2022-05-23 10:52:28 -06:00
Matthias Springer 598c5ddba6 [mlir][bufferize] Support fully dynamic layout maps in BufferResultsToOutParams
Also fixes integration of the pass into One-Shot Bufferize and adds additional test cases.

BufferResultsToOutParams can be used with "identity-layout-map" and "fully-dynamic-layout-map". "infer-layout-map" is not supported.

Differential Revision: https://reviews.llvm.org/D125636
2022-05-23 18:38:22 +02:00
Matthias Springer 210c4e7fc8 [mlir][bufferization] Fix Python bindings
Differential Revision: https://reviews.llvm.org/D126179
2022-05-23 18:12:56 +02:00
Stella Laurenzo 02d3499a46 NFC: Silence two warnings for unused bufferization symbols in release mode.
Differential Revision: https://reviews.llvm.org/D126182
2022-05-22 09:00:34 -07:00
Matthias Springer ec55f0bd58 [mlir][bufferization][NFC] Improve assembly format of AllocTensorOp
No longer pass static dim sizes as an attribute. This was redundant and required extra checks in the verifier. This change also makes the op symmetrical to memref::AllocOp.

Differential Revision: https://reviews.llvm.org/D126178
2022-05-23 16:58:01 +02:00
Alexander Belyaev f3eeefe449 [mlir] Add Expm1 tp ComplexOps.td.
Differential Revision: https://reviews.llvm.org/D126206
2022-05-23 16:31:16 +02:00
Alexander Belyaev a3a85fe59f [mlir] Add RSqrt tp ComplexOps.td.
Differential Revision: https://reviews.llvm.org/D126202
2022-05-23 16:12:05 +02:00
Jeremy Furtek 9b79f50b59 [mlir][tblgen][ods][python] Use keyword-only arguments for optional builder arguments in generated Python bindings
This diff modifies `mlir-tblgen` to generate Python Operation class `__init__()`
functions that use Python keyword-only arguments.

Previously, all `__init__()` function arguments were positional. Python code to
create MLIR Operations was required to provide values for ALL builder arguments,
including optional arguments (attributes and operands). Callers that did not
provide, for example, an optional attribute would be forced to provide `None`
as an argument for EACH optional attribute. Proposed changes in this diff use
`tblgen` record information (as provided by ODS) to generate keyword arguments
for:
- optional operands
- optional attributes (which includes unit attributes)
- default-valued attributes

These `__init__()` function keyword arguments have default `None` values (i.e.
the argument form is `optionalAttr=None`), allowing callers to create Operations
more easily.

Note that since optional arguments become keyword-only arguments (since they are
placed after the bare `*` argument), this diff will require ALL optional
operands and attributes to be provided using explicit keyword syntax. This may,
in the short term, break any out-of-tree Python code that provided values via
positional arguments. However, in the long term, it seems that requiring
keywords for optional arguments will be more robust to operation changes that
add arguments.

Tests were modified to reflect the updated Operation builder calling convention.

This diff partially addresses the requests made in the github issue below.

https://github.com/llvm/llvm-project/issues/54932

Reviewed By: stellaraccident, mikeurbach

Differential Revision: https://reviews.llvm.org/D124717
2022-05-21 21:18:53 -07:00
jacquesguan 10c9ecce9f [mlir][NFC] Replace some nested if with logical and.
This patch replaces some nested if statement with logical and to reduce the nesting depth.

Differential Revision: https://reviews.llvm.org/D126050
2022-05-23 02:04:48 +00:00
Groverkss 8eebb47f97 [MLIR][Presburger] Update equality and subset checks asserts in IntegerRelation
This patch updates asserts in IntegerRelation::isEqual and
IntegerRelation::isCompatible to allow these functions when number of
local identifiers are different. This change is done to reflect the
algorithmic changes done before this patch.
2022-05-22 01:26:41 +05:30
Benjamin Kramer 295d032762 [mlir] Move diagnostic handlers instead of copying
This also allows using unique_ptr instead of shared_ptr for the CAPI
user data. NFCI.
2022-05-21 13:25:24 +02:00
Benjamin Kramer 86fd1c139f [bufferization] Simplify code. NFCI. 2022-05-21 10:58:57 +02:00
Min-Yih Hsu f088b99eac [mlir][LLVMIR] Use the correct way to determine if it's a scalable vector
One of the ShuffleVectorOp::build functions checks if the incoming
vector operands is scalable vector by casting its type to
mlir::VectorType first. However, in some cases the operand is not
necessarily mlir::VectorType (e.g. it might be a LLVMVectorType).

This patch fixes this issue by using the dedicated
`LLVM::isScalableVectorType` function to determine if the incoming
vector is scalable vector or not.

Differential Revision: https://reviews.llvm.org/D125818
2022-05-20 21:45:50 -07:00
Min-Yih Hsu 3b91657c7b [mlir][LLVMIR] Add support for translating from some simple LLVM instructions
Add support for translating from llvm::Select, llvm::FNeg, and llvm::Unreachable.
This patch also cleans up (NFC) the opcode map for simple instructions and
adds `// clang-format off/on` comments to prevent those lines from being
churned by clang-format between commits.

Differential Revision: https://reviews.llvm.org/D125817
2022-05-20 21:45:50 -07:00
Matthias Springer ffdbecccaf [mlir][bufferization] Add bufferization.alloc_tensor op
This change adds a new op `alloc_tensor` to the bufferization dialect. During bufferization, this op is always lowered to a buffer allocation (unless it is "eliminated" by a pre-processing pass). It is useful to have such an op in tensor land, because it allows users to model tensor SSA use-def chains (which drive bufferization decisions) and because tensor SSA use-def chains can be analyzed by One-Shot Bufferize, while memref values cannot.

This change also replaces all uses of linalg.init_tensor in bufferization-related code with bufferization.alloc_tensor.

linalg.init_tensor and bufferization.alloc_tensor are similar, but the purpose of the former one is just to carry a shape. It does not indicate a memory allocation.

linalg.init_tensor is not suitable for modelling SSA use-def chains for bufferization purposes, because linalg.init_tensor is marked as not having side effects (in contrast to alloc_tensor). As such, it is legal to move linalg.init_tensor ops around/CSE them/etc. This is not desirable for alloc_tensor; it represents an explicit buffer allocation while still in tensor land and such allocations should not suddenly disappear or get moved around when running the canonicalizer/CSE/etc.

BEGIN_PUBLIC
No public commit message needed for presubmit.
END_PUBLIC

Differential Revision: https://reviews.llvm.org/D126003
2022-05-21 02:47:32 +02:00
Eugene Zhulenev 705f048cbb [mlir] MemRefToLLVM: convert memref.view operations for empty memrefs
Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D126094
2022-05-20 16:43:54 -07:00
Bixia Zheng d390035b46 [mlir][sparse] Support more complex operations.
Add complex operations abs, neg, sin, log1p, sub and div.

Add test cases.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D126027
2022-05-20 14:39:26 -07:00
Christopher Bate 873a3e2c1d [mlir] Add missing NVGPU link dependency to VectorToGPU
The missing link dependency caused build failures in some
configurations.
2022-05-20 10:44:31 -06:00
Aart Bik 28b6d412af [mlir][sparse] add support for complex zero/one building
Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D126039
2022-05-20 08:53:30 -07:00
Christopher Bate 1ca772ed95 [MLIR][GPU] Add NvGpu mma.sync path to the VectorToGPU pass
This changes adds the option to lower to NvGpu dialect ops during the
VectorToGPU convsersion pass. Because this transformation reuses
existing VectorToGPU logic, a seperate VectorToNvGpu conversion pass is
not created. The option `use-nvgpu` is added to the VectorToGPU pass.
When this is true, the pass will attempt to convert slices rooted at
`vector.contract` operations into `nvgpu.mma.sync` ops, and
`vector.transfer_read` ops are converted to either `nvgpu.ldmatrix` or
one or more `vector.load` operations.  The specific data loaded will
depend on the thread id within a subgroup (warp). These index
calculations depend on data type and shape of the MMA op
according to the downstream PTX specification. The code for supporting
these details is separated into `NvGpuSupport.cpp|h`.

Differential Revision: https://reviews.llvm.org/D122940
2022-05-20 09:42:55 -06:00
Alex Zinenko 122e685878 [mlir] do not elide dialect prefix for ops with dots in the name
For the hypothetical "a.b.c" op printed within a region that declares "a" as
the default dialect, MLIR would currently elide the "a." prefix and only print
"b.c". However, this becomes ambiguous while parsing as "b.c" may be exist as
the "c" op in the "b" dialect. If it does not, the parsing currently fails. Do
not elide the default dialect if the op name contains further dots to avoid the
ambiguity.

See https://discourse.llvm.org/t/dropping-dialect-prefix-for-ops-with-multiple-dots-in-the-name/62562

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D125975
2022-05-20 12:55:32 +02:00