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12 Commits

Author SHA1 Message Date
Craig Topper aa1370ac57 [AVX-512] Fix the operand order for vpermi2var_qi intrinsics to match the other vpermi2var intrinsics. 
llvm-svn: 284329
 2016-10-16 04:54:35 +00:00
Elena Demikhovsky dca03bebd3 AVX-512: Changed lowering of BITCAST between i1 vectors and i8/i16/i32 integer values 
Optimized lowering of BITCAST node. The BITCAST node can be replaced with COPY_TO_REG instead of KMOV.
It allows to suppress two opposite BITCAST operations and avoid redundant "movs".

Differential Revision: https://reviews.llvm.org/D23247

llvm-svn: 277958
 2016-08-07 13:05:58 +00:00
Craig Topper 7afdc0fb25 [AVX512] Always use EVEX encodings for 128/256-bit move instructions in getLoadStoreRegOpcode if VLX is supported. 
llvm-svn: 277305
 2016-07-31 20:20:05 +00:00
Craig Topper 4c53e60360 [AVX512] Add VLX packed move instructions to the execution dependency fix pass and update tests. 
llvm-svn: 277304
 2016-07-31 20:20:01 +00:00
Craig Topper 5c913e84df [AVX512] Use VMOVAPSZ128rr/VMOVAPS256rr for VR128X/VR256X physreg moves when VLX is supported. 
Ideally we would use VEX encoded moves instead of EVEX if the high 16 registers aren't referenced, but this a good first step.

llvm-svn: 275763
 2016-07-18 06:14:34 +00:00
Igor Breger 23c2090606 [llvm][AVX512][intrinsics] Fix vperm{b|w|d|q|ps|pd} intrinsics. Index is second argument to buildin function but it is first instruction operand. 
Differential Revision: http://reviews.llvm.org/D20515

llvm-svn: 270548
 2016-05-24 11:06:22 +00:00
Craig Topper e5ce84a33c [AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used. 
llvm-svn: 268884
 2016-05-08 21:33:53 +00:00
Craig Topper 298b6d7493 [X86] Re-generate tests using update_llc_test_checks.py to prepare for a future commit. NFC 
llvm-svn: 268883
 2016-05-08 21:33:47 +00:00
Craig Topper 092794b82a Remove Windows line endings in some tests to prepare for a future commit. NFC 
llvm-svn: 268882
 2016-05-08 21:33:44 +00:00
Asaf Badouh 5a3a0231f4 [X86][AVX512VBMI] add encoding and intrinsics for Multishift 
Differential Revision: http://reviews.llvm.org/D16399

llvm-svn: 259363
 2016-02-01 15:48:21 +00:00
Michael Zuckerman 21a30a42a9 [AVX512] Adding VPERMT2B and VPERMI2B Intrinsics 
Differential Revision: http://reviews.llvm.org/D16398

llvm-svn: 258397
 2016-01-21 13:36:01 +00:00
Michael Zuckerman 65c40afb03 [AVX512] Adding VPERMB Intrinsics 
Differential Revision: http://reviews.llvm.org/D16296

llvm-svn: 258316
 2016-01-20 15:24:56 +00:00