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5 Commits

Author SHA1 Message Date
Simon Pilgrim 55ff57861a [NVPTX] Don't flag StoreParam/LoadParam memory chain operands as ReadMem/WriteMem (PR32146) 
Follow up to D33147

NVPTXTargetLowering::LowerCall was trusting the default argument values.

Fixes another 17 of the NVPTX '-verify-machineinstrs with EXPENSIVE_CHECKS' errors in PR32146.

Differential Revision: https://reviews.llvm.org/D33189

llvm-svn: 303082
 2017-05-15 17:17:44 +00:00
Olivier Sallenave d657321aef Check that the TLI callback enableAggressiveFMAFusion has the desired effect on FMA folding. 
llvm-svn: 225987
 2015-01-14 15:36:28 +00:00
Justin Holewinski 428cf0e49a [NVPTX] Improve handling of FP fusion 
We now consider the FPOpFusion flag when determining whether
to fuse ops.  We also explicitly emit add.rn when fusion is
disabled to prevent ptxas from fusing the operations on its
own.

llvm-svn: 213287
 2014-07-17 18:10:09 +00:00
Justin Holewinski 3e037d98e6 [NVPTX] Rename registers %fl -> %fd and %rl -> %rd 
This matches the internal behavior of NVIDIA tools like libnvvm.

llvm-svn: 213168
 2014-07-16 16:26:58 +00:00
Justin Holewinski ae556d3ef7 This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it. 
The new target machines are:

nvptx (old ptx32) => 32-bit PTX
nvptx64 (old ptx64) => 64-bit PTX

The sources are based on the internal NVIDIA NVPTX back-end, and
contain more functionality than the current PTX back-end currently
provides.

NV_CONTRIB

llvm-svn: 156196
 2012-05-04 20:18:50 +00:00