dfc4fc9f02
[AVX-512] Teach fastisel load/store handling to use EVEX encoded instructions for 128/256-bit vectors and scalar single/double.
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Still need to fix the register classes to allow the extended range of registers.
llvm-svn: 280682
2016-09-05 23:58:40 +00:00
f54ebca2dd
[X86] Update fast-isel vector load test to have more 256 and 512-bit test cases. Add a command line for SKX features too.
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llvm-svn: 280680
2016-09-05 23:58:32 +00:00
61e628591f
[AVX512] Fix load opcode for fast isel.
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Differential Revision: http://reviews.llvm.org/D21067
llvm-svn: 272006
2016-06-07 13:08:45 +00:00
8f7feec5fd
[X86][FastIsel] Teach how to select vector load instructions.
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This patch teaches fast-isel how to select 128-bit vector load instructions.
Added test CodeGen/X86/fast-isel-vecload.ll
Differential Revision: http://reviews.llvm.org/D8605
llvm-svn: 233270
2015-03-26 11:29:02 +00:00
Craig Topper