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2768 Commits

Author SHA1 Message Date
Andrew Lenharth 7c538a6593 stack frame fix and zero FP reg fix 
llvm-svn: 19857
 2005-01-27 08:31:19 +00:00
Andrew Lenharth 96515adad6 Floating point instructions like Floating point registers 
llvm-svn: 19856
 2005-01-27 07:58:15 +00:00
Andrew Lenharth 0cceb5165e int to float conversion and another setcc 
llvm-svn: 19855
 2005-01-27 07:50:35 +00:00
Andrew Lenharth 3c361fd6f7 teach isel about comparison with constants and zero extending bits 
llvm-svn: 19853
 2005-01-27 03:49:45 +00:00
Andrew Lenharth 5374789198 perhaps this will let me have calls again 
llvm-svn: 19851
 2005-01-27 01:22:48 +00:00
Andrew Lenharth 9e27e54d70 minor bug fix 
llvm-svn: 19850
 2005-01-27 00:52:26 +00:00
Andrew Lenharth 9748b623a4 minor bug fix 
llvm-svn: 19849
 2005-01-27 00:51:05 +00:00
Andrew Lenharth 267908ad47 added instructions for fp to int to fp moves 
llvm-svn: 19848
 2005-01-26 23:56:48 +00:00
Andrew Lenharth 5ae5f81720 initial fp support 
llvm-svn: 19847
 2005-01-26 21:54:09 +00:00
Andrew Lenharth 589304de7f hum, writing on one machine, testing on another... 
llvm-svn: 19844
 2005-01-26 02:53:56 +00:00
Andrew Lenharth 02c5459948 add some operations, fix others. should compile several more tests now 
llvm-svn: 19843
 2005-01-26 01:24:38 +00:00
Chris Lattner 1b20615173 We can fold promoted and non-promoted loads into divs also! 
llvm-svn: 19835
 2005-01-25 20:35:10 +00:00
Chris Lattner 30607ec66e Fold promoted loads into binary ops for FP, allowing us to generate m32 forms 
of FP ops.

llvm-svn: 19834
 2005-01-25 20:03:11 +00:00
Andrew Lenharth ba2bcd867f problems with bools, and their work arounds 
llvm-svn: 19833
 2005-01-25 19:58:40 +00:00
Andrew Lenharth 122489bcab more load choices, better add with imm 
llvm-svn: 19821
 2005-01-25 00:35:34 +00:00
Andrew Lenharth 2f0f845534 Clean ups, and taught the instruction selector about immediate forms 
llvm-svn: 19816
 2005-01-24 19:44:07 +00:00
Andrew Lenharth 6d1a96bccc Alpha JIT prune 
llvm-svn: 19815
 2005-01-24 18:48:22 +00:00
Andrew Lenharth 3c12772190 include prune and JIT prune 
llvm-svn: 19814
 2005-01-24 18:45:41 +00:00
Andrew Lenharth 4680f89526 Pruned includes 
llvm-svn: 19813
 2005-01-24 18:37:48 +00:00
Chris Lattner 39837024ae Fix a spurious warning. 
llvm-svn: 19799
 2005-01-24 01:40:18 +00:00
Chris Lattner 0e1de101a1 Silence a warning. 
llvm-svn: 19798
 2005-01-23 23:20:06 +00:00
Chris Lattner debae1e3c3 Allow the FP stackifier to completely ignore functions that do not use FP at 
all.  This should speed up the X86 backend fairly significantly on integer
codes.  Now if only we didn't have to compute livevar still... ;-)

llvm-svn: 19796
 2005-01-23 23:13:59 +00:00
Chris Lattner 28939a222e Build Alpha by default. 
llvm-svn: 19777
 2005-01-23 04:34:46 +00:00
Reid Spencer d5d45b8d1a Fix alloca support for Cygwin. On cygwin its __alloca not __builtin_alloca 
llvm-svn: 19776
 2005-01-23 04:32:47 +00:00
Reid Spencer 30226da5b3 Support Cygwin assembly generation. The cygwin version of Gnu ASsembler 
doesn't support certain directives and symbols on cygwin are prefixed with
an underscore. This patch makes the necessary adjustments to the output.

llvm-svn: 19775
 2005-01-23 03:52:14 +00:00
Andrew Lenharth a1b5ca2b9d Let me introduce you to the early stages of the llvm backend for the alpha processor 
llvm-svn: 19764
 2005-01-22 23:41:55 +00:00
Chris Lattner e70eb9da7d Speed up folding operations into loads. 
llvm-svn: 19733
 2005-01-21 21:43:02 +00:00
Chris Lattner e1e844c416 The ever-important vanity pass name :) 
llvm-svn: 19731
 2005-01-21 21:35:14 +00:00
Chris Lattner c78776d209 Fix a FIXME: realize that argument stores are all independent (don't alias) 
llvm-svn: 19728
 2005-01-21 19:46:38 +00:00
Chris Lattner 2a631fa406 Implement ADD_PARTS/SUB_PARTS so that 64-bit integer add/sub work. This 
fixes most of the remaining llc-beta failures.

llvm-svn: 19716
 2005-01-20 18:53:00 +00:00
Chris Lattner 5b04f33405 Fix a crash compiling 134.perl. 
llvm-svn: 19711
 2005-01-20 16:50:16 +00:00
Chris Lattner 474aac4da9 Fix a problem where were were literally selecting for INCREASED register 
pressure, not decreases register pressure.  Fix problem where we accidentally
swapped the operands of SHLD, which caused fourinarow to fail.  This fixes
fourinarow.

llvm-svn: 19697
 2005-01-19 17:24:34 +00:00
Chris Lattner 25be208e02 When commuting these instructions, make sure to actually swap the operands too. 
llvm-svn: 19694
 2005-01-19 16:55:52 +00:00
Chris Lattner de87d146ab Implement Regression/CodeGen/X86/rotate.ll: emit rotate instructions (which 
typically cost 1 cycle) instead of shld/shrd instruction (which are typically
6 or more cycles).  This also saves code space.

For example, instead of emitting:

rotr:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %CL, BYTE PTR [%ESP + 8]
        shrd %EAX, %EAX, %CL
        ret
rotli:
        mov %EAX, DWORD PTR [%ESP + 4]
        shrd %EAX, %EAX, 27
        ret

Emit:

rotr32:
        mov %CL, BYTE PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, %CL
        ret
rotli32:
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, 27
        ret

We also emit byte rotate instructions which do not have a sh[lr]d counterpart
at all.

llvm-svn: 19692
 2005-01-19 08:07:05 +00:00
Chris Lattner 0edf9535b9 Add rotate instructions. 
llvm-svn: 19690
 2005-01-19 07:50:03 +00:00
Chris Lattner 29f5819158 Match 16-bit shld/shrd instructions as well, implementing shift-double.llx:test5 
llvm-svn: 19689
 2005-01-19 07:37:26 +00:00
Chris Lattner d54845f530 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. 
llvm-svn: 19687
 2005-01-19 07:31:24 +00:00
Chris Lattner 2947801735 Teach the code generator that shrd/shld is commutable if it has an immediate. 
This allows us to generate this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shld %EDX, %EDX, 2
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

Note the magically transmogrifying immediate.

llvm-svn: 19686
 2005-01-19 07:11:01 +00:00
Chris Lattner f6932b700b Finegrainify namespacification 
Add default impl of commuteInstruction
Add notes about ugly V9 code.

llvm-svn: 19684
 2005-01-19 06:53:34 +00:00
Chris Lattner 41fe201b61 Codegen long >> 2 to this: 
foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shrd %EAX, %EDX, 2
        sar %EDX, 2
        ret

instead of this:

test1:
        mov %ECX, DWORD PTR [%ESP + 4]
        shr %ECX, 2
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %EAX, %EDX
        shl %EAX, 30
        or %EAX, %ECX
        sar %EDX, 2
        ret

and long << 2 to this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
***     mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        shr %ECX, 30
        mov %EDX, DWORD PTR [%ESP + 8]
        shl %EDX, 2
        or %EDX, %ECX
        shl %EAX, 2
        ret

The extra copy (marked ***) can be eliminated when I teach the code generator
that shrd32rri8 is really commutative.

llvm-svn: 19681
 2005-01-19 06:18:43 +00:00
Chris Lattner d8d306601a X86 shifts mask the amount. 
llvm-svn: 19678
 2005-01-19 03:36:30 +00:00
Chris Lattner a05cd83d2f Add a hook to find out how the target handles shift amounts that are out of 
range.  Either they are undefined (the default), they mask the shift amount
to the size of the register (X86, Alpha, etc), or they extend the shift (PPC).

This defaults to undefined, which is conservatively correct.

llvm-svn: 19677
 2005-01-19 03:36:14 +00:00
Chris Lattner 14947c34cc Code to handle FP_EXTEND is dead now. X86 doesn't support any data types to 
FP_EXTEND from!

llvm-svn: 19674
 2005-01-18 20:05:56 +00:00
Chris Lattner c6e928cba5 Remove more dead code. 
llvm-svn: 19673
 2005-01-18 19:50:08 +00:00
Chris Lattner 0616fa6b9b The selection dag code handles the promotions from F32 to F64 for us, so we 
don't need to even think about F32 in the X86 code anymore.

llvm-svn: 19672
 2005-01-18 19:46:54 +00:00
Chris Lattner 479c7118e4 Fix 124.m88ksim. 
llvm-svn: 19667
 2005-01-18 17:35:28 +00:00
Chris Lattner ed246ec0d2 Do not emit loads multiple times, potentially in the wrong places. 
llvm-svn: 19661
 2005-01-18 04:18:32 +00:00
Tanya Lattner c227ad2640 Minor changes. 
llvm-svn: 19660
 2005-01-18 04:15:41 +00:00
Chris Lattner 28a205e01b Eliminate bad assertions. 
llvm-svn: 19659
 2005-01-18 04:00:54 +00:00
Chris Lattner 78d3028350 * Eliminate the TokenSet and just use the ExprMap for both tokens and values. 
* Insert some really pedantic assertions that will notice when we emit the
  same loads more than one time, exposing bugs.  This turns a miscompilation in
  bzip2 into a compile-fail.  yaay.

llvm-svn: 19658
 2005-01-18 03:51:59 +00:00