Commit Graph

797 Commits

Author SHA1 Message Date
Evan Cheng c7852a689a Allow set operators with multiple destinations, i.e. (set x, y, (op a, b)).
llvm-svn: 41861
2007-09-11 19:52:18 +00:00
Evan Cheng cef2c0efcc TableGen no longer emit CopyFromReg nodes for implicit results in physical
registers. The scheduler is now responsible for emitting them.

llvm-svn: 41781
2007-09-07 23:59:02 +00:00
Evan Cheng 20711a8b9a Always check the type of node. This prevents situations such as selecting 32-bit rotate target instruction for a 64-bit node when 64-bit pattern is missing.
llvm-svn: 41710
2007-09-04 20:18:28 +00:00
Dan Gohman febf946ea7 Add MVT::fAny for overloading intrinsics on floating-point types.
llvm-svn: 41128
2007-08-16 21:57:19 +00:00
Rafael Espindola 66011c17d5 propagate struct size and alignment of byval arguments to the DAG
llvm-svn: 40986
2007-08-10 14:44:42 +00:00
Chandler Carruth bebc3bb2e3 This resolves a regression of BasicAA which failed to find any memory information for overloaded intrinsics (PR1600). This resolves that issue, and improves the matching scheme to use a BitVector rather than a binary search.
llvm-svn: 40872
2007-08-06 20:57:16 +00:00
Chandler Carruth 7132e00de7 This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.

llvm-svn: 40807
2007-08-04 01:51:18 +00:00
Evan Cheng c9de9cec18 Added TargetInstrDescriptor::numDefs - num of results.
llvm-svn: 40709
2007-08-02 00:20:17 +00:00
Dan Gohman e379f08b19 More explicit keywords.
llvm-svn: 40589
2007-07-30 14:51:59 +00:00
Chuck Rose III 1a39a2d13d VStudio compiler errors and placing Function*->ExFunc map under ManagedStatic control.
This commit fixes two things.  One is a pair of VStudio compiler errors stemming from variables
which defined within the for loop statement and also within the body of the for loop.  I fixed these 
by renaming one of the two variables.  Additionally, I've made the Function*->ExFunc map in 
ExternalFunctions.cpp a ManagedStatic object, so that cleanup will be done on llvm_shutdown.  In repeated
uses of the interpreter, where the same Function* address may get used for completely differnet functions,
this was causing a crash.

llvm-svn: 40558
2007-07-27 18:26:35 +00:00
Dan Gohman 336718dd5c Fix a pasto in a comment.
llvm-svn: 40527
2007-07-26 15:11:00 +00:00
Christopher Lamb 2f3becc49c Have register info provide the inverse mapping of register->superregisters. PR1350
llvm-svn: 40519
2007-07-26 08:01:58 +00:00
Christopher Lamb cde0ee5221 Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350
llvm-svn: 40518
2007-07-26 07:48:21 +00:00
Christopher Lamb c9ea29456a Teach TableGen about the new vector types.
llvm-svn: 40513
2007-07-26 06:41:18 +00:00
Dan Gohman 5a629d4cee A minor simplication in the generated code.
llvm-svn: 40479
2007-07-24 22:58:00 +00:00
Evan Cheng 869852b03e No need for noResults anymore.
llvm-svn: 40075
2007-07-20 00:21:23 +00:00
Evan Cheng 94b5a80b93 Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
2007-07-19 01:14:50 +00:00
Chris Lattner 6cc9a08734 Work around a bogus gcc 4.2 warning.
llvm-svn: 39993
2007-07-18 04:51:57 +00:00
Dan Gohman 10835d9c67 Eliminate an unused parameter.
llvm-svn: 39828
2007-07-13 20:16:50 +00:00
Evan Cheng 6e3c705d74 Try committing again. Add OptionalDefOperand. Remove clobbersPred.
llvm-svn: 38498
2007-07-10 18:05:01 +00:00
Evan Cheng 9835db562f ImmutablePredicateOperand is no more.
llvm-svn: 37963
2007-07-06 23:23:38 +00:00
Rafael Espindola b567e3ffb0 Add the byval attribute
llvm-svn: 37940
2007-07-06 10:57:03 +00:00
Evan Cheng a7d41aad4f Refactor code to add initial support for OptionalDefOperand.
llvm-svn: 37933
2007-07-06 01:05:26 +00:00
Evan Cheng ffabff11c0 Teach DAGISelEmitter about zero_reg.
llvm-svn: 37900
2007-07-05 07:19:45 +00:00
Evan Cheng e32e7fb40d Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time.
llvm-svn: 37899
2007-07-05 07:19:29 +00:00
John Criswell 2660cef6d7 Convert .cvsignore files
llvm-svn: 37801
2007-06-29 16:35:07 +00:00
Evan Cheng 59e5e118ac One additional field in TargetRegisterDesc.
llvm-svn: 37760
2007-06-27 17:09:34 +00:00
Evan Cheng 2e887c0b84 Add immediate sub-registers.
llvm-svn: 37738
2007-06-26 20:59:16 +00:00
Dan Gohman e8c1e428f2 Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).

llvm-svn: 37728
2007-06-26 00:48:07 +00:00
Dan Gohman 02d1a7844a Fix a typo in a comment.
llvm-svn: 37727
2007-06-26 00:43:18 +00:00
Chris Lattner b4777f087a silence warning when assertions are disabled.
llvm-svn: 37654
2007-06-19 06:40:46 +00:00
Dan Gohman 9e82064924 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
2007-06-19 01:48:05 +00:00
Evan Cheng a7ca624028 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
llvm-svn: 37643
2007-06-19 01:26:51 +00:00
Christopher Lamb f274efef9f Add support to tablegen for specifying subregister classes on a per register class basis.
llvm-svn: 37572
2007-06-13 22:20:15 +00:00
Evan Cheng 452a818c6a Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions.
llvm-svn: 37465
2007-06-06 10:14:55 +00:00
Bill Wendling 6357bf20fa Patches by Chuck Rose to unbreak V Studio builds.
Thanks Chuck!

llvm-svn: 37428
2007-06-04 23:52:59 +00:00
Dan Gohman a23ef8a8f2 Remove the operator<< for MVT::ValueType in preparation for MVT::ValueType
being changed from an enum to an integer type, which can't have a custom
operator<< overload.

llvm-svn: 37412
2007-06-04 16:11:03 +00:00
Reid Spencer c23c9fce34 The Intrinsic::getDeclaration function's Tys parameter only contains the
types of the iAny types involved in the overloaded intrinsic. Thus, we
can't use the argument number as the index but have to count them separately
in order to index Tys correctly. This patch rectifies this situation.

llvm-svn: 37296
2007-05-22 19:30:31 +00:00
Evan Cheng b99726d7a0 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand.
llvm-svn: 37116
2007-05-16 20:45:24 +00:00
Chris Lattner 2b5badc0e1 Fix CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll, the other recent
patches are also needed.

llvm-svn: 37070
2007-05-15 01:36:44 +00:00
Evan Cheng a32dee205f Added \!con(a,b) syntax to concatnate two dag fragments.
llvm-svn: 37063
2007-05-15 01:23:24 +00:00
Evan Cheng c0fb94596a Mark all (not just the first) predicate operand M_PREDICATE_OPERAND.
llvm-svn: 37061
2007-05-15 01:20:36 +00:00
Evan Cheng b0925c0e49 PredicateOperand related bug fix.
llvm-svn: 37060
2007-05-15 01:19:51 +00:00
Evan Cheng 5162f584c7 If a PredicateOperand has an empty ExecuteAlways field, treat it as if a normal operand for isel.
llvm-svn: 36946
2007-05-08 21:04:07 +00:00
Bill Wendling e6182267d7 Add an "implies" field to features. This indicates that, if the current
feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.

llvm-svn: 36756
2007-05-04 20:38:40 +00:00
Nate Begeman fd788aafba A bit of feedback from Chris that I missed; error rather than asserting.
llvm-svn: 36619
2007-05-01 06:08:36 +00:00
Nate Begeman 27a625a74b llvm bug #1350, parts 1, 2, and 3.
llvm-svn: 36618
2007-05-01 05:57:02 +00:00
Dan Gohman 2966c9072b Update a comment to reflect recent changes in the type system.
llvm-svn: 36486
2007-04-26 19:43:14 +00:00
Lauro Ramos Venancio 83fc4f3c3c bugfix: remember that ResNode was declared.
llvm-svn: 36477
2007-04-26 17:03:22 +00:00
Christopher Lamb 8996dce6ec Fix generation of certain scheduler itineraries.
llvm-svn: 36338
2007-04-22 09:04:24 +00:00
Evan Cheng f0c955b4dc Bug fix; add super-registers sets.
llvm-svn: 36296
2007-04-21 00:55:29 +00:00
Lauro Ramos Venancio 2518889872 Implement "general dynamic", "initial exec" and "local exec" TLS models for
X86 32 bits.

llvm-svn: 36283
2007-04-20 21:38:10 +00:00
Evan Cheng ac9fdde7f4 Add sub-registers sets.
llvm-svn: 36278
2007-04-20 21:13:46 +00:00
Reid Spencer 9c2eec377e For PR1328:
Don't assert everytime an intrinsic name isn't recognized. Instead, make
the assert optional when callin getIntrinsicID(). This allows the assembler
to handle invalid intrinsic names gracefully.

llvm-svn: 36120
2007-04-16 06:54:34 +00:00
Reid Spencer e67d0c226d For PR1297:
Implement code generation for overloaded intrinsic functions. The basic
difference is that "actual" argument types must be provided when
constructing intrinsic names and types. Also, for recognition, only the
prefix is examined. If it matches, the suffix is assumed to match. The
suffix is checked by the Verifier, however.

llvm-svn: 35539
2007-04-01 07:20:02 +00:00
Bill Wendling 98d2104c6f Add support for the v1i64 type. This makes better code for this:
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret

llvm-svn: 35351
2007-03-26 07:53:08 +00:00
Evan Cheng 9d7d130835 Recognize target instruction flag 'isReMaterializable'.
llvm-svn: 35159
2007-03-19 06:20:37 +00:00
Anton Korobeynikov ed4b303c10 Refactoring of formal parameter flags. Enable properly use of
zext/sext/aext stuff.

llvm-svn: 35008
2007-03-07 16:25:09 +00:00
Anton Korobeynikov e7ec3bc7bc Use new SDIselParamAttr enumeration. This removes "magick" constants
from formal attributes' flags processing.

llvm-svn: 34963
2007-03-06 08:12:33 +00:00
Chris Lattner 7fb0823a7b rename some CCActions
llvm-svn: 34724
2007-02-28 05:29:06 +00:00
Chris Lattner 22778a3d1c implement CCPromoteToType
llvm-svn: 34720
2007-02-28 04:43:48 +00:00
Chris Lattner cbebe4600f reapply
llvm-svn: 34697
2007-02-27 22:08:27 +00:00
Chris Lattner bf5f3945fd *** empty log message ***
llvm-svn: 34696
2007-02-27 22:05:51 +00:00
Evan Cheng 116ec30e4f Backing out
CodeGenTarget.cpp updated: 1.82 -> 1.83
Record.cpp updated: 1.55 -> 1.56
Record.h updated: 1.59 -> 1.60
TableGen.cpp updated: 1.47 -> 1.48
It's missing CallingConvEmitter.h

llvm-svn: 34693
2007-02-27 21:44:08 +00:00
Chris Lattner fa024e1ad1 initial support for calling convention generation, still unfinished.
llvm-svn: 34682
2007-02-27 20:43:37 +00:00
Chris Lattner 68a8bcce99 emit an enum value for the # of target registers.
llvm-svn: 34624
2007-02-26 03:34:38 +00:00
Chris Lattner 49e58cfe42 the lengths of the strings are known, just use memcmp
llvm-svn: 34321
2007-02-15 19:26:16 +00:00
Chris Lattner 1e92e06779 Implement Function::getIntrinsicID without it needing to call Value::getName,
which allocates a string.  This speeds up instcombine on 447.dealII by 5%.

llvm-svn: 34318
2007-02-15 19:17:16 +00:00
Reid Spencer 09575bac2e For PR1195:
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.

llvm-svn: 34300
2007-02-15 03:39:18 +00:00
Reid Spencer d84d35ba70 For PR1195:
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.

llvm-svn: 34293
2007-02-15 02:26:10 +00:00
Jim Laskey 2682ea616f Automatically generating intrinsic declarations from Dan Gohman. Modified
to construct FunctionType in separate function, and, have getDeclaration
return a Function instead of a Constant.

llvm-svn: 34008
2007-02-07 20:38:26 +00:00
Reid Spencer 008e65ff96 Set the new NO_INSTALL flag for build-only tools.
llvm-svn: 33967
2007-02-06 18:51:28 +00:00
Jim Laskey 132fb185ee Error check and eliminate unnecessary value.
llvm-svn: 33966
2007-02-06 18:30:58 +00:00
Jim Laskey 207230b984 Regenerate.
llvm-svn: 33965
2007-02-06 18:20:07 +00:00
Jim Laskey a9e7064774 Deemed too cute to live.
llvm-svn: 33964
2007-02-06 18:19:44 +00:00
Jim Laskey f4163f9bbc Regenerate.
llvm-svn: 33963
2007-02-06 18:03:31 +00:00
Jim Laskey 5aed30d5cf Support var arg intrinsics.
llvm-svn: 33962
2007-02-06 18:02:54 +00:00
Jim Laskey 73e79b5a43 Make the constant honest.
llvm-svn: 33557
2007-01-26 23:00:54 +00:00
Jim Laskey 214c582002 Files missing from LABEL check in.
llvm-svn: 33539
2007-01-26 17:29:20 +00:00
Chris Lattner 100602d756 Make tblgen error more useful. Patch by B. Scott Michel
llvm-svn: 33295
2007-01-17 07:45:12 +00:00
Reid Spencer 7a9c62baa6 For PR1064:
Implement the arbitrary bit-width integer feature. The feature allows
integers of any bitwidth (up to 64) to be defined instead of just 1, 8,
16, 32, and 64 bit integers.

This change does several things:
1. Introduces a new Derived Type, IntegerType, to represent the number of
   bits in an integer. The Type classes SubclassData field is used to
   store the number of bits. This allows 2^23 bits in an integer type.
2. Removes the five integer Type::TypeID values for the 1, 8, 16, 32 and
   64-bit integers. These are replaced with just IntegerType which is not
   a primitive any more.
3. Adjust the rest of LLVM to account for this change.

Note that while this incremental change lays the foundation for arbitrary
bit-width integers, LLVM has not yet been converted to actually deal with
them in any significant way. Most optimization passes, for example, will
still only deal with the byte-width integer types.  Future increments
will rectify this situation.

llvm-svn: 33113
2007-01-12 07:05:14 +00:00
Reid Spencer bc013ba367 For PR950:
Convert signed integer types to signless.

llvm-svn: 32786
2006-12-31 05:50:28 +00:00
Jim Laskey 3f7d047a14 Ignore entries with blank names.
llvm-svn: 32491
2006-12-12 20:55:58 +00:00
Jim Laskey 8171e58bd9 Rollback changes to take a different tack.
llvm-svn: 32488
2006-12-12 19:26:50 +00:00
Jim Laskey 7c3cab9ddc Honor the command line specification for machine type.
llvm-svn: 32483
2006-12-12 16:07:33 +00:00
Bill Wendling 9bfb1e1f29 What should be the last unnecessary <iostream>s in the library.
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
Evan Cheng 8e94078483 Match TargetInstrInfo changes.
llvm-svn: 32107
2006-12-01 22:57:41 +00:00
Chris Lattner 55b8683d24 Fix PR1001, patch by Nikhil Patil!
llvm-svn: 31880
2006-11-20 18:54:33 +00:00
Evan Cheng 71adba6dce Add opcode to TargetInstrDescriptor.
llvm-svn: 31804
2006-11-17 01:46:27 +00:00
Chris Lattner 78a403f90e Remove the isTwoAddress property from the CodeGenInstruction class. It should
not be used for anything other than backwards compat constraint handling.

Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter.  Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.

llvm-svn: 31769
2006-11-15 23:23:02 +00:00
Chris Lattner c94f214d22 ADd support for adding constraints to suboperands
llvm-svn: 31748
2006-11-15 02:38:17 +00:00
Chris Lattner c75081b7a8 restore some 'magic' code that I removed: it is needed. Add comments explaining
why.

llvm-svn: 31743
2006-11-14 22:17:10 +00:00
Chris Lattner c5dd5b11a4 minimal hack to get patterns whose result type is iPTR to be selected.
llvm-svn: 31742
2006-11-14 21:50:27 +00:00
Chris Lattner 75165d07a0 remove some dead code
llvm-svn: 31740
2006-11-14 21:41:35 +00:00
Chris Lattner 7c9f48cefb Add support for nodes that return iPTR.
llvm-svn: 31739
2006-11-14 21:32:01 +00:00
Chris Lattner 110c777f2c changes to get ptr_rc to be accepted in patterns. This is needed for ppc preinc
stores.

llvm-svn: 31738
2006-11-14 21:18:40 +00:00
Chris Lattner f8c06b335d Fix a bug handling nodes with variable arguments. The code was fixed to assume
that there were two input operands before the variable operand portion.  This
*happened* to be true for all call instructions, which took a chain and a
destination, but was not true for the PPC BCTRL instruction, whose destination
is implicit.

Making this code more general allows elimination of the custom selection logic
for BCTRL.

llvm-svn: 31732
2006-11-14 18:41:38 +00:00
Chris Lattner ba7b3673f9 allow ptr_rc to explicitly appear in an instructions operand list, it doesn't
have to be a subpart of a complex operand.

llvm-svn: 31618
2006-11-10 02:01:40 +00:00
Evan Cheng 1698c2999c Remove M_2_ADDR_FLAG.
llvm-svn: 31583
2006-11-09 02:22:54 +00:00
Evan Cheng 7120b9e9c7 Divide select methods into groups by SelectionDAG node opcodes (ISD::ADD,
X86ISD::CMP, etc.) instead of SDNode names (add, x86cmp, etc). We now allow
multiple SDNodes to map to the same SelectionDAG node (e.g. store, indexed
store).

llvm-svn: 31575
2006-11-08 23:01:03 +00:00
Evan Cheng d715a2cbfb Always pass the root node to ComplexPattern isel matching function.
llvm-svn: 31570
2006-11-08 20:31:10 +00:00
Chris Lattner 5d14eac21d emit TIED_TO correctly
llvm-svn: 31484
2006-11-07 01:27:55 +00:00
Chris Lattner f62138e792 Mark predicate operands as such in operand info.
llvm-svn: 31483
2006-11-06 23:53:31 +00:00
Chris Lattner 33f5a51020 simplify the way operand flags and constraints are handled, making it easier
to extend.

llvm-svn: 31481
2006-11-06 23:49:51 +00:00
Chris Lattner 8a9c91de33 recognize ppc's blr instruction as predicated
llvm-svn: 31480
2006-11-06 21:44:54 +00:00
Chris Lattner 698c900b0c regenerate
llvm-svn: 31472
2006-11-05 23:28:58 +00:00
Jeff Cohen 7d6f3db3e2 Unbreak VC++ build.
llvm-svn: 31464
2006-11-05 19:31:28 +00:00
Evan Cheng 3cb5bf721c Clean up some code.
llvm-svn: 31451
2006-11-04 09:40:23 +00:00
Chris Lattner ed07f23c52 Parse PredicateOperand's. When an instruction takes one, have the generated
isel fill in the instruction operands with the 'execute always' value
automatically.

llvm-svn: 31448
2006-11-04 05:12:02 +00:00
Chris Lattner 1faa9097c7 First steps to getting PredicateOperand's to work. This handles instruction
and pat pattern definitions.  Codegen is not right for them yet.

llvm-svn: 31444
2006-11-04 01:35:50 +00:00
Chris Lattner 7982de167f eliminate need for the NumMIOperands field in Operand.
llvm-svn: 31432
2006-11-03 23:45:17 +00:00
Reid Spencer 03c6038226 Remove an unused variable.
llvm-svn: 31403
2006-11-03 01:48:30 +00:00
Reid Spencer 5314f04de5 Don't write out variables that are never used.
llvm-svn: 31396
2006-11-03 01:28:12 +00:00
Chris Lattner 71f55131d4 silence warnings
llvm-svn: 31392
2006-11-03 01:11:05 +00:00
Reid Spencer 6152ad000c Revert last patch which causes tblgen to segfault (why, I'm not sure).
llvm-svn: 31383
2006-11-02 21:07:40 +00:00
Reid Spencer 2a82686563 For PR786:
Remove unused variables.

llvm-svn: 31381
2006-11-02 20:46:16 +00:00
Evan Cheng 3557a39494 Tied-to constraint must be op_with_larger_idx = op_with_smaller_idx or else throw an exception.
llvm-svn: 31361
2006-11-01 23:03:11 +00:00
Evan Cheng 23654935f4 Not meant to be checked in.
llvm-svn: 31334
2006-11-01 00:27:59 +00:00
Evan Cheng ac79c7c4c0 Add operand constraints to TargetInstrInfo.
llvm-svn: 31333
2006-11-01 00:27:05 +00:00
Evan Cheng a74965f15a Passing isel root and use operands to ComplexPattern functions, these should do the usual load folding checks as well.
llvm-svn: 30972
2006-10-16 06:33:44 +00:00
Evan Cheng cfb9526d61 When checking if a load can be folded, we check if there is any non-direct
way to reach the load via any nodes that would be folded. Start from the
root of the matched sub-tree.

llvm-svn: 30956
2006-10-14 08:30:15 +00:00
Evan Cheng 1d04dd3aac Really remove dead nodes from isel queue.
llvm-svn: 30923
2006-10-12 23:18:52 +00:00
Evan Cheng 8e770f5589 Use RemoveDeadNode to kill dead node.
llvm-svn: 30917
2006-10-12 20:35:19 +00:00
Evan Cheng d7125583f7 Prior load folding check on chain operand was too strict. It requires the
chain operand to point to the load being folded. Now we relax this, traversing
up the chain, if it doesn't reach the load, then it's ok. We will create a
TokenFactor (of all the chain operands and the load's chain) to capture all
the control flow dependencies.

llvm-svn: 30897
2006-10-12 02:08:53 +00:00
Evan Cheng 2022c79d7f Added properties such as SDNPHasChain to ComplexPattern.
llvm-svn: 30890
2006-10-11 21:02:01 +00:00
Chris Lattner c52dab5894 regenerate
llvm-svn: 30888
2006-10-11 18:13:09 +00:00
Chris Lattner 9d9de698b5 Add support for let expressions around an mdef. This implements a new part
of Regression/TableGen/MultiClass.td.

llvm-svn: 30887
2006-10-11 18:12:44 +00:00
Chris Lattner f405928e86 Special case tblgen generated code for patterns like (and X, 255) or (or X, 42).
The dag/inst combiners often 'simplify' the masked value based on whether
or not the bits are live or known zero/one.  This is good and dandy, but
often causes special case patterns to fail, such as alpha's CMPBGE pattern,
which looks like "(set GPRC:$RC, (setuge (and GPRC:$RA, 255), (and GPRC:$RB, 255)))".
Here the pattern for (and X, 255) should match actual dags like (and X, 254) if
the dag combiner proved that the missing bits are already zero (one for 'or').

For CodeGen/Alpha/cmpbge.ll:test2 for example, this results in:

        sll $16,1,$0
        cmpbge $0,$17,$0
        ret $31,($26),1

instead of:

        sll $16,1,$0
        and $0,254,$0
        and $17,255,$1
        cmpule $1,$0,$0
        ret $31,($26),1

... and requires no target-specific code.

llvm-svn: 30871
2006-10-11 04:05:55 +00:00
Chris Lattner 66fbbca1e7 Split some code out into a new method. The generated code is exactly
identical, this is just a refactoring.

llvm-svn: 30868
2006-10-11 03:35:34 +00:00
Evan Cheng 75a1b70da8 Predicate function on the node should be matched before its childrean' matching
code. This is especially important now matching ISD::LOAD also requires a
Predicate_Load call.

llvm-svn: 30845
2006-10-09 21:02:17 +00:00
Chris Lattner 560804cc50 regenerate
llvm-svn: 30799
2006-10-07 07:15:19 +00:00
Chris Lattner dfbda3598d Bugfix: this allows multiclasses to have default arguments.
llvm-svn: 30798
2006-10-07 07:14:48 +00:00
Chris Lattner 8111c59279 Fix more static dtor issues
llvm-svn: 30725
2006-10-04 21:52:35 +00:00
Chris Lattner 5d751b4a3a This:
AggregateString += "\0\0";

Doesn't add two nuls to the AggregateString (for obvious reasons), which
broke the asmprinter when the first character of an asm string was not
literal text.

llvm-svn: 30625
2006-09-27 16:44:09 +00:00
Chris Lattner 8d21485660 Actually, name the method PrintSpecial to match other stuff in AsmPrinter.h
llvm-svn: 30618
2006-09-26 23:47:10 +00:00
Chris Lattner 5fd0154523 Add support for ${:foo} syntax, where "foo" is passed into "printSpecial" and
has no associated operand.  This is useful for portably encoding stuff like
the comment character into an asm string.

llvm-svn: 30617
2006-09-26 23:45:08 +00:00
Chris Lattner 7d3fd4f888 don't allow 'imm' or specific imms, like '1' on the LHS of a binop.
This shrinks X86GenDAGISel by ~330 lines.

llvm-svn: 30574
2006-09-21 20:46:13 +00:00
Chris Lattner 99ae714459 Fit to 80 columns.
llvm-svn: 30572
2006-09-21 18:28:27 +00:00
Evan Cheng 9de003670f Allow PatFrag to be a leaf node.
llvm-svn: 30498
2006-09-19 19:08:04 +00:00
Evan Cheng 00b2848adb Add result of a Xform to isel queue.
llvm-svn: 30497
2006-09-19 18:40:15 +00:00
Chris Lattner bea5f91946 If multiple predicates are listed, they must all pass
llvm-svn: 30476
2006-09-19 00:41:36 +00:00
Chris Lattner bba17b9913 There!
llvm-svn: 30473
2006-09-18 22:41:07 +00:00
Chris Lattner 82a73a1989 Fix Regression/TableGen/2006-09-18-LargeInt.td
llvm-svn: 30472
2006-09-18 22:28:27 +00:00
Chris Lattner 3ffda067e3 Relax this check.
llvm-svn: 30381
2006-09-14 23:54:24 +00:00
Evan Cheng 1ec61ba00a 1) With X86 lowering change, the following can no longer happen since
the branch's chain is also produced by cmp.
          [ch, r : ld]
             ^ ^
             | |
      [XX]--/   \- [flag : cmp]
       ^             ^
       |             |
       \---[br flag]-

Remove an isel check which prevents loads from being folded into cmp / test
instructions.

2) Whenever possible, delete a selected node to allow more load folding
opportunities. Note not all nodes can be deleted after it has been
selected. Some may have simply morphed; some have not changed at all (e.g.
EntryToken).

llvm-svn: 30242
2006-09-11 02:24:43 +00:00
Evan Cheng 5a798b0648 Generated isel should favors explicit constant operand (+2) over an operand with a predicate (+1).
llvm-svn: 30180
2006-09-08 07:26:39 +00:00
Chris Lattner a2d7d1c4fa Fix JIT encoding of two-addr instructions.
llvm-svn: 30111
2006-09-05 03:01:52 +00:00
Chris Lattner 13a5dcddce Fix a long-standing wart in the code generator: two-address instruction lowering
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.

llvm-svn: 30108
2006-09-05 02:12:02 +00:00
Chris Lattner 70fd01a1b8 Make sure to clear CurDefmPrefix = 0, otherwise stuff after a defm won't
parse right.  This fixes TableGen/MultiClass.td

llvm-svn: 30037
2006-09-01 22:07:27 +00:00
Chris Lattner c05fac8b83 fix an assertion with multidefs. Def inside of multiclasses don't need to
be complete.

llvm-svn: 30034
2006-09-01 21:59:03 +00:00